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* drm/amdgpu: abstract amdgpu_job for schedulerChunming Zhou2015-08-209-136/+130
| | | | | Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Christian K?nig <christian.koenig@amd.com>
* drm/amdgpu: bump the DRM version for new allowed mem-mapped registersMarek Olšák2015-08-201-1/+2
| | | | | | | | Used by mesa, etc. for profiling. Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* Merge branch 'drm-next-fsl-dcu' of ↵Dave Airlie2015-08-2014-0/+1417
|\ | | | | | | | | | | | | | | | | | | | | https://github.com/Jianwei-Wang/linux-drm-fsl-dcu into drm-next Merge Freescale DCU FRM driver. * 'drm-next-fsl-dcu' of https://github.com/Jianwei-Wang/linux-drm-fsl-dcu: MAINTAINERS: Add Freescale DCU DRM driver maintainer devicetree: Add NEC to the vendor-prefix list drm/layerscape: Add Freescale DCU DRM driver
| * drm/layerscape: Add Freescale DCU DRM driverJianwei Wang2015-08-1914-0/+1417
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch add support for Two Dimensional Animation and Compositing Engine (2D-ACE) on the Freescale SoCs. 2D-ACE is a Freescale display controller. 2D-ACE describes the functionality of the module extremely well its name is a value that cannot be used as a token in programming languages. Instead the valid token "DCU" is used to tag the register names and function names. The Display Controller Unit (DCU) module is a system master that fetches graphics stored in internal or external memory and displays them on a TFT LCD panel. A wide range of panel sizes is supported and the timing of the interface signals is highly configurable. Graphics are read directly from memory and then blended in real-time, which allows for dynamic content creation with minimal CPU intervention. The features: (1) Full RGB888 output to TFT LCD panel. (2) Blending of each pixel using up to 4 source layers dependent on size of panel. (3) Each graphic layer can be placed with one pixel resolution in either axis. (4) Each graphic layer support RGB565 and RGB888 direct colors without alpha channel and BGRA8888 BGRA4444 ARGB1555 direct colors with an alpha channel and YUV422 format. (5) Each graphic layer support alpha blending with 8-bit resolution. This is a simplified version, only one primary plane, one framebuffer, one crtc, one connector and one encoder for TFT LCD panel. Signed-off-by: Alison Wang <b18965@freescale.com> Signed-off-by: Xiubo Li <lixiubo@cmss.chinamobile.com> Signed-off-by: Jianwei Wang <jianwei.wang.chn@gmail.com> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* | Merge branch 'drm-atmel-hlcdc-devel' of ↵Dave Airlie2015-08-202-1/+219
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://github.com/bbrezillon/linux-at91 into drm-next The following PR add support for 3 more atmel SoCs and for some missing features (new input formats and PRIME support). * 'drm-atmel-hlcdc-devel' of https://github.com/bbrezillon/linux-at91: drm: atmel-hlcdc: add support for sama5d4 SoCs drm: atmel-hlcdc: add support for at91sam9n12 SoC drm: atmel-hlcdc: add support for at91sam9x5 SoCs drm: atmel-hlcdc: add RGB565 and RGB444 output support drm: atmel-hlcdc: add the missing DRM_ATOMIC flag drm: atmel-hlcdc: add PRIME support
| * | drm: atmel-hlcdc: add support for sama5d4 SoCsBoris Brezillon2015-08-181-0/+86
| | | | | | | | | | | | | | | | | | | | | Describe capabilities of the HLCDC IP found on sama5d4 SoCs and add a new entry to the atmel_hlcdc_of_match table. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| * | drm: atmel-hlcdc: add support for at91sam9n12 SoCBoris Brezillon2015-08-181-0/+29
| | | | | | | | | | | | | | | | | | | | | Describe capabilities of the HLCDC IP found on at91sam9n12 SoC and add a new entry to the atmel_hlcdc_of_match table. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| * | drm: atmel-hlcdc: add support for at91sam9x5 SoCsBoris Brezillon2015-08-181-0/+88
| | | | | | | | | | | | | | | | | | | | | Describe capabilities of the HLCDC IP found on at91sam9x5 SoCs and add a new entry to the atmel_hlcdc_of_match table. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| * | drm: atmel-hlcdc: add RGB565 and RGB444 output supportBoris Brezillon2015-08-181-0/+4
| | | | | | | | | | | | | | | | | | The HLCDC IP supports RGB565 and RGB444 output formats. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| * | drm: atmel-hlcdc: add the missing DRM_ATOMIC flagBoris Brezillon2015-08-181-1/+2
| | | | | | | | | | | | | | | | | | | | | The atmel-hlcdc driver already supports atomic operations, add the missing DRM_ATOMIC flag to expose the atomic features to userspace. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| * | drm: atmel-hlcdc: add PRIME supportBoris Brezillon2015-08-181-1/+11
| |/ | | | | | | Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
* | drm/amdgpu: wait on page directory changes. v2Bas Nieuwenhuizen2015-08-173-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | Pagetables can be moved and therefore the page directory update can be necessary for the current cs even if none of the the bo's are moved. In that scenario there is no fence between the sdma0 and gfx ring, so we add one. v2 (chk): rebased Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/amdgpu: Select BACKLIGHT_LCD_SUPPORTThierry Reding2015-08-171-0/+1
| | | | | | | | | | | | | | | | | | | | Explicitly select BACKLIGHT_LCD_SUPPORT to satisfy the direct dependency of BACKLIGHT_CLASS_DEVICE. Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Christian König <christian.koenig@amd.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/radeon: Select BACKLIGHT_LCD_SUPPORTThierry Reding2015-08-171-0/+1
| | | | | | | | | | | | | | | | | | | | Explicitly select BACKLIGHT_LCD_SUPPORT to satisfy the direct dependency of BACKLIGHT_CLASS_DEVICE. Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Christian König <christian.koenig@amd.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/amdgpu: cleanup sheduler rq handling v2Christian König2015-08-173-76/+54
| | | | | | | | | | | | | | | | | | Rework run queue implementation, especially remove the odd list handling. v2: cleanup the code only, no algorithem change. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
* | drm/amdgpu: move prepare work out of scheduler to cs_ioctlChunming Zhou2015-08-171-13/+8
| | | | | | | | | | Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Christian K?nig <christian.koenig@amd.com>
* | drm/amdgpu: fix unnecessary wake upChunming Zhou2015-08-172-4/+7
| | | | | | | | | | | | | | | | decrease CPU extra overhead. Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Christian K?nig <christian.koenig@amd.com>
* | drm/amdgpu: fix duplicated mapping invoke bugmonk.liu2015-08-171-0/+1
| | | | | | | | | | | | | | | | fix the bug that there is duplicated bo_update_mapping issued Signed-off-by: monk.liu <monk.liu@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
* | drm/amdgpu: drop bo_list_clone when no schedulermonk.liu2015-08-171-9/+13
| | | | | | | | | | | | | | | | | | bo_list_clone() will take a lot of time when bo_list hold too much elements, like above 7000 Signed-off-by: Monk.Liu <monk.liu@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Jammy Zhou <jammy.zhou@amd.com>
* | drm/amdgpu: disable GPU reset by defaultAlex Deucher2015-08-171-2/+2
| | | | | | | | | | | | | | | | | | It's not validated yet and causes more harm than good. Avoids spurious resets. Reviewed-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/amdgpu: fix type mismatch errormonk.liu2015-08-171-2/+3
| | | | | | | | | | | | | | | | | | | | | | remaining timeout returned by amdgpu_fence_wait_any can be larger than max int value, thus the truncated 32 bit value in r ends up being negative while its original long value is positive. Signed-off-by: monk.liu <monk.liu@amd.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <jammy.zhou@amd.com>
* | drm/amdgpu: add reference for **fenceChunming Zhou2015-08-1711-3/+15
| | | | | | | | | | | | | | | | fix fence is released when pass to **fence sometimes. add reference for it. Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Christian K?nig <christian.koenig@amd.com>
* | drm/amdgpu: fix waiting for all fences before flippingChristian König2015-08-172-29/+56
| | | | | | | | | | | | | | Otherwise we might see corruption. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/amdgpu: fix UVD return code checkingChristian König2015-08-171-5/+5
| | | | | | | | | | | | Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Tested-and-Reviewed-by: Leo Liu <leo.liu@amd.com>
* | drm/amdgpu: remove scheduler fence list v2Christian König2015-08-173-21/+1
| | | | | | | | | | | | | | | | | | Unused and missing proper locking. v2: add locking comment to commit message. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> (v1)
* | drm/amdgpu: remove amd_sched_wait_emit v2Christian König2015-08-173-73/+0
| | | | | | | | | | | | | | | | | | Not used any more. v2: remove amd_sched_emit as well. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
* | drm/amdgpu: remove unecessary scheduler fence callbacksChristian König2015-08-171-24/+7
| | | | | | | | | | Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
* | drm/amdgpu: fix scheduler fence implementationChristian König2015-08-171-1/+1
| | | | | | | | | | Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
* | drm/amdgpu: don't grab dev->struct_mutex in pm functionsDaniel Vetter2015-08-171-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Similar to radeon, except that amdgpu doesn't even use struct_mutex to protect anything like the shared z buffer (sane gpu architecture, yay!). And the code already grabs the globa adev->ring_lock, so this code can't race with itself. Which makes struct_mutex completely redundnant. Remove it. Cc: Alex Deucher <alexander.deucher@amd.com> Cc: "Christian König" <christian.koenig@amd.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/amdgpu: Don't take dev->struct_mutex in bo_force_deleteDaniel Vetter2015-08-171-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | It really doesn't protect anything which doesn't have other locks already. Also this is run from driver unload code so not much need for locks anyway. Same changes as for radeon really. Cc: Alex Deucher <alexander.deucher@amd.com> Cc: "Christian König" <christian.koenig@amd.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/radeon: Don't take dev->struct_mutex in pm functionsDaniel Vetter2015-08-171-5/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We already grab 2 device-global locks (write-sema rdev->pm.mclk_lock and rdev->ring_lock), adding another global mutex won't serialize this code more. And since there's really nothing interesting that gets protected in radeon by dev->struct mutex (we only have the global z buffer owners and it's still serializing gem bo destruction in the drm core - which is irrelevant since radeon uses ttm anyway internally) this doesn't add protection. Remove it. Cc: Alex Deucher <alexander.deucher@amd.com> Cc: "Christian König" <christian.koenig@amd.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/radeon: Don't take dev->struct_mutex in bo_force_deleteDaniel Vetter2015-08-171-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | It really doesn't protect anything which doesn't have other locks already. Also this is run from driver unload code so not much need for locks anyway. Cc: Alex Deucher <alexander.deucher@amd.com> Cc: "Christian König" <christian.koenig@amd.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/amdgpu: remove VI hw bug workaround v3Christian König2015-08-172-13/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The workaround simply doesn't work because VM mappings are controlled by userspace not the kernel. Additional to that this is just a performance problem which happens if you have holes in your VM mapping. v2: adjust virtual addr alignment as well. v3: fix trivial warning Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Monk Liu <monk.liu@amd.com> (v1) Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> (v2)
* | drm/amdgpu: cleanup amdgpu_fence_ring_wait_seqChristian König2015-08-171-69/+15
| | | | | | | | | | Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/amdgpu: remove duplicate amdgpu_fence_process implementationChristian König2015-08-171-58/+1
| | | | | | | | | | | | | | Looks like that somehow got missed while during porting the radeon changes. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/amdgpu: remove amdgpu_fence_waitChristian König2015-08-176-30/+7
| | | | | | | | | | | | | | It was just a wrapper for fence_wait anyway. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/amdgpu: use the reservation obj wait for the UVD msgChristian König2015-08-171-8/+5
| | | | | | | | | | Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/amdgpu: remove amdgpu_fence_signaledChristian König2015-08-173-26/+4
| | | | | | | | | | | | | | The common kernel function does the same thing. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/amd: add scheduler fence implementation (v2)Chunming Zhou2015-08-179-38/+202
| | | | | | | | | | | | | | | | | | scheduler fence is based on kernel fence framework. v2: squash in Christian's build fix Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Christian K?nig <christian.koenig@amd.com>
* | drm/amdgpu: use kernel submit helper in vmChunming Zhou2015-08-173-144/+33
| | | | | | | | | | Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Christian K?nig <christian.koenig@amd.com>
* | drm/amdgpu: use amd_sched_job in its backend opsChunming Zhou2015-08-173-38/+37
| | | | | | | | | | Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Christian K?nig <christian.koenig@amd.com>
* | drm/amdgpu: cleanup and fix scheduler fence handling v2Christian König2015-08-173-50/+44
| | | | | | | | | | | | | | | | v2: rebased Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> (v1) Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
* | drm/amdgpu: merge amd_sched_entity and amd_context_entity v2Christian König2015-08-177-101/+81
| | | | | | | | | | | | | | | | | | Avoiding a couple of casts. v2: rename c_entity to entity as well Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
* | drm/amdgpu: fix coding style in a couple of placesChristian König2015-08-172-11/+12
| | | | | | | | | | | | Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
* | drm/amdgpu: remove unused parent entityChristian König2015-08-173-6/+1
| | | | | | | | | | | | Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
* | drm/amdgpu: process sched job exactly triggered by fence signalChunming Zhou2015-08-174-48/+68
| | | | | | | | | | Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Christian K?nig <christian.koenig@amd.com>
* | Revert "drm/amdgpu: return new seq_no for amd_sched_push_job"Chunming Zhou2015-08-175-15/+38
| | | | | | | | | | | | | | | | | | | | This reverts commit d1d33da8eb86b8ca41dd9ed95738030df5267b95. Reviewed-by: Christian K?nig <christian.koenig@amd.com> Conflicts: drivers/gpu/drm/amd/amdgpu/amdgpu_sched.c drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
* | drm/amdgpu: cleanup amdgpu_ctx inti/fini v2Christian König2015-08-175-104/+89
| | | | | | | | | | | | | | | | | | Cleanup the kernel context handling. v2: rebased Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> (v1)
* | drm/amdgpu: stop leaking the ctx id into the scheduler v2Christian König2015-08-173-20/+7
| | | | | | | | | | | | | | | | | | Id's are for the IOCTL ABI only. v2: remove tgid as well Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
* | drm/amdgpu: cleanup ctx_mgr init/finiChristian König2015-08-173-25/+27
| | | | | | | | | | Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
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