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path: root/drivers/gpu/drm/tegra/vic.c
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* drm/tegra: Set MODULE_FIRMWARE for the VICNicolas Chauvet2017-08-171-2/+13
| | | | | | | | | | | | | | | The defines are set anyway to prevent an empty string. The test for the SoC is the same as for Nouveau for the Tegra GPU firmware (see drivers/gpu/drm/nouveau/nouveau_platform.c) v2: - Place the defines above each chip's vic_config struct - MODULE_FIRMWARE() at the end of the file Fixes: 0ae797a8ba05 ("drm/tegra: Add VIC support") Signed-off-by: Nicolas Chauvet <kwizart@gmail.com> Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
* gpu: host1x: Refactor channel allocation codeMikko Perttunen2017-06-151-2/+2
| | | | | | | | | | | | | | | | | This is largely a rewrite of the Host1x channel allocation code, bringing several changes: - The previous code could deadlock due to an interaction between the 'reflock' mutex and CDMA timeout handling. This gets rid of the mutex. - Support for more than 32 channels, required for Tegra186 - General refactoring, including better encapsulation of channel ownership handling into channel.c Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Tested-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
* drm/tegra: Add VIC supportArto Merilainen2017-04-051-0/+396
This patch adds support for Video Image Compositor engine which can be used for 2d operations. Signed-off-by: Andrew Chew <achew@nvidia.com> Signed-off-by: Arto Merilainen <amerilainen@nvidia.com> Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
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