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* Merge branch 'drm-next-4.12' of git://people.freedesktop.org/~agd5f/linux ↵Dave Airlie2017-04-071-0/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into drm-next A few more things for 4.12: - ttm and amdgpu support for non-contiguous vram CPU mappings - lots of bug fixes and cleanups for vega10 - misc bug fixes and code cleanups [airlied: fix do_div error on 32-bit arm, not sure it's 100% correct] * 'drm-next-4.12' of git://people.freedesktop.org/~agd5f/linux: (58 commits) drm/amdgpu: use uintptr_t instead of unsigned long to store pointer drm/amdgpu: Avoid using signed integer to store pointer value drm/amdgpu:invoke new implemented AI MB func drm/amdgpu/vega10:timeout set to equal with VI drm/amdgpu:implement the reset MB func for vega10 drm/amdgpu:fix typo for mxgpu_ai drm/amdgpu:no need to involv HDP in KIQ drm/amdgpu:add PSP block only load_type=PSP (v2) drm/amdgpu/smu9: update to latest driver interface drm/amd/amdgpu: cleanup gfx_v9_0_gpu_init() drm/amd/amdgpu: cleanup gfx_v9_0_rlc_reset() drm/amd/amdgpu: cleanup gfx_v9_0_rlc_start() drm/amd/amdgpu: simplify gfx_v9_0_cp_gfx_enable() drm/amd/amdgpu: cleanup gfx_v9_0_kiq_init_register() drm/amd/amdgpu: Drop gfx_v9_0_print_status() drm/amd/amdgpu: cleanup gfx_v9_0_set_gfx_eop_interrupt_state() drm/amd/amdgpu: cleanup gfx_v9_0_set_priv_reg_fault_state() drm/amd/amdgpu: cleanup gfx_v9_0_set_priv_inst_fault_state() drm/amd/amdgpu: cleanup gfx_v9_0_init_queue() drm/amdgpu: Move function amdgpu_has_atpx near other similar functions ...
| * drm/ttm: add io_mem_pfn callbackChristian König2017-04-041-0/+1
| | | | | | | | | | | | | | | | | | This allows the driver to handle io_mem mappings on their own. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/nouveau/gpio: enable interrupts on cards with 32 gpio linesAdam Borowski2017-04-061-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The code attempts to enable them, but hits an undefined behaviour by shifting by the entire register's width: int lines = 32; u32 mask = (1 << lines) - 1; // 00000000 on x86 u32 mask = (1 << lines) - 1; // ffffffff on arm (32) u32 mask = (1 << lines) - 1; // 00000000 on arm64 u32 mask = (1ULL << lines) - 1; // ffffffff everywhere Signed-off-by: Adam Borowski <kilobyte@angband.pl> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* | drm/nouveau/gr/gp107: initial supportBen Skeggs2017-04-069-8/+120
| | | | | | | | | | | | | | | | | | | | Forked from GP106 implementation. Differences: - 1 PPC/GPC - Slightly different grctx magics Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* | drm/nouveau/core: recognise GP10B chipsetAlexandre Courbot2017-04-061-0/+24
| | | | | | | | | | Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* | drm/nouveau/platform: support for probing GP10BAlexandre Courbot2017-04-061-0/+10
| | | | | | | | | | Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* | drm/nouveau/platform: make VDD regulator optionalAlexandre Courbot2017-04-063-9/+28
| | | | | | | | | | | | | | | | GP10B's power is managed by generic PM domains, so it does not require a VDD regulator. Add this option into the chip function structure. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* | drm/nouveau/gr: support for GP10BAlexandre Courbot2017-04-066-2/+77
| | | | | | | | | | | | | | GR is similar to GP100, with a few unavailable registers. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* | drm/nouveau/ibus: add GP10B supportAlexandre Courbot2017-04-063-0/+61
| | | | | | | | | | | | | | | | GP10B requires a specific initialization sequence due to the absence of devinit. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* | drm/nouveau/mc: add GP10B supportAlexandre Courbot2017-04-065-5/+69
| | | | | | | | | | | | | | | | GP10B's MC is compatible with GP100's, but engines need to be explicitly put out of ELPG during init. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* | drm/nouveau/fb: add GP10B supportAlexandre Courbot2017-04-063-0/+40
| | | | | | | | | | | | | | GP10B's FB is largely compatible with the GP100 implementation. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* | drm/nouveau/fifo: add GP10B supportAlexandre Courbot2017-04-065-1/+45
| | | | | | | | | | | | | | GP10B's FIFO is similar to GP100's, but only allows 512 channels. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* | drm/nouveau/msgqueue: support for GP10B PMU firmwareAlexandre Courbot2017-04-063-0/+117
| | | | | | | | | | | | | | | | | | | | The GP10B firmware is very close to GM20B's. The only difference is that it supports booting multiple falcons. In order to avoid having too much functions and structures shared, implement its support in the same source file as GM20B firmware. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* | drm/nouveau/secboot: add GP10B supportAlexandre Courbot2017-04-063-0/+95
| | | | | | | | | | | | | | | | GP10B's secboot is largely similar to GM20B's. Only differences are MC base address and the fact that GPCCS is also securely managed. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* | drm/nouveau/secboot/gm20b: specify MC base address as argumentAlexandre Courbot2017-04-062-8/+12
| | | | | | | | | | | | | | | | | | Allow the MC base address to be specified as an argument for the WPR region reading function. GP10B uses a different address layout as GM20B, so this is necessary. Also export the function to be used by GP10B. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* | drm/nouveau/secboot: start LS firmware in post-run hookAlexandre Courbot2017-04-062-49/+47
| | | | | | | | | | | | | | | | | | The LS firmware post-run hook is the right place to start said LS firmware. Moving it here also allows to remove special handling in the ACR code. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* | drm/nouveau/secboot: let LS post_run hooks return errorAlexandre Courbot2017-04-064-10/+26
| | | | | | | | | | | | | | | | A LS post-run hook can meet an error meaning the failure of secure boot. Make sure this can be reported. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* | drm/nouveau/secboot: pass instance to LS firmware loadersAlexandre Courbot2017-04-0612-39/+44
| | | | | | | | | | | | | | | | | | | | | | | | Having access to the secboot instance loading a LS firmware can be useful to LS firmware handlers. At least more useful than just having an out-of-context subdev pointer. GP10B's firmware will also need to know the WPR address, which can be obtained from the secboot instance. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* | drm/nouveau/secboot: allow to boot multiple falconsAlexandre Courbot2017-04-068-28/+54
| | | | | | | | | | | | | | | | | | | | | | | | Change the secboot and msgqueue interfaces to take a mask of falcons to reset instead of a single falcon. The GP10B firmware interface requires FECS and GPCCS to be booted in a single firmware command. For firmwares that only support single falcon boot, it is trivial to loop over the mask and boot each falcons individually. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* | drm/nouveau/imem/gk20a: Turn instmem lock into mutexThierry Reding2017-04-061-11/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | The gk20a implementation of instance memory uses vmap()/vunmap() to map memory regions into the kernel's virtual address space. These functions may sleep, so protecting them by a spin lock is not safe. This triggers a warning if the DEBUG_ATOMIC_SLEEP Kconfig option is enabled. Fix this by using a mutex instead. Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Alexandre Courbot <acourbot@nvidia.com> Tested-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* | drm/nouveau: initial support (display-only) for GP107Ben Skeggs2017-04-061-0/+30
| | | | | | | | | | | | | | | | | | | | Forked from GP106 implementation. Split out from commit enabling secboot/gr support so that it can be added to earlier kernels. Cc: stable@vger.kernel.org [4.10+] Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* | drm/nouveau/kms/nv50: fix double dma_fence_put() when destroying plane stateBen Skeggs2017-04-061-2/+0
| | | | | | | | | | | | | | | | | | | | | | When the atomic support was added to nouveau, the DRM core did not do this. However, later in the same merge window, a commit (drm/fence: add in-fences support) was merged that added it, leading to use-after-frees of the fence object. Cc: stable@vger.kernel.org [4.10+] Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* | drm/nouveau/kms/nv50: fix setting of HeadSetRasterVertBlankDmi methodBen Skeggs2017-04-061-3/+5
| | | | | | | | | | Cc: stable@vger.kernel.org [4.10+] Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* | drm/nouveau/mmu/nv4a: use nv04 mmu rather than the nv44 oneIlia Mirkin2017-04-061-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The NV4A (aka NV44A) is an oddity in the family. It only comes in AGP and PCI varieties, rather than a core PCIE chip with a bridge for AGP/PCI as necessary. As a result, it appears that the MMU is also non-functional. For AGP cards, the vast majority of the NV4A lineup, this worked out since we force AGP cards to use the nv04 mmu. However for PCI variants, this did not work. Switching to the NV04 MMU makes it work like a charm. Thanks to mwk for the suggestion. This should be a no-op for NV4A AGP boards, as they were using it already. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=70388 Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Cc: stable@vger.kernel.org Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* | drm/nouveau/mpeg: mthd returns true on success nowIlia Mirkin2017-04-062-2/+2
|/ | | | | | | Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Fixes: 590801c1a3 ("drm/nouveau/mpeg: remove dependence on namedb/engctx lookup") Cc: stable@vger.kernel.org # v4.3+ Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau: Don't register Thunderbolt eGPU with vga_switcherooLukas Wunner2017-03-301-1/+9
| | | | | | | | | | | | | An external Thunderbolt GPU can neither drive the laptop's panel nor be powered off by the platform, so there's no point in registering it with vga_switcheroo. In fact, when the external GPU is runtime suspended, vga_switcheroo will cut power to the internal discrete GPU, resulting in a lockup. Cc: Ben Skeggs <bskeggs@redhat.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Lukas Wunner <lukas@wunner.de> Link: http://patchwork.freedesktop.org/patch/msgid/8e733152b13e7c14501ad5af45c1c5c736584111.1489145162.git.lukas@wunner.de
* drm: Add acquire ctx parameter to ->set_configDaniel Vetter2017-03-292-4/+4
| | | | | | | | | | | | | | | | | Surprisingly a lot of legacy drivers roll their own, for runtime pm and because vmwgfx. Also make nouveau's set_config static while at it. Cc: Sinclair Yeh <syeh@vmware.com> Cc: Thomas Hellstrom <thellstrom@vmware.com> Cc: Ben Skeggs <bskeggs@redhat.com> Cc: Patrik Jakobsson <patrik.r.jakobsson@gmail.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Christian König <christian.koenig@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/20170322215058.8671-19-daniel.vetter@ffwll.ch
* drm: Add acquire ctx parameter to ->page_flip(_target)Daniel Vetter2017-03-292-2/+4
| | | | | | | | | | | | | | | Again just going through the motions, no functional changes in here. Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Ben Skeggs <bskeggs@redhat.com> Cc: Russell King <linux@armlinux.org.uk> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: Eric Anholt <eric@anholt.net> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Christian König <christian.koenig@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>t Link: http://patchwork.freedesktop.org/patch/msgid/20170322215058.8671-12-daniel.vetter@ffwll.ch
* drm: Add acquire ctx parameter to ->plane_disableDaniel Vetter2017-03-291-5/+7
| | | | | | | | | | | | | | Nouveau had a few direct calls to ->disable_plane, I replaced those with drm_plane_force_disable. Same story for shmob. Otherwise no code changes. Cc: Ben Skeggs <bskeggs@redhat.com> Cc: Russell King <linux@armlinux.org.uk> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20170322215058.8671-5-daniel.vetter@ffwll.ch
* drm: Add acquire ctx parameter to ->update_planeDaniel Vetter2017-03-291-2/+4
| | | | | | | | | | | | | Just rolling it out, no code change here. Cc: Ben Skeggs <bskeggs@redhat.com> Cc: Russell King <linux@armlinux.org.uk> Cc: Rob Clark <robdclark@gmail.com> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: Eric Anholt <eric@anholt.net> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20170322215058.8671-3-daniel.vetter@ffwll.ch
* drm/atomic: Introduce drm_atomic_helper_shutdownDaniel Vetter2017-03-271-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The trouble here is that it does multiple atomic commits under one drm_modeset_lock_all, which breaks the behind-the-scenes acquire context magic that function pulls off. It's much better to have one overall atomic commit. That we still have multiple atomic commits prevents us from adding some pretty useful debug checks to the atomic machinery. Hence it is really a bad idea to call the legacy drm_crtc_force_disable_all() function. There's 2 atomic drivers using this still, nouveau and tinydrm. To fix this, introduce a new drm_atomic_helper_shutdown() by extracting the code from i915. While at it improve kernel-doc and catch future offenders by sprinkling a WARN_ON into the legacy function. We should probably move those into the legacy modeset helpers, too ... v2: Make it compile on arm drivers too (Noralf). v3: Correct kerneldoc to point at _disable_all(). Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Acked-by: Noralf Trønnes <noralf@tronnes.org> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Cc: Noralf Trønnes <noralf@tronnes.org> Cc: Ben Skeggs <bskeggs@redhat.com> Tested-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20170321164149.31531-1-daniel.vetter@ffwll.ch
* Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linux into ↵Daniel Vetter2017-03-2380-566/+4481
|\ | | | | | | | | | | | | | | | | drm-misc-next Resync with drm-next, I have a patch which currently can't be applied because drm-misc-next lacked the latest drm/i915 code. Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
| * Merge tag 'drm-misc-next-2017-03-21' of ↵Dave Airlie2017-03-231-1/+0
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://anongit.freedesktop.org/git/drm-misc into drm-next drm-misc for 4.12, 2nd attempt this week: - topic branch from Jon Corbet for the new graph kerneldoc support - lots of graphs for kms/atomic things using the above - some vblank query tuning from Chris - gem/cma_fops macros - moar docs Driver stuff: - vc4 hdmi audio, yay (Eric) - dw-hdmi polish from a bunch of people - some rockchip dp updates that didn't make last week (Chris Zhong) - misc bridge&driver updates * tag 'drm-misc-next-2017-03-21' of git://anongit.freedesktop.org/git/drm-misc: (37 commits) drm/edid: detect SCDC support in HF-VSDB drm/edid: detect SCDC support in HF-VSDB drm/edid: check for HF-VSDB block drm: Add SCDC helpers drm: bridge: dw-hdmi: add HDMI vendor specific infoframe config drm/bridge: dw_hdmi: support i2c extended read mode drm/msm: add stubs for msm_{perf,rd}_debugfs_cleanup drm: bochs: Don't remove uninitialized fbdev framebuffer drm: vc4: remove redundant check of plane being non-null drm/vc4: use platform_register_drivers dma-fence: add dma_fence_match_context helper drm/vc4: Add HDMI audio support dt-bindings: Document the dmas and dma-names properties for VC4 HDMI drm/atmel-hlcdc: Fix suspend/resume implementation drm: Skip the waitqueue setup for vblank queries drm: Defer disabling the vblank IRQ until the next interrupt (for instant-off) drm/doc: atomic overview, with graph drm/doc: diagram for mode objects and properties drm/doc: Consistent kerneldoc include order drm/doc: Add KMS overview graphs ...
| * | drm/nouveau/secboot: fix NULL pointer dereferenceAlexandre Courbot2017-03-173-3/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | The msgqueue pointer validity should be checked by its owner, not by the msgqueue code itself to avoid this situation. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Reported-by: Julia Lawall <julia.lawall@lip6.fr> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * | drm/nouveau/secboot: fix inconsistent pointer checkingAlexandre Courbot2017-03-171-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We were returning PTR_ERR() on a NULL pointer, which obviously won't work. nvkm_engine_ref() will return an error in case something went wrong. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * | Merge tag 'drm-misc-next-2017-03-12' of ↵Dave Airlie2017-03-151-2/+1
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://anongit.freedesktop.org/git/drm-misc into drm-next More drm-misc stuff for 4.12: - drm_platform removal from Laurent - more dw-hdmi bridge driver updates (Laurent, Kieran, Neil) - more header cleanup and documentation - more drm_debugs_remove_files removal (Noralf) - minor qxl updates (Gerd) - edp crc support in helper + analogix_dp (Tomeu) for more igt testing! - old/new iterator roll-out (Maarten) - new bridge drivers: lvds (Laurent), megachips-something (Peter Senna) * tag 'drm-misc-next-2017-03-12' of git://anongit.freedesktop.org/git/drm-misc: (51 commits) drm: bridge: dw-hdmi: Move the driver to a separate directory. drm: bridge: dw-hdmi: Switch to regmap for register access drm: bridge: dw-hdmi: Remove device type from platform data drm: bridge: dw-hdmi: Add support for custom PHY configuration drm: bridge: dw-hdmi: Create PHY operations drm: bridge: dw-hdmi: Fix the PHY power up sequence drm: bridge: dw-hdmi: Fix the PHY power down sequence drm: bridge: dw-hdmi: Enable CSC even for DVI drm: bridge: dw-hdmi: Move CSC configuration out of PHY code drm: bridge: dw-hdmi: Remove unused functions drm: Extract drm_file.h drm: Remove DRM_MINOR_CNT drm: rename drm_fops.c to drm_file.c drm/doc: document fallback behaviour for atomic events drm: Remove drmP.h include from drm_kms_helper_common.c drm: Extract drm_pci.h drm: Move drm_lock_data out of drmP.h drm: Extract drm_prime.h drm/doc: Add todo about connector_list_iter drm/qxl: Remove qxl_debugfs_remove_files() ...
| * \ \ Merge branch 'linux-4.12' of git://github.com/skeggsb/linux into drm-nextDave Airlie2017-03-0880-566/+4468
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Re-architecture of the code to handle proprietary fw, more abstracted to support the multitude of differences that NVIDIA introduce - Support in the said code for GP10x ACR and GR fw, giving acceleration support \o/ - Fix for GTX 970 GPUs that are in an odd MMU configuration * 'linux-4.12' of git://github.com/skeggsb/linux: (60 commits) drm/nouveau/fb/gf100-: rework ram detection drm/nouveau/fb/gm200: split ram implementation from gm107 drm/nouveau/fb/gf108: split implementation from gf100 drm/nouveau/fb/gf100-: modify constructors to allow more customisation drm/nouveau/kms/nv50: use drm core i2c-over-aux algorithm drm/nouveau/i2c/g94-: return REPLY_M value on reads drm/nouveau/i2c: modify aux interface to return length actually transferred drm/nouveau/gp10x: enable secboot and GR drm/nouveau/gr/gp102: initial support drm/nouveau/falcon: support for gp10x msgqueue drm/nouveau/secboot: add gp102/gp104/gp106/gp107 support drm/nouveau/secboot: put HS code loading code into own file drm/nouveau/secboot: support for r375 ACR drm/nouveau/secboot: support for r367 ACR drm/nouveau/secboot: support for r364 ACR drm/nouveau/secboot: workaround bug when starting SEC2 firmware drm/nouveau/secboot: support standard NVIDIA HS binaries drm/nouveau/secboot: support for unload blob bootloader drm/nouveau/secboot: let callers interpret return value of blobs drm/nouveau/secboot: support for different load and unload falcons ...
| | * | | drm/nouveau/fb/gf100-: rework ram detectionBen Skeggs2017-03-078-101/+179
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit reworks the RAM detection algorithm, using RAM-per-LTC to determine whether a board has a mixed-memory configuration instead of using RAM-per-FBPA. I'm not certain the algorithm is perfect, but it should handle all currently known configurations in the very least. This should fix GTX 970 boards with 4GiB of RAM where the last 512MiB isn't fully accessible, as well as only detecting half the VRAM on GF108 boards. As a nice side-effect, GP10x memory detection now reuses the majority of the code from earlier chipsets. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | | drm/nouveau/fb/gm200: split ram implementation from gm107Ben Skeggs2017-03-074-1/+44
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | | drm/nouveau/fb/gf108: split implementation from gf100Ben Skeggs2017-03-076-1/+87
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | | drm/nouveau/fb/gf100-: modify constructors to allow more customisationBen Skeggs2017-03-074-52/+81
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | GF108/GM107 implementations will want slightly different functions for the upcoming RAM detection improvements. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | | drm/nouveau/kms/nv50: use drm core i2c-over-aux algorithmBen Skeggs2017-03-071-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I'm not entirely sure NVKM needs to support this now, but I haven't removed it as of yet just in case it's needed from DEVINIT scripts where DRM isn't available. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | | drm/nouveau/i2c/g94-: return REPLY_M value on readsBen Skeggs2017-03-072-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This value represents the actual number of bytes recieved on the AUX channel as the result of a read transaction. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | | drm/nouveau/i2c: modify aux interface to return length actually transferredBen Skeggs2017-03-077-26/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Apparently sinks are allows to respond with ACK even if they didn't fully complete a transaction... It seems like a missed opportunity for DEFER to me, but what do I know :) Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | | drm/nouveau/gp10x: enable secboot and GRAlexandre Courbot2017-03-071-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | All the bricks are in place for secure boot to be enabled. This in turn makes GR usable so enable them all. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | | drm/nouveau/gr/gp102: initial supportBen Skeggs2017-03-079-4/+183
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Differences from GP100: - 3 PPCs/GPC. - Another random reg to calculate/write. - Attrib CB setup a little different. - PascalB - PascalComputeB Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | | drm/nouveau/falcon: support for gp10x msgqueueAlexandre Courbot2017-03-074-0/+268
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the msgqueue firmware used to process SEC2 commands for gp10x chips. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | | drm/nouveau/secboot: add gp102/gp104/gp106/gp107 supportAlexandre Courbot2017-03-073-0/+253
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These gp10x chips are supporting using (roughly) the same firmware. Compared to previous secure chips, ACR runs on SEC2 and so does the low-secure msgqueue. ACR for these chips is based on r367. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | | drm/nouveau/secboot: put HS code loading code into own fileAlexandre Courbot2017-03-075-124/+182
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We will also need to load HS blobs outside of acr_r352 (for instance, to run the NVDEC VPR scrubber), so make this code reusable. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| | * | | drm/nouveau/secboot: support for r375 ACRAlexandre Courbot2017-03-073-0/+167
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | r375 ACR uses a unified bootloader descriptor for the GR and PMU firmwares. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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