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* Merge branch 'msm-next' of git://people.freedesktop.org/~robclark/linux into ↵Dave Airlie2014-02-116-74/+130
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | drm-next Compared to original fixes pull req that I sent yesterday, this adds one more fix that I found for a synchronization issue which starts to crop up when we use XA in DDX for 2d accel on 3d core. In particular, accelerating presentation blit triggers this problem. * 'msm-next' of git://people.freedesktop.org/~robclark/linux: drm/msm: bigger synchronization hammer drm/msm: fix deadlock in bo create fail path drm/msm/mdp4: cursor fixes drm/msm/mdp4: pageflip fixes drm/msm/mdp5: fix ref leaks in error paths drm/msm: fix inconsequential typo
| * drm/msm: bigger synchronization hammerRob Clark2014-02-072-7/+5
| | | | | | | | | | | | | | | | | | Because we use a list_head in the bo to track it's position in a submit, we need to serialize at a higher layer. Otherwise there are problems when multiple contexts are SUBMIT'ing in parallel cmdstreams referencing a shared bo. Signed-off-by: Rob Clark <robdclark@gmail.com>
| * drm/msm: fix deadlock in bo create fail pathRob Clark2014-02-051-1/+1
| | | | | | | | | | | | We already hold struct_mutex here. Signed-off-by: Rob Clark <robdclark@gmail.com>
| * drm/msm/mdp4: cursor fixesRob Clark2014-02-051-6/+16
| | | | | | | | | | | | | | | | It seems we need to update all cursor registers from vblank. This appears to be the cause of intermittent underflows when enabling/ disabling cursor. Signed-off-by: Rob Clark <robdclark@gmail.com>
| * drm/msm/mdp4: pageflip fixesRob Clark2014-02-051-57/+100
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Backport a few fixes found in the course of getting mdp5 working. There is a window of time after pageflip is requested, before we start scanning out the new fb (ie. while we are waiting for gpu). During that time we need to continue holding a reference to the still-current scanout fb, to avoid the backing gem bo's from being destroyed. Possibly a common mdp_crtc parent class could be useful to share some of this logic between mdp4_crtc and mdp5_crtc. OTOH, this all can be removed from the driver once atomic is in place, as plane/crtc updates get deferred until all fb's are ready before calling in to .page_flip(), etc. Signed-off-by: Rob Clark <robdclark@gmail.com>
| * drm/msm/mdp5: fix ref leaks in error pathsRob Clark2014-02-051-1/+6
| | | | | | | | Signed-off-by: Rob Clark <robdclark@gmail.com>
| * drm/msm: fix inconsequential typoRob Clark2014-02-051-2/+2
| | | | | | | | | | | | | | Small typo I noticed in the mdp4_plane code.. no consequence because PIPE_SRC_XY and PIPE_DST_XY have same register layout. Signed-off-by: Rob Clark <robdclark@gmail.com>
* | Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linuxLinus Torvalds2014-01-2952-855/+5271
|\ \ | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull drm updates from Dave Airlie: "Been a bit busy, first week of kids school, and waiting on other trees to go in before I could send this, so its a bit later than I'd normally like. Highlights: - core: timestamp fixes, lots of misc cleanups - new drivers: bochs virtual vga - vmwgfx: major overhaul for their nextgen virt gpu. - i915: runtime D3 on HSW, watermark fixes, power well work, fbc fixes, bdw is no longer prelim. - nouveau: gk110/208 acceleration, more pm groundwork, old overlay support - radeon: dpm rework and clockgating for CIK, pci config reset, big endian fixes - tegra: panel support and DSI support, build as module, prime. - armada, omap, gma500, rcar, exynos, mgag200, cirrus, ast: fixes - msm: hdmi support for mdp5" * 'drm-next' of git://people.freedesktop.org/~airlied/linux: (595 commits) drm/nouveau: resume display if any later suspend bits fail drm/nouveau: fix lock unbalance in nouveau_crtc_page_flip drm/nouveau: implement hooks for needed for drm vblank timestamping support drm/nouveau/disp: add a method to fetch info needed by drm vblank timestamping drm/nv50: fill in crtc mode struct members from crtc_mode_fixup drm/radeon/dce8: workaround for atom BlankCrtc table drm/radeon/DCE4+: clear bios scratch dpms bit (v2) drm/radeon: set si_notify_smc_display_change properly drm/radeon: fix DAC interrupt handling on DCE5+ drm/radeon: clean up active vram sizing drm/radeon: skip async dma init on r6xx drm/radeon/runpm: don't runtime suspend non-PX cards drm/radeon: add ring to fence trace functions drm/radeon: add missing trace point drm/radeon: fix VMID use tracking drm: ast,cirrus,mgag200: use drm_can_sleep drm/gma500: Lock struct_mutex around cursor updates drm/i915: Fix the offset issue for the stolen GEM objects DRM: armada: fix missing DRM_KMS_FB_HELPER select drm/i915: Decouple GPU error reporting from ring initialisation ...
| * drm: store the gem vma offset manager in a typed pointerDaniel Vetter2014-01-141-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This was hidden in a generic void * dev->mm_private. But only ever used for gem. But thanks to this fake generic pretension no one noticed that Rob's drm drivers are now all broken. So just give the offset manager a type pointer and fix up msm, omapdrm and tilcdc. v2: Fixup compile fail. v3: Fixup rebase fail that David spotted. Cc: David Herrmann <dh.herrmann@gmail.com> Cc: Rob Clark <robdclark@gmail.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * drm/msm: add a330/apq8x74Rob Clark2014-01-095-23/+144
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for adreno 330. Not too much different, just a few differences in initial configuration plus setting OCMEM base. Userspace support is already in upstream mesa. Note that the existing DT code is simply using the bindings from downstream android kernel, to simplify porting of this driver to existing devices. These do not constitute any committed/stable DT ABI. The addition of proper DT bindings will be a subsequent patch, at which point (as best as possible) I will try to support either upstream bindings or what is found in downstream android kernel, so that existing device DT files can be used. Signed-off-by: Rob Clark <robdclark@gmail.com>
| * drm/msm: add mdp5/apq8x74Rob Clark2014-01-0912-2/+2167
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the new MDP5 display controller block. The mapping between parts of the display controller and KMS is: plane -> PIPE{RGBn,VIGn} \ crtc -> LM (layer mixer) |-> MDP "device" encoder -> INTF / connector -> HDMI/DSI/eDP/etc --> other device(s) Unlike MDP4, it appears we can get by with a single encoder, rather than needing a different implementation for DTV, DSI, etc. (Ie. the register interface is same, just different bases.) Also unlike MDP4, all the IRQs for other blocks (HDMI, DSI, etc) are routed through MDP. And finally, MDP5 has this "Shared Memory Pool" (called "SMP"), from which blocks need to be allocated to the active pipes based on fetch stride. Signed-off-by: Rob Clark <robdclark@gmail.com>
| * drm/msm: add hdmi support for apq8x74/mdp5Rob Clark2014-01-098-107/+511
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The HDMI block is basically the same between older SoC's with mdp4 display controller, and newer ones with mdp5. So mostly this consists of better abstracting out the different sets of regulators, clks, etc. In particular, for regulators and clks we can split it up by what is needed for hot plug detect to work, and what is needed to light up the display. Also, 8x74 has a new phy.. a very simple one, but split out into a different mmio space. And with mdp5, the irq is shared with mdp, so we don't directly register our own irq handler. Signed-off-by: Rob Clark <robdclark@gmail.com>
| * drm/msm: move irq utils to mdp_kmsRob Clark2014-01-0910-169/+254
| | | | | | | | | | | | | | We'll want basically the same thing for mdp5, so refactor it out so it can be shared. Signed-off-by: Rob Clark <robdclark@gmail.com>
| * drm/msm: split out msm_kms.hRob Clark2014-01-096-30/+60
| | | | | | | | Signed-off-by: Rob Clark <robdclark@gmail.com>
| * drm/msm: mdp4_format -> mdp_formatRob Clark2014-01-097-31/+64
| | | | | | | | | | | | | | This can be shared between mdp4 and mdp5. Both use the same set of parameters to describe the format to the hw. Signed-off-by: Rob Clark <robdclark@gmail.com>
| * drm/msm: resync generated headersRob Clark2014-01-0914-243/+1525
| | | | | | | | | | | | resync to latest envytools db, add mdp5 registers Signed-off-by: Rob Clark <robdclark@gmail.com>
| * drm/msm: move mdp4 -> mdp/mdp4Rob Clark2014-01-099-6/+6
| | | | | | | | | | | | | | | | There are some little bits and pieces that mdp4 and mdp5 can share, so move things around so that we can have both in a common parent directory. Signed-off-by: Rob Clark <robdclark@gmail.com>
| * drm/msm: add support for msm8060ab/bstemRob Clark2014-01-093-5/+19
| | | | | | | | | | | | | | This adds the necessary configuration for the APQ8060A SoC (dual-core krait + a320 gpu) as found on the bstem board. Signed-off-by: Rob Clark <robdclark@gmail.com>
| * drm/msm: add support for non-IOMMU systemsRob Clark2014-01-0912-147/+410
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a VRAM carveout that is used for systems which do not have an IOMMU. The VRAM carveout uses CMA. The arch code must setup a CMA pool for the device (preferrably in highmem.. a 256m-512m VRAM pool in lowmem is not cool). The user can configure the VRAM pool size using msm.vram module param. Technically, the abstraction of IOMMU behind msm_mmu is not strictly needed, but it simplifies the GEM code a bit, and will be useful later when I add support for a2xx devices with GPUMMU, so I decided to keep this part. It appears to be possible to configure the GPU to restrict access to addresses within the VRAM pool, but this is not done yet. So for now the GPU will refuse to load if there is no sort of mmu. Once address based limits are supported and tested to confirm that we aren't giving the GPU access to arbitrary memory, this restriction can be lifted Signed-off-by: Rob Clark <robdclark@gmail.com>
| * drm/msm: fix bus scalingRob Clark2014-01-094-15/+23
| | | | | | | | | | | | | | This got a bit broken with original patches when re-arranging things to move dependencies on mach-msm inside #ifndef OF. Signed-off-by: Rob Clark <robdclark@gmail.com>
| * drm/msm: add missing MODULE_FIRMWARE()sRob Clark2014-01-091-0/+5
| | | | | | | | Signed-off-by: Rob Clark <robdclark@gmail.com>
| * drm/msm: COMPILE_TEST supportRob Clark2014-01-093-4/+10
| | | | | | | | | | | | With a simple stub, we can get COMPILE_TEST support. Signed-off-by: Rob Clark <robdclark@gmail.com>
| * drm: Kill DRM_IRQ_ARGSDaniel Vetter2013-12-181-1/+1
| | | | | | | | | | | | | | | | I've killed them a long time ago in drm/i915, let's get rid of this remnant of shared drm core days for good. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * drm/msm: call drm_put_dev directly in ->removeDaniel Vetter2013-12-181-1/+1
| | | | | | | | | | | | | | | | | | The drvdata pointer is already assigned to something useful. Cc: Rob Clark <robdclark@gmail.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Reviewed-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* | drm/msm: Fix link error with !MSM_IOMMUJoerg Roedel2014-01-071-0/+1
|/ | | | | | | | | | | | | | | The DRM driver for MSM depends on symbols from the MSM IOMMU driver. Add this dependency to the Kconfig file. Fixes this comile error: Kernel: arch/arm/boot/zImage is ready ERROR: "msm_iommu_get_ctx" [drivers/gpu/drm/msm/msm.ko] undefined! make[2]: *** [__modpost] Error 1 Cc: Rob Clark <robdclark@gmail.com> Signed-off-by: Joerg Roedel <joro@8bytes.org>
* Merge branch 'msm-next' of git://people.freedesktop.org/~robclark/linux into ↵Dave Airlie2013-11-1022-252/+664
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | drm-next prime support, inactive rework, render nodes * 'msm-next' of git://people.freedesktop.org/~robclark/linux: drm/msm/mdp4: page_flip cleanups/fixes drm/msm: EBUSY status handling in msm_gem_fault() drm/msm: rework inactive-work drm/msm: add plane support drm/msm: resync generated headers drm/msm: support render nodes drm/msm: prime support
| * drm/msm/mdp4: page_flip cleanups/fixesRob Clark2013-11-013-15/+50
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There were a few potential problems with the original page_flip/vblank code in mdp4_crtc. 1) We need vblank irq for a couple things, both completing flips and updating cursor. We need to keep track of what work is pending so that (for example) a cursor update while we are still waiting for pageflip_cb (ie. pageflip requested from userspace, but still waiting for rendering to complete) would not prematurely trigger event to userspace. 2) A preclose -> pageflip-cancel should not cancel a pageflip that was requested on a different file (ie. non-master closing should not cancel a pending pageflip). With these fixes, we no longer have problems w/ cursor not updating and with occasional hangs with userspace waiting for a pageflip that had been cancelled (launching XBMC from gnome-shell overview mode was a good way to trigger this, but now works reliably). Signed-off-by: Rob Clark <robdclark@gmail.com>
| * drm/msm: EBUSY status handling in msm_gem_fault()Rob Clark2013-11-011-0/+5
| | | | | | | | | | | | | | | | | | | | | | Subsequent threads returning EBUSY from vm_insert_pfn() was not handled correctly. As a result concurrent access from new threads to mmapped data caused SIGBUS. See e79e0fe3 Signed-off-by: Rob Clark <robdclark@gmail.com> Acked-by: David Brown <davidb@codeaurora.org>
| * drm/msm: rework inactive-workRob Clark2013-11-016-33/+71
| | | | | | | | | | | | | | | | | | | | | | | | Re-arrange things a bit so that we can get work requested after a bo fence passes, like pageflip, done before retiring bo's. Without any sort of bo cache in userspace, some games can trigger hundred's of transient bo's, which can cause retire to take a long time (5-10ms). Obviously we want a bo cache.. but this cleanup will make things a bit easier for atomic as well and makes things a bit cleaner. Signed-off-by: Rob Clark <robdclark@gmail.com> Acked-by: David Brown <davidb@codeaurora.org>
| * drm/msm: add plane supportRob Clark2013-11-016-56/+182
| | | | | | | | | | | | | | | | Enable using VG1 and VG2 for planes. Currently YUV/CSC or scaling is not enabled, but ARGB and xRGB blending is. Signed-off-by: Rob Clark <robdclark@gmail.com> Acked-by: David Brown <davidb@codeaurora.org>
| * drm/msm: resync generated headersRob Clark2013-11-0112-115/+169
| | | | | | | | | | | | | | resync to latest envytools db, fixes a typo: s/mpd4/mdp4/ Signed-off-by: Rob Clark <robdclark@gmail.com> Acked-by: David Brown <davidb@codeaurora.org>
| * drm/msm: support render nodesRob Clark2013-11-011-7/+8
| | | | | | | | | | | | | | | | Enable support for drm render nodes for msm by flagging the ioctls that are safe and only needed for rendering. Signed-off-by: Rob Clark <robdclark@gmail.com> Acked-by: David Brown <davidb@codeaurora.org>
| * drm/msm: prime supportRob Clark2013-11-015-26/+179
| | | | | | | | | | Signed-off-by: Rob Clark <robdclark@gmail.com> Acked-by: David Brown <davidb@codeaurora.org>
* | drm: Add separate Kconfig option for fbdev helpersDaniel Vetter2013-10-111-0/+1
|/ | | | | | | | | | | | | | | | | | | | | | | | For drivers which might want to disable fbdev legacy support. Select the new option in all drivers for now, so this shouldn't result in any change. Drivers need some work anyway to make fbdev support optional (if they have it implemented, that is), so the recommended way to expose this is by adding per-driver options. At least as long as most drivers don't support disabling the fbdev support. v2: Update for new drm drivers msm and rcar-du. Note that Rob's msm driver can already take advantage of this, which allows us to build msm without any fbdev depencies in the kernel! v3: Move the MODULE_* stuff from the fbdev helper file to drm_crtc_helper.c. Cc: David Herrmann <dh.herrmann@gmail.com> Cc: Rob Clark <robdclark@gmail.com> Reviewed-by: Rob Clark <robdclark@gmail.com> Acked-by: Dave Airlie <airlied@linux.ie> Reviewed-by: Chon Ming Lee <chon.ming.lee@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* drm/msm: use drm_gem_dumb_destroy helperRob Clark2013-09-282-8/+1
| | | | Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm: deal with mach/iommu.h removalRob Clark2013-09-281-2/+2
| | | | | | | | | We still need an API exported by msm iommu driver (but not visible in any public header anymore). For now, just declare the prototype ourselves, but when msm iommu driver provides a better option, use that instead. Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm: Remove iommu include from mdp4_kms.cJoerg Roedel2013-09-281-2/+0
| | | | | | | | The include file has been removed and the file does not need it anyway, so remove it. Fixes a compile error. Signed-off-by: Joerg Roedel <joro@8bytes.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm: Odd PTR_ERR usageThomas Meyer2013-09-281-1/+1
| | | | | | | | | The variable priv->kms is not initialized yet. Found by "scripts/coccinelle/tests/odd_ptr_err.cocci". PTR_ERR should access the value just tested by IS_ERR. Signed-off-by: Thomas Meyer <thomas@m3y3r.de>
* drm/msm: drop unnecessary set_need_resched()Rob Clark2013-09-161-1/+0
| | | | | | This was inherited from i915/udl, and not actually needed. Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm: fix potential NULL pointer dereferenceWei Yongjun2013-09-121-1/+2
| | | | | | The dereference to 'pdata' should be moved below the NULL test. Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
* drm/msm: workaround for missing irqRob Clark2013-09-111-2/+5
| | | | | | | | Occasionally we seem to miss an IRQ from the ME (microengine). I'm not entirely sure the root cause, but for now we can unwedge things by retiring from the hangcheck timer. Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm: return -EBUSY if bo still activeRob Clark2013-09-113-18/+44
| | | | | | | | | | | | When we CPU_PREP a bo with NOSYNC flag (for example, to implement PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE), an -EBUSY return indicates to userspace that the bo is still busy. Previously it was incorrectly returning 0 in this case. And while we're in there throw in an bit of extra sanity checking in case userspace tries to wait for a bogus fence. Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm: fix return value check in ERR_PTR()Wei Yongjun2013-09-111-2/+2
| | | | | | | | In case of error, the function drm_prime_pages_to_sg() returns ERR_PTR() and never returns NULL. The NULL test in the return value check should be replaced with IS_ERR(). Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
* drm/msm: fix cmdstream size checkRob Clark2013-09-101-11/+13
| | | | | | | | | | | | Need to check size+offset against bo size (duh!).. now we have a test case to make sure I've done it right: https://github.com/freedreno/msmtest/blob/master/submittest.c Also, use DRM_ERROR() for error case traces, which makes debugging userspace easier when enabling debug traces is too much. Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm: hangcheck harderRob Clark2013-09-102-2/+17
| | | | | | | | | | | | | | If gpu locks up with the rptr shortly beyond the wrap-around point in the ringbuffer, because the rptr was not reset (but wptr is, by virtue of resetting rb->cur), we could end up in a scenario where we think there is not enough space in the ringbuffer for the next cmds. And since the CP won't reset rptr until after processing an IB, this leaves things in a sort of deadlock. So reset rptr too. And a bit more spiffing up of hangcheck to make things easier to debug. Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm: handle read vs write fencesRob Clark2013-09-104-11/+27
| | | | | | | | | The userspace API already had everything needed to handle read vs write synchronization. This patch actually bothers to hook it up properly, so that we don't need to (for example) stall on userspace read access to a buffer that gpu is also still reading. Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm: convert to drm_bridgeRob Clark2013-09-0210-260/+274
| | | | | | | | | | Drop the msm_connector base class, and special calls to base class methods from the encoder, and use instead drm_bridge. This allows for a cleaner division between the hdmi (and in future dsi) blocks, from the mdp block. Signed-off-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm: Pass page flip ioctl flags to driverKeith Packard2013-08-301-1/+2
| | | | | | | | | This lets drivers see the flags requested by the application [airlied: fixup for rcar/imx/msm] Signed-off-by: Keith Packard <keithp@keithp.com> Signed-off-by: Dave Airlie <airlied@gmail.com>
* drm/msm: add basic hangcheck/recovery mechanismRob Clark2013-08-245-5/+87
| | | | | | | | | | A basic, no-frills recovery mechanism in case the gpu gets wedged. We could try to be a bit more fancy and restart the next submit after the one that got wedged, but for now keep it simple. This is enough to recover things if, for example, the gpu hangs mid way through a piglit run. Signed-off-by: Rob Clark <robdclark@gmail.com>
* drm/msm: add a3xx gpu supportRob Clark2013-08-2414-16/+2487
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add initial support for a3xx 3d core. So far, with hardware that I've seen to date, we can have: + zero, one, or two z180 2d cores + a3xx or a2xx 3d core, which share a common CP (the firmware for the CP seems to implement some different PM4 packet types but the basics of cmdstream submission are the same) Which means that the eventual complete "class" hierarchy, once support for all past and present hw is in place, becomes: + msm_gpu + adreno_gpu + a3xx_gpu + a2xx_gpu + z180_gpu This commit splits out the parts that will eventually be common between a2xx/a3xx into adreno_gpu, and the parts that are even common to z180 into msm_gpu. Note that there is no cmdstream validation required. All memory access from the GPU is via IOMMU/MMU. So as long as you don't map silly things to the GPU, there isn't much damage that the GPU can do. Signed-off-by: Rob Clark <robdclark@gmail.com>
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