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* | | drm/amd/display: Use 2-factor allocator callsKees Cook2018-07-051-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | As already done treewide, switch from open-coded multiplication to 2-factor allocation helper. Signed-off-by: Kees Cook <keescook@chromium.org> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | | Revert "drm/amd/display: Fix indentation in dcn10 resource constructor"Harry Wentland2018-07-051-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | That change was a merge gone bad. This reverts commit cb1d7eacb58f7d1b7d0e57b26dc02d45eada4a3c. Signed-off-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | | drm/amd/display: off by one in find_irq_source_info()Dan Carpenter2018-07-051-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ->info[] array has DAL_IRQ_SOURCES_NUMBER elements so this condition should be >= instead of > or we could read one element beyond the end of the array. Fixes: 4562236b3bc0 ("drm/amd/dc: Add dc display driver (v2)") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | | drm/amd/display: Fix copy error when set memory clocksRex Zhu2018-07-051-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | Set memory clocks same as soc clocks Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | | drm/amd/display: Refine the implementation of dm_pp_get_funcs_rvRex Zhu2018-07-051-40/+40
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | powerplay/dpm export all interfaces in struct amd_pm_funcs. so call common exported interfaces instead of powerplay inner interfaces Also not include header file hwmgr.h Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | | drm/amd/display: Notify powerplay the display controller idrex zhu2018-07-051-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | powerplay can recalculate the number of active display Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | | drm/amd/display: Notify powerplay the min_dcef clockrex zhu2018-07-051-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | powerplay can notify smu to recalculates the maximum deep-sleep divider display allowed. Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | | drm/amd/pp: Convert clock unit to KHz as definedRex Zhu2018-07-051-11/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert clock unit 10KHz to KHz as the data sturct defined. e.g. struct pp_clock_with_latency { uint32_t clocks_in_khz; uint32_t latency_in_us; }; Meanwhile revert the same conversion in display side. Acked-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | | drm/amd/display: Fix a typo in wm_min_memg_clk_in_khzRex Zhu2018-07-053-11/+11
| | | | | | | | | | | | | | | | | | | | | | | | change wm_min_memg_clk_in_khz -> wm_min_mem_clk_in_khz Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | | drm/amd/display: Ctrl stutter mode through module parameterrex zhu2018-07-051-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | use ppfeaturemask to enable/disable stutter mode. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | | drm/amd/display: Fix dm-pp clks type convert errorrex zhu2018-07-051-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | fix a typo when convert displayphyclk type. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | | drm/amd/display: Drop unnecessary header filerex zhu2018-07-051-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | powerplay implement hwmgr_function table for all supported asics in order to conceal the asic's detail infomation. so no need to include the smu10_hwmgr.h. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | | drm/amd/display: don't initialize resultStefan Agner2018-07-051-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The wrong enum type is used to initialize the result, leading to a warning when using clang: drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_link_dp.c:1998:26: warning: implicit conversion from enumeration type 'enum ddc_result' to different enumeration type 'enum dc_status' [-Wenum-conversion] enum dc_status result = DDC_RESULT_UNKNOWN; ~~~~~~ ^~~~~~~~~~~~~~~~~~ 1 warning generated. Initialization of result is unnecessary anyway, just drop the initialization. Signed-off-by: Stefan Agner <stefan@agner.ch> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | | drm/amd/display: Allow option to use worst-case watermarkTony Cheng2018-07-052-1/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | use worse case watermark (consider both DCC and VM) to keep golden consistent regardless of DCC Signed-off-by: Tony Cheng <tony.cheng@amd.com> Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | | drm/amd/display: get board layout for edid emulationSamson Tam2018-07-055-1/+474
| | | | | | | | | | | | | | | | | | | | | Signed-off-by: Samson Tam <Samson.Tam@amd.com> Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | | drm/amd/display: add valid regoffset and NULL pointer checkCharlene Liu2018-07-055-17/+38
| | | | | | | | | | | | | | | | | | | | | Signed-off-by: Charlene Liu <charlene.liu@amd.com> Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | | drm/amd/display: dal 3.1.52Tony Cheng2018-07-051-1/+1
| | | | | | | | | | | | | | | | | | Signed-off-by: Tony Cheng <tony.cheng@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | | drm/amd/display: Check scaling ration not viewports params.Yongqiang Sun2018-07-051-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In case of roation, width and height in viewport is difference between viewport and h_active and v_active, while this is not scaling. The right way is check ratios in scaling data, to determine it is a scaling case or not. Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | | drm/amd/display: remove soc_bounding_box.cDmytro Laktyushkin2018-07-055-119/+2
| | | | | | | | | | | | | | | | | | | | | Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | | drm/amd/display: move dcn watermark programming to set_bandwidthDmytro Laktyushkin2018-07-052-90/+19
| | | | | | | | | | | | | | | | | | | | | Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | | drm/amd/display: separate out wm change request dcn workaroundDmytro Laktyushkin2018-07-055-5/+13
| | | | | | | | | | | | | | | | | | | | | Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | | drm/amd/display: remove dcn1 watermark sets b, c and dDmytro Laktyushkin2018-07-051-1/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently dcn1 will not switch between watermark sets so we can save time by not calculating 3 extra sets. Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | | drm/amd/display: fix dcn1 watermark range reportingDmytro Laktyushkin2018-07-051-84/+18
| | | | | | | | | | | | | | | | | | | | | Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | | drm/amd/display: Moving powerplay functions to a separate classMikita Lipski2018-07-053-493/+526
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Moving powerplay functions to a new amdgpu_dm_pp_smu class and cleaning dm_services class from unused headers. Signed-off-by: Mikita Lipski <mikita.lipski@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | | drm/amd/display: move dml defaults to respective dcn resource filesDmytro Laktyushkin2018-07-052-61/+64
| | | | | | | | | | | | | | | | | | | | | Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | | drm/amd/display: Convert 10kHz clks from PPLib into kHzMikita Lipski2018-07-051-6/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The driver is expecting clock frequency in kHz, while SMU returns the values in 10kHz, which causes the bandwidth validation to fail Signed-off-by: Mikita Lipski <mikita.lipski@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | | drm/amd/display: Add dmpp clks types for conversionMikita Lipski2018-07-051-23/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add more cases for dm_pp clks translator into pp clks so we can pass the right structures to the powerplay. Use clks translator instead of massive switch statement. Signed-off-by: Mikita Lipski <mikita.lipski@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | | drm/amd/display: Enable PPLib calls from DC on linuxMikita Lipski2018-07-051-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Set the powerplay debug flag to false for both Windows and Linux to allow the calls to pplib. So we can retrieve the clock values from powerplay instead of using default hardcoded values. Signed-off-by: Mikita Lipski <mikita.lipski@amd.com> Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | | drm/amd/display: fix potential infinite loop in fbc pathRoman Li2018-07-051-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Fixing integer overflow bug in wait_for_fbc_state_changed() - Correct the max value of retries for the corresponding warning Signed-off-by: Roman Li <Roman.Li@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | | drm/amd/display: dal 3.1.51Tony Cheng2018-07-051-1/+1
| | | | | | | | | | | | | | | | | | Signed-off-by: Tony Cheng <tony.cheng@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | | drm/amd/display: clean rq/dlg/ttu reg structs before calculationsDmytro Laktyushkin2018-07-053-4/+10
| | | | | | | | | | | | | | | | | | | | | Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | | drm/amd/display: dal 3.1.50Tony Cheng2018-07-051-1/+1
| | | | | | | | | | | | | | | | | | Signed-off-by: Tony Cheng <tony.cheng@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | | drm/amd/display: Add front end for dp debugfs filesDavid Francis2018-07-054-1/+215
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As part of hardware certification, read-write access to the link rate, lane count, voltage swing, pre-emphasis, and PHY test pattern of DP connectors is required. This commit adds debugfs files that will correspond to these values. The file operations are not yet implemented: currently writing or reading them does nothing. Signed-off-by: David Francis <David.Francis@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | | drm/amd/display: dal 3.1.49Tony Cheng2018-07-051-1/+1
| | | | | | | | | | | | | | | | | | Signed-off-by: Tony Cheng <tony.cheng@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | | drm/amd/display: fix use of uninitialized memoryWesley Chalmers2018-07-051-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | DML does not calculate chroma values for RQ when surface is not YUV, but DC will unconditionally use the uninitialized values for HW programming. This does not cause visual corruption since HW will ignore garbage chroma values when surface is not YUV, but causes presubmission tests to fail golden value comparison. Signed-off-by: Wesley Chalmers <Wesley.Chalmers@amd.com> Signed-off-by: Eryk Brol <eryk.brol@amd.com> Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | | drm/amd/display: support ACrYCb2101010Zheng, XueLai(Eric)2018-07-052-1/+2
| | | | | | | | | | | | | | | | | | | | | Signed-off-by: XueLai(Eric), Zheng <XueLai.Zheng@amd.com> Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | | drm/amd/display: add safe_to_lower support to dcn wm programmingDmytro Laktyushkin2018-07-053-138/+214
| | | | | | | | | | | | | | | | | | | | | | | | | | | This will prevent watermarks from lowering when unsafe to do so. Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | | drm/amd/display: change dentist DID enum values to uppercaseDmytro Laktyushkin2018-07-051-25/+25
| | | | | | | | | | | | | | | | | | | | | Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | | drm/amd/display: add CHG_DONE mash/sh defines for dentistDmytro Laktyushkin2018-07-051-2/+6
| | | | | | | | | | | | | | | | | | | | | Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | | drm/amd/display: fix pplib voltage requestDmytro Laktyushkin2018-07-051-27/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This fixes incorrect clock caching and by extension fixes the clock reporting. Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Eric Yang <eric.yang2@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | | drm/amd/display: fix dccg dcn1 ifdefDmytro Laktyushkin2018-07-052-4/+8
| | | | | | | | | | | | | | | | | | | | | Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Eric Yang <eric.yang2@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | | drm/amd/display: Define dp_alt_modeCharlene Liu2018-07-053-29/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Also cleanup command_table2.c. No need for a lot of forward declarations. Signed-off-by: Charlene Liu <charlene.liu@amd.com> Reviewed-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | | drm/amd/display: Temporarily remove Chroma logsWesley Chalmers2018-07-051-6/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | To ensure tests continue to pass Signed-off-by: Wesley Chalmers <Wesley.Chalmers@amd.com> Reviewed-by: Shahin Khayyer <Shahin.Khayyer@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | | drm/amd/display: remove unnecessary pplib volage requests that are assertingDmytro Laktyushkin2018-07-051-8/+0
| | | | | | | | | | | | | | | | | | | | | Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | | drm/amd/display: clean up set_bandwidth usageDmytro Laktyushkin2018-07-053-18/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This removes redundant set_bandwidth calls as well as fixes a bug in post_set_address_update where dcn1 would never get to lower clocks. Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Nikola Cornij <Nikola.Cornij@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | | drm/amd/display: rename dce_disp_clk to dccgDmytro Laktyushkin2018-07-057-95/+88
| | | | | | | | | | | | | | | | | | | | | | | | | | | No functional change. Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Nikola Cornij <Nikola.Cornij@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | | drm/amd/display: clean up dccg divider calc and dcn constructorDmytro Laktyushkin2018-07-052-155/+68
| | | | | | | | | | | | | | | | | | | | | | | | | | | No functional change. Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | | drm/amd/display: move dcn1 dispclk programming to dccgDmytro Laktyushkin2018-07-054-115/+90
| | | | | | | | | | | | | | | | | | | | | | | | | | | No functional change. Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Nikola Cornij <Nikola.Cornij@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | | drm/amd/display: get rid of cur_clks from dcn_bw_outputDmytro Laktyushkin2018-07-056-74/+72
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Cleans up dcn_bw_output to only contain calculated info, actual programmed values will now be stored in respective blocks. Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Nikola Cornij <Nikola.Cornij@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | | drm/amd/display: Add clock types to applying clk for voltageMikita Lipski2018-07-051-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add DCF and FCLK clock case statements for changing raven's clocks for voltage request. Also maintain DCEF clock for DCE120 calls. Signed-off-by: Mikita Lipski <mikita.lipski@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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