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path: root/drivers/gpio/gpio-omap.c
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* gpio/omap: Use devm_ API and add request_mem_regionBenoit Cousson2012-03-051-20/+15
| | | | | | | | | | | Replace the regular kzalloc and ioremap with the devm_ equivalent to simplify error handling. Add the missing devm_request_mem_region to reserve the region used by the driver. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Tarun Kanti DebBarma <tarun.kanti@ti.com>
* gpio/omap: Remove bank->id information and misc cleanupBenoit Cousson2012-03-051-14/+9
| | | | | | | | | | | | The driver does not need anymore any id to identify the GPIO instance. Remove every occurence of the bank->id inside the driver. Remove two trailing spaces. Add a dev variable for better readability in probe. Remove unused variable bank->pbase. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
* gpio/omap: handle set_dataout reg capable IP on restoreNishanth Menon2012-02-061-1/+6
| | | | | | | | | | | | | GPIO IP revisions such as those used in OMAP4 have a set_dataout while the previous revisions used a single dataout register. Depending on what is available restore the dataout settings to the right register. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* gpio/omap: restore OE only after setting the output levelNishanth Menon2012-02-061-1/+2
| | | | | | | | | | | | | Setup the dataout register before restoring OE. This is to make sure that we have valid data in dataout register which would be made available in output pins as soon as OE is enabled. Else, there is risk of unknown data getting out into gpio pins. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* gpio/omap: enable irq at the end of all configuration in restoreNishanth Menon2012-02-061-4/+5
| | | | | | | | | | | | Setup the interrupt enable registers only after we have configured the required edge and required configurations, not before, to prevent spurious events as part of restore routine. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* gpio/omap: save and restore debounce registersNishanth Menon2012-02-061-0/+12
| | | | | | | | | | | | | GPIO debounce registers need to be saved and restored for proper functioning of driver. Signed-off-by: Nishanth Menon <nm@ti.com> tarun.kanti@ti.com: Debounce context save is moved to _set_gpio_debounce() as part of dynamic context save to remove overhead. Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* gpio/omap: remove omap_gpio_save_context overheadTarun Kanti DebBarma2012-02-061-28/+28
| | | | | | | | | | | Context is now saved dynamically in respective functions whenever and whichever registers are modified. This avoid overhead of saving all registers context in the runtime suspend callback. Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* gpio/omap: fix incorrect access of debounce moduleTarun Kanti DebBarma2012-02-061-5/+13
| | | | | | | | | | | | | | | | | Enable debounce clock before writing/reading debounce registers. Disable the clock at the end so that it is synchronized with the pm_runtime_get/put_sync calls. Enable debounce clock per module. This call is mandatory because in omap_gpio_request() when *_runtime_get_sync() is called, _gpio_dbck_enable() within runtime callbck fails to turn on dbck because dbck_enable_mask used within _gpio_dbck_enable() is still not initialized at that point. Therefore we have to enable dbck here. Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* gpio/omap: fix debounce clock handlingTarun Kanti DebBarma2012-02-061-10/+19
| | | | | | | | | | | | | The dbck_enable_mask indicates which all GPIOs within a bank have debounce enabled and dbck is enabled/disabled based upon this. But there is no mechanism to track the dbck state. In order to manage the dbck state we need additional flag and logic so that turning off/on dbck is synchronized with pm_runtime_put/get_sync calls. Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* gpio/omap: cleanup prepare_for_idle and resume_after_idleTarun Kanti DebBarma2012-02-061-98/+147
| | | | | | | | | | | | | | | | | | | | | | | Since *_prepare_for_idle() and *_resume_after_idle() are called with interrupts disabled they should be kept as simple as possible. So, moving most of the stuff to *_runtime_suspend/resume() callbacks. To avoid invalid context restore happening in *_runtime_resume() callback as a result of *_get_sync() call in *_gpio_probe(), update bank->context_loss_count. This would make context restore condition check false in the callback and skip restore until further initialization take place. The workaround_enabled static variable is now a member of struct gpio_bank. Unlike most GPIO registers the OE has 0xffffffff as the default value. To make sure invalid context is not restored, updating the OE context with default value. Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Signed-off-by: Charulatha V <charu@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* gpio/omap: optimize suspend and resume functionsTarun Kanti DebBarma2012-02-061-25/+29
| | | | | | | | | | There is no need to operate on all the banks every time the function is called. Just operate on the current bank passed by the framework. Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* gpio/omap: use pm-runtime frameworkTarun Kanti DebBarma2012-02-061-24/+44
| | | | | | | | | | | | | | | Call runtime pm APIs pm_runtime_get_sync() and pm_runtime_put() for enabling/disabling clocks appropriately. Remove syscore_ops and instead use SET_RUNTIME_PM_OPS macro. There is no more need to call omap_device_disable_idle_on_suspend since driver is PM runtime adapted now. Signed-off-by: Charulatha V <charu@ti.com> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* gpio/omap: remove bank->method & METHOD_* macrosCharulatha V2012-02-061-32/+6
| | | | | | | | | | | | | | | | | | | The only bank->type (method) used in the OMAP GPIO driver is MPUIO type as they need to be handled separately. Identify the same using a flag and remove all METHOD_* macros. mpuio_init() function is defined under #ifdefs. It is required only in case of MPUIO bank type and only when PM operations are supported by it. This is applicable only in case of OMAP16xx SoC's MPUIO GPIO bank type. For all the other cases it is a dummy function. Hence clean up the same and remove all the OMAP SoC specific #ifdefs. Signed-off-by: Charulatha V <charu@ti.com> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* gpio/omap: remove unnecessary bit-masking for read accessTarun Kanti DebBarma2012-02-061-3/+0
| | | | | | | | | | | | Remove un-necessary bit masking. Since the register are 4 byte aligned and readl would work as is. The 'enabled' mask is already taking care to mask for bank width. Signed-off-by: Charulatha V <charu@ti.com> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* gpio/omap: use pinctrl offset instead of macroCharulatha V2012-02-061-5/+3
| | | | | | | | | | Use regs->pinctrl field instead of using the macro OMAP1510_GPIO_PIN_CONTROL Signed-off-by: Charulatha V <charu@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* gpio/omap: cleanup omap_gpio_mod_init functionTarun Kanti DebBarma2012-02-061-54/+23
| | | | | | | | | | | | | | With register offsets now defined for respective OMAP versions we can get rid of cpu_class_* checks. This function now has common initialization code for all OMAP versions. Initialization specific to OMAP16xx has been moved within omap16xx_gpio_init(). Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Signed-off-by: Charulatha V <charu@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* gpio/omap: cleanup set_gpio_triggering functionTarun Kanti DebBarma2012-02-061-114/+43
| | | | | | | | | | | | | | | Getting rid of ifdefs within the function by adding register offset intctrl and associating OMAPXXXX_GPIO_INT_CONTROL in respective SoC specific files. Also, use wkup_status register consistently instead of referring to wakeup clear and wakeup set register offsets. Get rid of cpu_is_xxxx checks in set_gpio_trigger() using irqctrl. Signed-off-by: Charulatha V <charu@ti.com> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* gpio/omap: remove hardcoded offsets in context save/restoreTarun Kanti DebBarma2012-02-061-22/+20
| | | | | | | | | | | | | It is not required to use hard-coded offsets any more in context save and restore functions and instead use the generic offsets which have been correctly initialized during device registration. Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Signed-off-by: Charulatha V <charu@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* gpio/omap: use level/edge detect reg offsetsTarun Kanti DebBarma2012-02-061-82/+32
| | | | | | | | | | | | | By adding level and edge detection register offsets and then initializing them correctly according to OMAP versions during device registrations we can now remove lot of revision checks in these functions. Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Signed-off-by: Charulatha V <charu@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* gpio/omap: further cleanup using wkup_en registerTarun Kanti DebBarma2012-02-061-89/+21
| | | | | | | | | | | | | | | Wakeup enable register offset initialized according to OMAP versions during device registration. Use this to avoid version checks. Starting with OMAP4, legacy registers should not be used in combination with the updated regsiters. Use wkup_en register consistently for all SoCs wherever applicable. Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Signed-off-by: Charulatha V <charu@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* gpio/omap: avoid cpu checks during module ena/disableCharulatha V2012-02-061-30/+23
| | | | | | | | | | | Remove cpu-is checks while enabling/disabling OMAP GPIO module during a gpio request/free. Signed-off-by: Charulatha V <charu@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* gpio/omap: make non-wakeup GPIO part of pdataCharulatha V2012-02-061-7/+1
| | | | | | | | | | | Non-wakeup GPIOs are available only in OMAP2. Avoid cpu_is checks by making non_wakeup_gpios as part of pdata. Signed-off-by: Charulatha V <charu@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* gpio/omap: handle save/restore context in GPIO driverTarun Kanti DebBarma2012-02-061-73/+58
| | | | | | | | | | | | | | | | Modify omap_gpio_prepare_for_idle() & omap_gpio_resume_after_idle() functions to handle save context & restore context respectively in the OMAP GPIO driver itself instead of calling these functions from pm specific files. For this, in gpio_prepare_for_idle(), call *_get_context_loss_count() and in gpio_resume_after_idle() call it again. If the count is different, do restore context. Signed-off-by: Charulatha V <charu@ti.com> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* gpio/omap: make gpio_context part of gpio_bank structureCharulatha V2012-02-061-42/+34
| | | | | | | | | | | Currently gpio_context array used to save gpio bank's context, is used only for OMAP3 architecture. Move gpio_context as part of gpio_bank structure so that it can be specific to each gpio bank and can be used for any OMAP architecture Signed-off-by: Charulatha V <charu@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* gpio/omap: use flag to identify wakeup domainCharulatha V2012-02-061-7/+6
| | | | | | | | | | | | | | | | | In omap3, save/restore context is implemented for GPIO banks 2-6 as GPIO bank1 is in wakeup domain. Instead of identifying bank's power domain by bank id, use 'loses_context' flag which is filled by pwrdm_can_ever_lose_context() during dev_init. For getting the powerdomain pointer, omap_hwmod_get_pwrdm() is used. omap_device_get_pwrdm() could not be used as the pwrdm information needs to be filled in pdata, whereas omap_device_get_pwrdm() could be used only after omap_device_build() call. Signed-off-by: Charulatha V <charu@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* gpio/omap: remove dependency on gpio_bank_countCharulatha V2012-02-061-83/+80
| | | | | | | | | | | | The gpio_bank_count is the count of number of GPIO devices in a SoC. Remove this dependency from the driver by using list. Also remove the dependency on array of pointers to gpio_bank struct of all GPIO devices. Signed-off-by: Charulatha V <charu@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* Merge branch 'gpio/merge' of git://git.secretlab.ca/git/linux-2.6Linus Torvalds2011-11-151-25/+34
|\ | | | | | | | | | | | | | | * 'gpio/merge' of git://git.secretlab.ca/git/linux-2.6: gpio: pca953x: propagate the errno from the chip_init functions gpio: pca953x: remove unneeded check for chip type gpio/omap: check return value from irq_alloc_generic_chip gpio/omap: replace MOD_REG_BIT macro with static inline
| * gpio/omap: check return value from irq_alloc_generic_chipTodd Poynor2011-08-231-0/+5
| | | | | | | | | | | | | | | | Ensure return value of irq_alloc_generic_chip() is checked before continuing on to use it. Signed-off-by: Todd Poynor <toddpoynor@google.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * gpio/omap: replace MOD_REG_BIT macro with static inlineKevin Hilman2011-08-231-25/+29
| | | | | | | | | | | | | | | | | | This macro is ugly and confusing, especially since it passes in most arguments, but uses an implied 'base' from the caller. Replace it with an equivalent static inline. Signed-off-by: Kevin Hilman <khilman@ti.com>
* | Merge branch 'gpio' of ↵Linus Torvalds2011-10-271-1/+1
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm * 'gpio' of http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm: (43 commits) ARM: 7135/1: ep93xx: bring back missing <mach/gpio.h> ARM: 7104/1: plat-pxa: break out GPIO driver specifics ARM: 7103/1: plat-pxa: move PXA GPIO driver to GPIO subsystem ARM: 7042/3: mach-ep93xx: break out GPIO driver specifics ARM: 7101/1: arm/tegra: Replace <mach/gpio.h> with <mach/gpio-tegra.h> ARM: 7094/1: arm/tegra: Move EN_VDD_1V05_GPIO to board-harmony.h ARM: 7083/1: rewrite U300 GPIO to use gpiolib ARM: 7074/1: gpio: davinci: eliminate unused variable warnings ARM: 7063/1: Orion: gpio: add missing include of linux/types.h ARM: 7055/1: arm/tegra: mach/gpio.h: include linux/types.h to fix build ARM: 7054/1: arm/tegra: Delete custom gpio_to_irq, and irq_to_gpio ARM: 7053/1: gpio/tegra: Implement gpio_chip.to_irq ARM: 7052/1: gpio/tegra: Remove use of irq_to_gpio ARM: 7057/1: mach-pnx4008: rename GPIO header ARM: 7056/1: plat-nomadik: kill off <plat/gpio.h> ARM: 7050/1: mach-sa1100: delete irq_to_gpio() function ARM: 7049/1: mach-sa1100: move SA1100 GPIO driver to GPIO subsystem ARM: 7045/1: mach-lpc32xx: break out GPIO driver specifics ARM: 7044/1: mach-lpc32xx: move LPC32XX GPIO driver to GPIO subsystem ARM: 7043/1: mach-ixp2000: rename GPIO header ... Fix up trivial conflicts in arch/arm/mach-u300/Kconfig manually
| * | ARM: gpio: omap: convert drivers to use asm/gpio.h rather than mach/gpio.hRussell King2011-08-081-1/+1
| |/ | | | | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | gpio/omap: fix build error with certain OMAP1 configsJanusz Krzysztofik2011-10-131-1/+1
|/ | | | | | | | | | | | | | | | | | | With commit f64ad1a0e21a, "gpio/omap: cleanup _set_gpio_wakeup(), remove ifdefs", access to build time conditionally omitted 'suspend_wakeup' member of the 'gpio_bank' structure has been placed unconditionally in function _set_gpio_wakeup(), which is always built. This resulted in the driver compilation broken for certain OMAP1, i.e., non-OMAP16xx, configurations. Really required or not in previously excluded cases, define this structure member unconditionally as a fix. Tested with a custom OMAP1510 only configuration. Signed-off-by: Janusz Krzysztofik <jkrzyszt@tis.icnet.pl> Acked-by: Kevin Hilman <khilman@ti.com> Tested-by: Aaro Koskinen <aaro.koskinen@iki.fi> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* Merge branch 'gpio/next' of git://git.secretlab.ca/git/linux-2.6Linus Torvalds2011-07-221-570/+153
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'gpio/next' of git://git.secretlab.ca/git/linux-2.6: (61 commits) gpio/mxc/mxs: fix build error introduced by the irq_gc_ack() renaming mcp23s08: add i2c support mcp23s08: isolate spi specific parts mcp23s08: get rid of setup/teardown callbacks gpio/tegra: dt: add binding for gpio polarity mcp23s08: remove unused work queue gpio/da9052: remove a redundant assignment for gpio->da9052 gpio/mxc: add device tree probe support ARM: mxc: use ARCH_NR_GPIOS to define gpio number gpio/mxc: get rid of the uses of cpu_is_mx() gpio/mxc: add missing initialization of basic_mmio_gpio shadow variables gpio: Move mpc5200 gpio driver to drivers/gpio GPIO: DA9052 GPIO module v3 gpio/tegra: Use engineering names in DT compatible property of/gpio: Add new method for getting gpios under different property names gpio/dt: Refine GPIO device tree binding gpio/ml-ioh: fix off-by-one for displaying variable i in dev_err gpio/pca953x: Deprecate meaningless device-tree bindings gpio/pca953x: Remove dynamic platform data pointer gpio/pca953x: Fix IRQ support. ...
| * gpio/omap: cleanup show revision, remove cpu_is checks, display only onceKevin Hilman2011-06-161-8/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove cpu_is_* checks from gpio_show_revision() by passing in the revision address offset from platform data. SoCs with no revision register (15xx, 7xx, and all MPUIOs) use -1 (actually, USHRT_MAX) to signify no register. While here, all GPIO banks are assumed to be the same revision, so fix show_revision() to only show the revision for the first bank it finds. This removes duplicate GPIO revision prints during boot. Thanks to Charulatha V <charu@ti.com> for finding/fixing a few -1s that were missed in the original patch. Signed-off-by: Kevin Hilman <khilman@ti.com>
| * gpio/omap: debounce remove SoC specific registers, use pdataKevin Hilman2011-06-161-12/+3
| | | | | | | | | | | | Use register offsets passed in from pdata for accessing debounce registers. Signed-off-by: Kevin Hilman <khilman@ti.com>
| * gpio/omap: cleanup _set_gpio_wakeup(), remove ifdefsKevin Hilman2011-06-161-34/+16
| | | | | | | | | | | | | | | | | | | | | | | | Make _set_gpio_wakeup() generic by removing ifdefs. Code for the various SoCs/bank-methods was already the same, except for the non-wakeup GPIO checking. But that flag is set on a per-SoC basis, so can be used for all SoCs. While here, use dev_err() and remove GPIO bank calculation assumption based on subtracting bank pointers. Signed-off-by: Kevin Hilman <khilman@ti.com>
| * gpio/omap: remove useless gpio_valid() & check_gpio() checksKevin Hilman2011-06-161-45/+0
| | | | | | | | | | | | | | | | These functions are useless. They are only called in a few places, and where they are called, the GPIO has already been converted from an IRQ or masked, so these functions will never fail. Signed-off-by: Kevin Hilman <khilman@ti.com>
| * gpio/omap: convert MPUIO IRQ over to generic irq_chipKevin Hilman2011-06-161-44/+30
| | | | | | | | | | | | | | | | MPUIO banks have their own dedicated IRQ chip interface, separate from the "normal" GPIO banks. Convert the MPUIO IRQ chip over to using the new generic IRQ chip interface. Signed-off-by: Kevin Hilman <khilman@ti.com>
| * gpio/omap: conslidate enable/disable of GPIO IRQs, remove ifdefsKevin Hilman2011-06-161-99/+30
| | | | | | | | | | | | | | | | | | | | Cleanup GPIO IRQ enable/disable handling by removing SoC-specific Also split enable/disable IRQ into separate functions for better readability and also facilitate potentially moving to generic irq_chip in the future. Signed-off-by: Kevin Hilman <khilman@ti.com>
| * gpio/omap: consolidate IRQ status handling, remove #ifdefsKevin Hilman2011-06-161-61/+5
| | | | | | | | | | | | | | | | | | Cleanup IRQ status handling by passing IRQ status register offsets via platform data. Cleans up clearing of GPIO IRQ status and GPIO ISR handler. Signed-off-by: Kevin Hilman <khilman@ti.com>
| * gpio/omap: consolidate direction, input, output, remove #ifdefsKevin Hilman2011-06-161-200/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add register offset fields to GPIO platform_data for registers. This patch adds registers that control direction, input and output data. Using these register offsets in the common driver allows removal of #ifdefs and greatly improves readability. Also create dedicated data out functions: one for banks with dedicated set/clear registers, and another for banks with a single mask register. Signed-off-by: Kevin Hilman <khilman@ti.com>
| * gpio/omap: remove get_gpio_bank()Charulatha V2011-06-161-27/+2
| | | | | | | | | | | | | | use chip info to get the pointer to the struct gpio_bank for a given GPIO bank and remove get_gpio_bank(). Signed-off-by: Charulatha V <charu@ti.com>
| * gpio/omap: replace get_gpio_index() by using bank widthKevin Hilman2011-06-161-25/+17
| | | | | | | | | | | | | | The get_gpio_index() function, littered with cpu_is_* checks can be easily replaced by using bitops based on the GPIO bank width. Do so. Signed-off-by: Kevin Hilman <khilman@ti.com>
| * gpio/omap: _get_gpio_irqbank_mask: replace hard-coded mask with bank->widthKevin Hilman2011-06-161-7/+1
| | | | | | | | | | | | | | Replace hard-coded mask values with bank->width which is already coming from platform_data. Signed-off-by: Kevin Hilman <khilman@ti.com>
| * gpio/omap: move bank width into struct gpio_bankKevin Hilman2011-06-161-7/+6
| | | | | | | | | | | | | | | | | | Rather than having a file-global bank_width variable, move it into struct gpio_bank so it can be bank-specific. Note the bank width is already passed per-bank via platform_data, so current code would be incorrect if any banks had different width. Signed-off-by: Kevin Hilman <khilman@ti.com>
| * gpio/omap: remove MPUIO handling from _clear_gpio_irqbank()Kevin Hilman2011-06-161-6/+0
| | | | | | | | | | | | | | | | | | | | | | Remove the OMAP1 #ifdef and MPUIO special case for _clear_gpio_irqbank() The MPUIOs do not need a register access to ack/clear the IRQ status, since reading the IRQ status clears it. In addition, the MPUIO irq_chip has an empty ack method, so _clear_gpio_irqbank() is never used for MPUIOs. Signed-off-by: Kevin Hilman <khilman@ti.com>
| * gpio/omap: _clear_gpio_irqbank: fix flushing of posted writeKevin Hilman2011-06-161-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In commit 78a1a6d3411de1a8b0dc1cb92754b5f12f251912 (ARM: OMAP4: Update the GPIO support) braces were mistakenly added to included the register read-back inside the cpu_is_* checking. Remove the braces, ensuring that a register read-back is done, even when the IRQSTATUS2 register is not written. Note that the register read-back might be IRQSTATUS1 or IRQSTATUS2 depending on the CPU, but a read-back of any register in that region will cause a flush of the posted writes. Signed-off-by: Kevin Hilman <khilman@ti.com>
* | gpio/omap4: Fix missing interrupts during device wakeup due to IOPAD.Ambresh K2011-06-161-2/+3
|/ | | | | | | | | | | | | | | If gpio pins from bank[2-5] are marked as wakeup enable and if the wake is through gpio IO pad wakeup, then that wakeup gpio interrupt is lost. In the current implementation, GPIO driver stores the context of DATAIN of all the gpio in the bank. During GPIO resuming, it checks DATAIN with wakeup enabled pins of gpio bank. If there is status change, then manually toggle GPIO_LEVELDETECT to generate pseudo interrupt. Reported-by: Philippe Mazet <p-mazet@ti.com> Tested-by: Philippe Mazet <p-mazet@ti.com> Signed-off-by: Ambresh K <ambresh@ti.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* GPIO: OMAP: add locking around calls to _set_gpio_triggeringColin Cross2011-06-061-0/+9
| | | | | | | | | | _set_gpio_triggering uses read-modify-write on bank registers, lock bank->lock around all calls to it to prevent register corruption if two cpus access gpios in the same bank at the same time. Signed-off-by: Colin Cross <ccross@android.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* GPIO: OMAP: fix setting IRQWAKEN bits for OMAP4Colin Cross2011-06-061-10/+2
| | | | | | | | | | | | Setting the IRQWAKEN bit was overwriting previous IRQWAKEN bits, causing only the last bit set to take effect, resulting in lost wakeups when the GPIO controller is in idle. Replace direct writes to IRQWAKEN with MOD_REG_BIT calls to perform a read-modify-write on the register. Signed-off-by: Colin Cross <ccross@android.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
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