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* amd64_edac: Correct node interleaving removalBorislav Petkov2011-03-171-4/+4
| | | | | | | | | When node interleaving is enabled, a subset of the addr[14:12] bits has to be removed in order to get the normalized DCT address of the DRAM channel. The actual number of bits to remove is determined by F1x[1, 0][7C:40][IntlvEn]. Do this correctly. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
* amd64_edac: Add support for interleaved region swappingBorislav Petkov2011-03-172-0/+40
| | | | | | | | | On revC3 and revE Fam10h machines and later, non-interleaved graphics framebuffer memory under the 16G mark can be swapped with a region located at the bottom of memory so that the GPU can use the interleaved region and thus two channels. Add support for that. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
* amd64_edac: Unify get_error_addressBorislav Petkov2011-03-172-15/+13
| | | | | | | | | The address bits from MC4_STATUS differ only between K8 and the rest so no need for a per-family method. No functional change. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
* amd64_edac: Simplify decoding pathBorislav Petkov2011-03-173-65/+35
| | | | | | | | | Use the struct mce directly instead of copying from it into a custom struct err_regs. No functionality change. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
* amd64_edac: Adjust channel counting to F15hBorislav Petkov2011-03-171-7/+6
| | | | | | | The only difference is that F10h used to sport ganged DCTs and F15h doesn't so adjust the F10h routine and reuse it. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
* amd64_edac: Cleanup old defines cruftBorislav Petkov2011-03-172-76/+22
| | | | | | Remove unused defines, drop family names from define names. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
* amd64_edac: Cleanup NBSH cruftBorislav Petkov2011-03-173-27/+8
| | | | | | | | | Remove reporting of errors with UC bit set - this is done by the MCE decoding code anyway and this driver deals with DRAM ECC errors only. UC (NB uncorrectable error) doesn't necessarily mean it is a DRAM error. Remove unused macros while at it. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
* amd64_edac: Cleanup NBCFG handlingBorislav Petkov2011-03-172-30/+24
| | | | | | | | | The fact whether we are chipkill capable or not does not have any bearing when computing the channel index on a ganged DCT configuration so remove that. Also, simplify debug statements. Finally, remove old error injection leftovers, while at it. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
* amd64_edac: Cleanup NBCTL codeBorislav Petkov2011-03-172-14/+8
| | | | | | | | | Remove family names from macro names, drop single bit defines and comment their meaning instead. No functional change. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
* amd64_edac: Cleanup DCT Select Low/High codeBorislav Petkov2011-03-172-22/+22
| | | | | | | | | Shorten macro names, remove family name from macros, fix macro arguments, shorten debug strings. No functionality change. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
* amd64_edac: Cleanup Dram Configuration registers handlingBorislav Petkov2011-03-172-37/+24
| | | | | | | | | | | | | * Restrict DCT ganged mode check since only Fam10h supports it * Adjust DRAM type detection for BD since it only supports DDR3 * Remove second and thus unneeded DCLR read in k8_early_channel_count() - we do that in read_mc_regs() * Cleanup comments and remove family names from register macros * Remove unused defines There should be no functional change resulting from this patch. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
* amd64_edac: Cleanup DBAM handlingBorislav Petkov2011-03-171-19/+8
| | | | | | | | Do not read DBAM regs twice and simplify code around them. There should be no functional change resulting from this patch. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
* amd64_edac: Replace huge bitmasks with a macroBorislav Petkov2011-03-171-10/+9
| | | | | | Replace hard to read hex constants with a continuous masks macro. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
* amd64_edac: Sanitize f10_get_base_addr_offsetBorislav Petkov2011-03-172-48/+50
| | | | | | | | | | | | This function maps the system address to the normalized DCT address. Document what the code does for more clarity and wrap insane bitmasks in a more understandable macro which generates them. Also, reduce number of arguments passed to the function. Finally, rename this function to what it actually does. No functional change. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
* amd64_edac: Sanitize channel extractionBorislav Petkov2011-03-171-50/+34
| | | | | | | | | | Cleanup and simplify f10_determine_channel(); make it more readable. Also drop f10_map_intlv_en_to_shift() in favor of simply counting the bits in F1x124[DramIntlvEn] which is equivalent. There should be no functionality change resulting from this patch. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
* amd64_edac: Cleanup chipselect handlingBorislav Petkov2011-03-172-238/+136
| | | | | | | | | | | | Add a struct representing the DRAM chip select base/limit register pairs. Concentrate all CS handling in a single function. Also, add CS looping macros for cleaner, more readable code. While at it, adjust code to F15h. Finally, do smaller macro names cleanups (remove family names from register macros) and debug messages clarification. No functional change. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
* amd64_edac: Cleanup DHAR handlingBorislav Petkov2011-03-172-24/+23
| | | | | | Adjust to F15h, simplify code, fixup macros. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
* amd64_edac: Remove DRAM base/limit subfields cachingBorislav Petkov2011-03-172-188/+115
| | | | | | | | | | | | | | | | | Add a struct representing the DRAM base/limit range pairs and remove all cached subfields. Replace them with accessor functions, which actually saves us some space: text data bss dec hex filename 14712 1577 336 16625 40f1 drivers/edac/amd64_edac_mod.o.after 14831 1609 336 16776 4188 drivers/edac/amd64_edac_mod.o.before Also, it simplifies the code a lot allowing to merge the K8 and F10h routines. No functional change. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
* amd64_edac: Add support for F15h DCT PCI config accessesBorislav Petkov2011-03-173-75/+146
| | | | | | | | | | | | F15h "multiplexes" between the configuration space of the two DRAM controllers by toggling D18F1x10C[DctCfgSel] while F10h has a different set of registers for DCT0, and DCT1 in extended PCI config space. Add DCT configuration space accessors per family thus wrapping all the different access prerequisites. Clean up code while at it, shorten names. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
* EDAC: Shut up sysfs registration debug codeBorislav Petkov2011-03-171-13/+13
| | | | | | | | Raise the debug level of these routines so that their output get issued out only when the highest debug level is selected. Otherwise, don't pollute driver debug output. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
* amd64_edac: Fix DIMMs per DCTs outputBorislav Petkov2011-02-101-20/+8
| | | | | | | | | | | | amd64_debug_display_dimm_sizes() reports the distribution of the DIMMs on each DRAM controller and its chip select sizes. Thus, the last don't have anything to do with whether we're running in ganged DCT mode or not - their sizes don't change all of a sudden. Fix that by removing the ganged-check and dump DCT0's config for DCT1 when in ganged mode since they're identical. Reported-and-tested-by: Markus Trippelsdorf <markus@trippelsdorf.de> Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
* Merge branch 'for-next' of ↵Linus Torvalds2011-01-135-10/+10
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial * 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial: (43 commits) Documentation/trace/events.txt: Remove obsolete sched_signal_send. writeback: fix global_dirty_limits comment runtime -> real-time ppc: fix comment typo singal -> signal drivers: fix comment typo diable -> disable. m68k: fix comment typo diable -> disable. wireless: comment typo fix diable -> disable. media: comment typo fix diable -> disable. remove doc for obsolete dynamic-printk kernel-parameter remove extraneous 'is' from Documentation/iostats.txt Fix spelling milisec -> ms in snd_ps3 module parameter description Fix spelling mistakes in comments Revert conflicting V4L changes i7core_edac: fix typos in comments mm/rmap.c: fix comment sound, ca0106: Fix assignment to 'channel'. hrtimer: fix a typo in comment init/Kconfig: fix typo anon_inodes: fix wrong function name in comment fix comment typos concerning "consistent" poll: fix a typo in comment ... Fix up trivial conflicts in: - drivers/net/wireless/iwlwifi/iwl-core.c (moved to iwl-legacy.c) - fs/ext4/ext4.h Also fix missed 'diabled' typo in drivers/net/bnx2x/bnx2x.h while at it.
| * i7core_edac: fix typos in commentsDavid Sterba2010-12-281-3/+3
| | | | | | | | Signed-off-by: Jiri Kosina <jkosina@suse.cz>
| * Merge branch 'master' into for-nextJiri Kosina2010-12-225-13/+15
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: MAINTAINERS arch/arm/mach-omap2/pm24xx.c drivers/scsi/bfa/bfa_fcpim.c Needed to update to apply fixes for which the old branch was too outdated.
| * | tree-wide: fix comment/printk typosUwe Kleine-König2010-11-014-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | "gadget", "through", "command", "maintain", "maintain", "controller", "address", "between", "initiali[zs]e", "instead", "function", "select", "already", "equal", "access", "management", "hierarchy", "registration", "interest", "relative", "memory", "offset", "already", Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
* | | Merge branch 'mce-for-linus' of ↵Linus Torvalds2011-01-074-118/+359
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp * 'mce-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp: EDAC, MCE: Fix NB error formatting EDAC, MCE: Use BIT_64() to eliminate warnings on 32-bit EDAC, MCE: Enable MCE decoding on F15h EDAC, MCE: Allow F15h bank 6 MCE injection EDAC, MCE: Shorten error report formatting EDAC, MCE: Overhaul error fields extraction macros EDAC, MCE: Add F15h FP MCE decoder EDAC, MCE: Add F15 EX MCE decoder EDAC, MCE: Add an F15h NB MCE decoder EDAC, MCE: No F15h LS MCE decoder EDAC, MCE: Add F15h CU MCE decoder EDAC, MCE: Add F15h IC MCE decoder EDAC, MCE: Add F15h DC MCE decoder EDAC, MCE: Select extended error code mask
| * | | EDAC, MCE: Fix NB error formattingBorislav Petkov2011-01-071-7/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Minor formatting fixup since the information which core was associated with the MCE is not always valid. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
| * | | EDAC, MCE: Use BIT_64() to eliminate warnings on 32-bitRandy Dunlap2011-01-071-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Building for X86_32 produces shift count warnings, so use BIT_64() to eliminate the warnings. drivers/edac/mce_amd.c:778: warning: left shift count >= width of type drivers/edac/mce_amd.c:778: warning: left shift count >= width of type Signed-off-by: Randy Dunlap <randy.dunlap@oracle.com> Cc: Doug Thompson <dougthompson@xmission.com> Cc: bluesmoke-devel@lists.sourceforge.net Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
| * | | EDAC, MCE: Enable MCE decoding on F15hBorislav Petkov2011-01-071-6/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that everything is inplace, enable MCE decoding on F15h. Make initcall routine a bit more readable. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
| * | | EDAC, MCE: Allow F15h bank 6 MCE injectionBorislav Petkov2011-01-071-4/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | F15h adds a sixth MCE bank: adjust bank number check in the injection code. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
| * | | EDAC, MCE: Shorten error report formattingBorislav Petkov2011-01-071-22/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Shorten up MCi_STATUS flags and add BD's new deferred and poison types. Also, simplify formatting. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
| * | | EDAC, MCE: Overhaul error fields extraction macrosBorislav Petkov2011-01-073-54/+43
| | | | | | | | | | | | | | | | | | | | | | | | Make macro names shorter thus making code shorter and more clear. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
| * | | EDAC, MCE: Add F15h FP MCE decoderBorislav Petkov2011-01-071-0/+44
| | | | | | | | | | | | | | | | | | | | | | | | Add decoder for FP MCEs. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
| * | | EDAC, MCE: Add F15 EX MCE decoderBorislav Petkov2011-01-071-7/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Integrate the single FIROB signature into an expanded table along with the new BD MCE types. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
| * | | EDAC, MCE: Add an F15h NB MCE decoderBorislav Petkov2011-01-071-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | by (almost) reusing the F10h one since the signatures are the same. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
| * | | EDAC, MCE: No F15h LS MCE decoderBorislav Petkov2011-01-071-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | F15h BD doesn't generate LS MCEs so warn about it. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
| * | | EDAC, MCE: Add F15h CU MCE decoderBorislav Petkov2011-01-071-1/+61
| | | | | | | | | | | | | | | | | | | | | | | | | | | | MCE bank 2 is redefined from a BU to a CU (Combined Unit) bank on F15h. Add a decoder function for CU MCEs. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
| * | | EDAC, MCE: Add F15h IC MCE decoderBorislav Petkov2011-01-072-4/+51
| | | | | | | | | | | | | | | | | | | | | | | | Add support for decoding F15h IC MCEs. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
| * | | EDAC, MCE: Add F15h DC MCE decoderBorislav Petkov2011-01-072-19/+62
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a decoder for F15h DC MCEs to support the new types of DC MCEs introduced by the BD microarchitecture. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
| * | | EDAC, MCE: Select extended error code maskBorislav Petkov2011-01-071-4/+9
| | |/ | |/| | | | | | | | | | | | | | | | | | | F15h enlarges the extended error code of an MCE to a 5-bit field (MCi_STATUS[20:16]). Add a mask variable which default 0xf is overridden on F15h. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
* | | amd64_edac: Disable DRAM ECC injection on K8Borislav Petkov2011-01-071-2/+3
| | | | | | | | | | | | | | | | | | | | | K8 does not allow for an atomic RMW to a cacheline as F10h does so disable the error injection interface for it. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
* | | EDAC: Fixup scrubrate manipulationBorislav Petkov2011-01-077-63/+52
| | | | | | | | | | | | | | | | | | | | | | | | | | | Make the ->{get|set}_sdram_scrub_rate return the actual scrub rate bandwidth it succeeded setting and remove superfluous arg pointer used for that. A negative value returned still means that an error occurred while setting the scrubrate. Document this for future reference. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
* | | amd64_edac: Remove two-stage initializationBorislav Petkov2011-01-071-100/+68
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that all prerequisites are in place, drop the two-stage driver instances initialization in favor of the following simple init sequence: 1. Probe PCI device: we only test ECC capabilities here and if none exit early. 2. If the hw supports ECC and it is/can be enabled, we init the per-node instance. Remove "amd64_" prefix from static functions touched, while at it. There actually should be no visible functional change resulting from this patch. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
* | | amd64_edac: Check ECC capabilities initiallyBorislav Petkov2011-01-071-66/+75
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rework the code to check the hardware ECC capabilities at PCI probing time. We do all further initialization only if we actually can/have ECC enabled. While at it: 0. Fix function naming. 1. Simplify/clarify debug output. 2. Remove amd64_ prefix from the static functions 3. Reorganize code. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
* | | amd64_edac: Carve out ECC-related hw settingsBorislav Petkov2011-01-072-24/+49
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is in preparation for the init path reorganization where we want only to 1) test whether a particular node supports ECC 2) can it be enabled and only then do the necessary allocation/initialization. For that, we need to decouple the ECC settings of the node from the instance's descriptor. The should be no functional change introduced by this patch. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
* | | amd64_edac: Remove PCI ECS enabling functionsBorislav Petkov2011-01-072-59/+0
| | | | | | | | | | | | | | | | | | | | | PCI ECS is being enabled by default since 2.6.26 on AMD so this code is just superfluous now, remove it. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
* | | amd64_edac: Remove explicit Kconfig PCI dependencyBorislav Petkov2011-01-071-4/+4
| | | | | | | | | | | | | | | | | | AMD_NB pulls in the dependency on PCI. Clarify/fix help text while at it. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
* | | amd64_edac: Allocate driver instances dynamicallyBorislav Petkov2011-01-072-18/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | Remove static allocation in favor of dynamically allocating space for as many driver instances as northbridges present on the system. There should be no functional change resulting from this patch. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
* | | amd64_edac: Rework printk macrosBorislav Petkov2011-01-075-107/+87
| | | | | | | | | | | | | | | | | | | | | Add a macro per printk level, shorten up error messages. Add relevant information to KERN_INFO level. No functional change. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
* | | amd64_edac: Rename CPU PCI devicesBorislav Petkov2011-01-073-95/+77
| | | | | | | | | | | | | | | | | | | | | Rename variables representing PCI devices to their BKDG names for faster search and shorter, clearer code. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
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