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path: root/drivers/clk/renesas/renesas-cpg-mssr.c
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* clk: renesas: cpg-mssr: Add R8A77995 supportGeert Uytterhoeven2017-08-161-0/+6
| | | | | | | | | | | | | Add R-Car D3 (R8A77995) Clock Pulse Generator / Module Standby and Software Reset support, using the CPG/MSSR driver core and the common R-Car Gen3 CPG code. Based on the R-Car Series, 3rd Generation Hardware User's Manual, Rev. 0.55, Jun. 30, 2017. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Stephen Boyd <sboyd@codeaurora.org> Acked-by: Rob Herring <robh@kernel.org>
* clk: renesas: cpg-mssr: Use of_device_get_match_data() helperGeert Uytterhoeven2017-06-191-1/+1
| | | | | | | | | | | | | | If CONFIG_OF=n: drivers/clk/renesas/renesas-cpg-mssr.c: In function ‘cpg_mssr_probe’: drivers/clk/renesas/renesas-cpg-mssr.c:702: warning: dereferencing ‘void *’ pointer drivers/clk/renesas/renesas-cpg-mssr.c:702: error: request for member ‘data’ in something not a structure or union To fix this, use the of_device_get_match_data() helper, for which a dummy version is provided if CONFIG_OF=n. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* clk: renesas: r8a7794: Add new CPG/MSSR driverGeert Uytterhoeven2017-05-241-0/+6
| | | | | | | | | | | Add a new R-Car E2 Clock Pulse Generator / Module Standby and Software Reset driver, using the CPG/MSSR driver core. This will enable support for module resets, which are not supported by the existing driver. The old driver can still be used through a Kconfig option, to preserve backward compatibility with old DTBs. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
* clk: renesas: r8a7792: Add new CPG/MSSR driverGeert Uytterhoeven2017-05-241-0/+6
| | | | | | | | | | | Add a new R-Car V2H Clock Pulse Generator / Module Standby and Software Reset driver, using the CPG/MSSR driver core. This will enable support for module resets, which are not supported by the existing driver. The old driver can still be used through a Kconfig option, to preserve backward compatibility with old DTBs. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
* clk: renesas: r8a7791/r8a7793: Add new CPG/MSSR driverGeert Uytterhoeven2017-05-241-0/+11
| | | | | | | | | | | | Add a new R-Car M2-W/N Clock Pulse Generator / Module Standby and Software Reset driver, using the CPG/MSSR driver core. This will enable support for module resets, which are not supported by the existing driver. The old driver can still be used through a Kconfig option, to preserve backward compatibility with old DTBs. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
* clk: renesas: r8a7790: Add new CPG/MSSR driverGeert Uytterhoeven2017-05-241-0/+6
| | | | | | | | | | | Add a new R-Car H2 Clock Pulse Generator / Module Standby and Software Reset driver, using the CPG/MSSR driver core. This will enable support for module resets, which are not supported by the existing driver. The old driver can still be used through a Kconfig option, to preserve backward compatibility with old DTBs. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
* clk: renesas: Rework Kconfig and Makefile logicGeert Uytterhoeven2017-05-241-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The goals are to: - Allow precise control over and automatic selection of which (sub)drivers are used for which SoC (which may change in the future), - Allow adding support for new SoCs easily, - Allow compile-testing of all (sub)drivers, - Keep driver selection logic in the subsystem-specific Kconfig, independent from the architecture-specific Kconfig (i.e. no "select" from arch/arm64/Kconfig.platforms), to avoid dependencies. This is implemented by: - Introducing Kconfig symbols for all drivers and sub-drivers, - Introducing the Kconfig symbol CLK_RENESAS, which is enabled automatically when building for a Renesas ARM platform, and which enables all required drivers without interaction of the user, based on SoC-specific ARCH_* symbols, - Allowing the user to enable any Kconfig symbol manually if COMPILE_TEST is enabled, - Using the new Kconfig symbols instead of the ARCH_* symbols to control compilation in the Makefile, - Always entering drivers/clk/renesas/ during the build. Note that currently not all (sub)drivers are enabled for compile-testing, as they depend on independent fixes in other subsystems. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Stephen Boyd <sboyd@codeaurora.org>
* clk: renesas: cpg-mssr: Initialize error pointer using ERR_PTR()Geert Uytterhoeven2017-05-241-1/+1
| | | | | | | | | | | Coccinelle warns: drivers/clk/renesas/renesas-cpg-mssr.c:323:14-21: ERROR: PTR_ERR applied after initialization to constant on line 260 Initialize clk using ERR_PTR(-ENOTSUPP) instead of NULL to fix this. Reported-by: kbuild test robot <fengguang.wu@intel.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
* clk: renesas: Use pm_clk_no_clocks() helper i.s.o. direct accessGeert Uytterhoeven2017-05-151-1/+1
| | | | | | | | | | | | The pm_subsys_data.clock_list member exists only if CONFIG_PM_CLK=y. Hence direct accesses to this field break compile-testing on platforms where CONFIG_PM_CLK=n. To fix this, use the pm_clk_no_clocks() helper instead, for which a dummy version is provided if CONFIG_PM_CLK=n. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Simon Horman <simon.horman@netronome.com>
* clk: renesas: cpg-mssr: Add support for fixing up clock tablesGeert Uytterhoeven2017-03-301-0/+50
| | | | | | | | | | | | | | | | | The same SoC may have different clocks and/or module clock parents, depending on SoC revision. One option is to use different sets of clock tables for each SoC revision. However, if the differences are small, it is much more space-efficient to have a single set of clock tables, and fix those up at runtime instead. Hence provide three helpers: - Two helpers to NULLify core and module clocks that do not exist on some revisions (NULLified clocks are skipped during the registration phase), - One helper to reparent module clocks that have different clock parents. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
* clk: renesas: cpg-mssr: Add support for reset controlGeert Uytterhoeven2017-01-271-0/+126
| | | | | | | | | | | | | Add optional support for the Reset Control feature of the Renesas Clock Pulse Generator / Module Standby and Software Reset module on R-Car Gen2, R-Car Gen3, and RZ/G1 SoCs. This allows to reset SoC devices using the Reset Controller API. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Philipp Zabel <p.zabel@pengutronix.de> Acked-by: Stephen Boyd <sboyd@codeaurora.org> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
* clk: renesas: cpg-mssr: Rename cpg_mssr_priv.mstp_lockGeert Uytterhoeven2017-01-271-5/+5
| | | | | | | | The spinlock is used to protect Read-Modify-Write register accesses, which won't be limited to SMSTPCR register accesses. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Stephen Boyd <sboyd@codeaurora.org>
* clk: renesas: cpg-mssr: Document suitability for RZ/G1Geert Uytterhoeven2017-01-271-1/+1
| | | | | | | | | The Renesas CPG/MSSR driver is already in active use for RZ/G1 since commits c0b2d75d2a4bf6a3 ("clk: renesas: cpg-mssr: Add R8A7743 support") and 9127d54bb8947159 ("clk: renesas: cpg-mssr: Add R8A7745 support"). Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Stephen Boyd <sboyd@codeaurora.org>
* clk: renesas: cpg-mssr: Migrate to CLK_IS_CRITICALGeert Uytterhoeven2017-01-231-9/+2
| | | | | | | | | | | | | | | | | | When the Renesas CPG/MSSR driver was introduced, it was anticipated that critical clocks would be handled through a new CLK_ENABLE_HAND_OFF flag soon. However, CLK_ENABLE_HAND_OFF never made it upstream. Instead, commit 32b9b10961860860 ("clk: Allow clocks to be marked as CRITICAL") introduced CLK_IS_CRITICAL, a flag with slightly differing semantics. Still, it can be used to prevent e.g. the GIC module clock from being turned off, until the GIC-400 driver has full support for Runtime PM. Hence migrate the Renesas CPG/MSSR driver from CLK_ENABLE_HAND_OFF to CLK_IS_CRITICAL. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Stephen Boyd <sboyd@codeaurora.org>
* clk: renesas: cpg-mssr: Add R8A7745 supportSergei Shtylyov2016-11-101-0/+6
| | | | | | | | | | | | | Add RZ/G1E (R8A7745) Clock Pulse Generator / Module Standby and Software Reset support, using the CPG/MSSR driver core and the common R-Car Gen2 (and RZ/G) code. Based on the proof-of-concept R8A7791 CPG/MSSR patch by Geert Uytterhoeven <geert+renesas@glider.be>. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
* clk: renesas: cpg-mssr: Add R8A7743 supportSergei Shtylyov2016-11-101-0/+6
| | | | | | | | | | | | | Add RZ/G1M (R8A7743) Clock Pulse Generator / Module Standby and Software Reset support, using the CPG/MSSR driver core and the common R-Car Gen2 (and RZ/G) code. Based on the proof-of-concept R8A7791 CPG/MSSR patch by Geert Uytterhoeven <geert+renesas@glider.be>. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
* clk: renesas: cpg-mssr: Remove bogus commas from error messagesGeert Uytterhoeven2016-11-021-2/+2
| | | | Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
* clk: renesas: cpg-mssr: Fix inverted debug checkGeert Uytterhoeven2016-10-171-2/+2
| | | | | | | | The intention was to enable the checks if debugging is enabled, not disabled. Fixes: f793d1e51705b276 ("clk: shmobile: Add new CPG/MSSR driver core") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
* clk: renesas: cpg-mssr: Always use readl()/writel()Geert Uytterhoeven2016-10-171-5/+4
| | | | | | | | | The Renesas CPG/MSSR driver core uses a mix of clk_readl()/clk_writel() and readl()/writel() to access the clock registers. Settle on the generic readl()/writel(). Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Stephen Boyd <sboyd@codeaurora.org>
* clk: renesas: cpg-mssr: Add support for R-Car M3-WGeert Uytterhoeven2016-06-061-0/+6
| | | | | | | | Initial support for R-Car M3-W (r8a7796), including basic core clocks, and SCIF2 (console) and INTC-AP (GIC) module clocks. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Tested-by: Simon Horman <horms+renesas@verge.net.au>
* clk: renesas: cpg-mssr: Use always-on governor for Clock DomainGeert Uytterhoeven2016-04-281-1/+1
| | | | | | | | | | | | | | | | As a pure Clock Domain does not have the concept of powering the domain itself, the CPG/MSTP driver does not provide power_off() and power_on() callbacks. However, the genpd core may still perform a dummy power down, causing /sys/kernel/debug/pm_genpd/pm_genpd_summary to report the domain's status being "off-0". Use the always-on governor to make sure the domain is never powered down, and always shows up as "on" in pm_genpd_summary. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
* clk: renesas: cpg-mssr: Postpone call to pm_genpd_init()Geert Uytterhoeven2016-04-281-1/+1
| | | | | | | | | All local setup of the generic_pm_domain structure should have been completed before calling pm_genpd_init(). Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
* clk: renesas: cpg-mssr: Export cpg_mssr_{at,de}tach_dev()Geert Uytterhoeven2016-04-201-6/+12
| | | | | | | | | | | | | | | | | | | | The R-Car SYSC PM Domain driver has to power manage devices in power areas using clocks. To reuse code and to share knowledge of clocks suitable for power management, this is ideally done through the existing cpg_mssr_attach_dev() and cpg_mssr_detach_dev() callbacks. Hence these callbacks can no longer rely on their "domain" parameter pointing to the CPG/MSSR Clock Domain. To handle this, keep a pointer to the clock domain in a static variable. cpg_mssr_attach_dev() has to support probe deferral, as the R-Car SYSC PM Domain may be initialized, and devices may be added to it, before the CPG/MSSR Clock Domain is initialized. Dummy callbacks are provided for the case where CPG/MSTP support is not included, so the rcar-sysc driver won't have to care about this. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
* clk: renesas: cpg-mssr: Drop check for CONFIG_PM_GENERIC_DOMAINS_OFGeert Uytterhoeven2016-04-071-11/+0
| | | | | | | | | | As of commit 71d076ceb245f0d9 ("ARM: shmobile: Enable PM and PM_GENERIC_DOMAINS for SoCs with PM Domains"), CONFIG_PM_GENERIC_DOMAINS_OF is always enabled for SoCs with a CPG/MSSR block. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
* clk: renesas: cpg-mssr: add generic support for read-only DIV6 clocksWolfram Sang2016-04-061-6/+12
| | | | | | | | | Gen3 has two clocks (OSC and R) which look like a DIV6 clock but their divider value is read-only and depends on MD pins at bootup. Add support for such clocks by reading the value and adding a fixed clock. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
* clk: renesas: move drivers to renesas directorySimon Horman2016-03-031-0/+601
This is part of an ongoing process to migrate from ARCH_SHMOBILE to ARCH_RENESAS the motivation for which being that RENESAS seems to be a more appropriate name than SHMOBILE for the majority of Renesas ARM based SoCs. Along with the above mentioned Kconfig changes it seems appropriate to also rename directories that only hold drivers for such SoCs. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
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