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* ata: ahci_platform: fix owner module reference mismatch for scsi hostAkinobu Mita2015-01-281-2/+9
| | | | | | | | | | | | | | | | | | | The owner module reference of the ahci platform's scsi_host is initialized to libahci_platform's one, because these drivers use a scsi_host_template defined in libahci_platform. So these drivers can be unloaded even if the scsi device is being accessed. This fixes it by pushing the scsi_host_template from libahci_platform to all leaf drivers. The scsi_host_template is passed through a new argument of ahci_platform_init_host(). Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com> Signed-off-by: Tejun Heo <tj@kernel.org> Cc: Hans de Goede <hdegoede@redhat.com> Cc: Christoph Hellwig <hch@lst.de> Cc: "James E.J. Bottomley" <JBottomley@parallels.com> Cc: linux-ide@vger.kernel.org Cc: linux-scsi@vger.kernel.org
* ata: libahci: Allow using multiple regulatorsGregory CLEMENT2015-01-191-9/+5
| | | | | | | | | | | | | | | | | | The current implementation of the libahci allows using multiple PHYs but not multiple regulators. This patch adds the support of multiple regulators. Until now it was mandatory to have a PHY under a subnode, now a port subnode can contain either a regulator or a PHY (or both). In order to be able to asociate a port with a regulator the port are now a platform device in the device tree case. There was only one driver which used directly the regulator field of the ahci_host_priv structure. To preserve the bisectability the change in the ahci_imx driver was done in the same patch. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Tejun Heo <tj@kernel.org>
* ata: drop owner assignment from platform_driversWolfram Sang2014-10-201-1/+0
| | | | | | | A platform_driver does not need to set an owner, it will be populated by the driver core. Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
* ata: libahci_platform: move port_map parameters into the AHCI structureAntoine Ténart2014-07-301-2/+1
| | | | | | | | | | | | | | This patch moves force_port_map and mask_port_map into the ahci_host_priv structure. This allows to modify them into the AHCI framework. This is needed by the new dt bindings representing ports as the port_map mask is computed automatically. Parameters modifying force_port_map, mask_port_map and flags have been removed from the ahci_platform_init_host() function, and inputs in the ahci_host_priv structure are now directly filed. Signed-off-by: Antoine Ténart <antoine.tenart@free-electrons.com> Signed-off-by: Tejun Heo <tj@kernel.org>
* Merge branch 'for-3.16-fixes' of ↵Tejun Heo2014-07-301-4/+34
|\ | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata into for-3.17 The scheduled ahci platform patches depend on change in for-3.16-fixes. Pull it into for-3.17. Signed-off-by: Tejun Heo <tj@kernel.org>
| * ata: ahci_imx: warn when disabling ahci linkRussell King2014-06-241-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | When the AHCI link is disabled, it can't be re-enabled except by resetting the entire SoC. Rather than doing this silently print some kernel messages to inform the user, along with how to avoid this. tj: Put a long printf format string on a single line. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Tejun Heo <tj@kernel.org>
| * ahci: imx: manage only sata_ref_clk in imx_sata_enable[disable]Shawn Guo2014-06-191-4/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Doing suspend/resume on imx6q and imx53 boards with no SATA disk attached will trigger the following warning. ------------[ cut here ]------------ WARNING: CPU: 0 PID: 661 at drivers/ata/libahci.c:224 ahci_enable_ahci+0x74/0x8) Modules linked in: CPU: 0 PID: 661 Comm: sh Tainted: G W 3.15.0-rc5-next-20140521-000027 Backtrace: [<80011c90>] (dump_backtrace) from [<80011e2c>] (show_stack+0x18/0x1c) r6:803a22f4 r5:00000000 r4:00000000 r3:00000000 [<80011e14>] (show_stack) from [<80661e60>] (dump_stack+0x88/0xa4) [<80661dd8>] (dump_stack) from [<80028fdc>] (warn_slowpath_common+0x70/0x94) r5:00000009 r4:00000000 [<80028f6c>] (warn_slowpath_common) from [<80029024>] (warn_slowpath_null+0x24/) r8:808f68c4 r7:00000000 r6:00000000 r5:00000000 r4:e0810004 [<80029000>] (warn_slowpath_null) from [<803a22f4>] (ahci_enable_ahci+0x74/0x80) [<803a2280>] (ahci_enable_ahci) from [<803a2324>] (ahci_reset_controller+0x24/0) r8:ddcd9410 r7:80351178 r6:ddcd9444 r5:dde8b850 r4:e0810000 r3:ddf35e90 [<803a2300>] (ahci_reset_controller) from [<803a2c68>] (ahci_platform_resume_ho) r7:80351178 r6:ddcd9444 r5:dde8b850 r4:ddcd9410 [<803a2c30>] (ahci_platform_resume_host) from [<803a38f0>] (imx_ahci_resume+0x2) r5:00000000 r4:ddcd9410 [<803a38c4>] (imx_ahci_resume) from [<803511ac>] (platform_pm_resume+0x34/0x54) .... The reason is that the SATA controller has no working clock at this point, and thus ahci_enable_ahci() fails to enable the controller. In case that there is no SATA disk attached, the imx_sata_disable() gets called in ahci_imx_error_handler(), and both sata_clk and sata_ref_clk will be disabled there. Because all the imx_sata_enable() calls afterward will return immediately due to imxpriv->no_device check, the SATA controller working clock sata_clk will never get any chance to be enabled again. This is a regression caused by commit 90870d79d4f2 (ahci-imx: Port to library-ised ahci_platform). Before the commit, only sata_ref_clk is managed by the driver in enable/disable function. But after the commit, all the clocks are enabled/disabled in a row by ahci platform helpers ahci_platform_enable[disable]_clks. Since ahb_clk is a bus clock which does not have gate at all, and i.MX low-power hardware module already manages sata_clk across suspend/resume cycle, the only clock that needs to be managed by software is sata_ref_clk. So instead of using ahci_platform_enable[disable]_clks to manage all the clocks in a row from imx_sata_enable[disable], we should manage only sata_ref_clk in there. Reported-by: Fabio Estevam <fabio.estevam@freescale.com> Fixes: 90870d79d4f2 (ahci-imx: Port to library-ised ahci_platform) Signed-off-by: Shawn Guo <shawn.guo@freescale.com> Acked-by: Hans de Goede <hdegoede@redhat.com>
* | ahci: imx: add missing clk_disable_unprepare() on error in imx_sata_enable()Wei Yongjun2014-07-301-1/+3
| | | | | | | | | | | | | | | | | | Add the missing clk_disable_unprepare() before return from imx_sata_enable() in the phy reset error handling case. Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Acked-by: Shawn Guo <shawn.guo@freescale.com> Signed-off-by: Tejun Heo <tj@kernel.org>
* | ata: ahci_imx: add disable for spread-spectrumRussell King2014-07-011-1/+13
| | | | | | | | | | | | | | | | | | | | | | | | Spread-spectrum doesn't work with Cubox-i hardware, so we have to disable this feature. Add a DT property so that platforms can indicate that this feature should not be enabled. Having it as a negative property keeps existing DT files working. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Reviewed-by: Shawn Guo <shawn.guo@freescale.com> Signed-off-by: Tejun Heo <tj@kernel.org>
* | ata: ahci_imx: allow hardware parameters to be specified in DTRussell King2014-07-011-8/+160
|/ | | | | | | | | Various SATA phy parameters are board specific, and therefore need to be configured. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Reviewed-by: Shawn Guo <shawn.guo@freescale.com> Signed-off-by: Tejun Heo <tj@kernel.org>
* Merge branch 'for-3.16' of ↵Linus Torvalds2014-06-091-1/+2
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata Pull libata updates from Tejun Heo: "Nothing too interesting - another ahci platform driver variant, additional controller support, minor fixes and cleanups" * 'for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata: ahci: Add Device ID for HighPoint RocketRaid 642L ata: ep93xx: use dmaengine_prep_slave_sg api instead of internal callback ahci: add PCI ID for Marvell 88SE91A0 SATA Controller sata_fsl: remove check for CONFIG_MPC8315_DS ahci: add support for Hisilicon sata libahci_platform: add host_flags parameter in ahci_platform_init_host() ata: ahci: append new hflag AHCI_HFLAG_NO_FBS ata: use CONFIG_PM_SLEEP instead of CONFIG_PM where applicable in host drivers ata: ahci_mvebu: new driver for Marvell Armada 380 AHCI interfaces Documentation: dt-bindings: reformat and order list of ahci-platform compatibles libata-sff: remove dead code ata: SATL compliance for Inquiry Product Revision pata_octeon_cf: use devm_kzalloc() to allocate cf_port
| * libahci_platform: add host_flags parameter in ahci_platform_init_host()Kefeng Wang2014-05-141-1/+2
| | | | | | | | | | | | | | | | | | | | | | Add a dynamic host_flags argument to make ahci_platform_init_host more flexible, then remove the AHCI_HFLAGS(...) argument from some driver's ata_port_info, and pass that in as the new argument. Cc: Hans de Geode <hdegoede@redhat.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Kefeng Wang <kefeng.wang@linaro.org> Signed-off-by: Tejun Heo <tj@kernel.org>
* | ahci: imx: PLL clock needs 100us to settle downShawn Guo2014-05-191-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The commit e783c51 (ahci: imx: software workaround for phy reset issue in resume) calls imx_sata_phy_reset() to reset phy immediately after SATA MPLL is enabled. It seems working fine mostly, but fails in some case as below. ... ahci-imx 2200000.sata: failed to reset phy: -110 ahci-imx: probe of 2200000.sata failed with error -110 After talking to the designer, we learnt that when enabling i.MX6Q SATA MPLL, we need to wait 100us for it to settle down for safety. Add this required delay to fix above failure. Signed-off-by: Shawn Guo <shawn.guo@freescale.com> Tested-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Tejun Heo <tj@kernel.org>
* | ahci: imx: software workaround for phy reset issue in resumeShawn Guo2014-05-041-0/+161
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When suspending imx6q systems which have rootfs on SATA, the following error will likely be seen in resume. The SATA link will fail to come up, and it results in an unusable system across the suspend/resume cycle. $ echo mem > /sys/power/state PM: Syncing filesystems ... done. PM: Preparing system for mem sleep Freezing user space processes ... (elapsed 0.002 seconds) done. Freezing remaining freezable tasks ... (elapsed 0.002 seconds) done. PM: Entering mem sleep sd 0:0:0:0: [sda] Synchronizing SCSI cache sd 0:0:0:0: [sda] Stopping disk PM: suspend of devices complete after 61.914 msecs PM: suspend devices took 0.070 seconds PM: late suspend of devices complete after 4.906 msecs PM: noirq suspend of devices complete after 4.521 msecs Disabling non-boot CPUs ... CPU1: shutdown CPU2: shutdown CPU3: shutdown Enabling non-boot CPUs ... CPU1: Booted secondary processor CPU1 is up CPU2: Booted secondary processor CPU2 is up CPU3: Booted secondary processor CPU3 is up PM: noirq resume of devices complete after 10.486 msecs PM: early resume of devices complete after 4.679 msecs sd 0:0:0:0: [sda] Starting disk PM: resume of devices complete after 22.674 msecs PM: resume devices took 0.030 seconds PM: Finishing wakeup. Restarting tasks ... done. $ ata1: SATA link down (SStatus 1 SControl 300) ata1: SATA link down (SStatus 1 SControl 300) ata1: limiting SATA link speed to 1.5 Gbps ata1: SATA link down (SStatus 1 SControl 310) ata1.00: disabled ata1: exception Emask 0x10 SAct 0x0 SErr 0x4040000 action 0xe frozen t4 ata1: irq_stat 0x00000040, connection status changed ata1: SError: { CommWake DevExch } ata1: hard resetting link sd 0:0:0:0: rejecting I/O to offline device sd 0:0:0:0: killing request sd 0:0:0:0: rejecting I/O to offline device Aborting journal on device sda2-8. sd 0:0:0:0: rejecting I/O to offline device EXT4-fs warning (device sda2): ext4_end_bio:317: I/O error writing to inode 132577 (offset 0 size 0 starting block 26235) Buffer I/O error on device sda2, logical block 10169 ... It's caused by a silicon issue that SATA phy does not get reset by controller when coming back from LPM. The patch adds a software workaround for this issue. It enforces a software reset on SATA phy in imx_sata_enable() function, so that we can ensure SATA link will come up properly in both power-on and resume. The software reset is implemented by writing phy reset register through the phy control register bus interface. Functions imx_phy_reg_[addressing|write|read]() implement this bus interface, while imx_sata_phy_reset() performs the actually reset operation. Signed-off-by: Richard Zhu <r65037@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com> Signed-off-by: Tejun Heo <tj@kernel.org>
* | ahci: imx: add namespace for register enumsShawn Guo2014-05-041-7/+9
|/ | | | | | | | Update register enums a little bit to add proper namespace prefix, and have the names match i.MX reference manual. Signed-off-by: Shawn Guo <shawn.guo@freescale.com> Signed-off-by: Tejun Heo <tj@kernel.org>
* ahci_imx: Put #ifdef CONFIG_PM_SLEEP around suspend / resume functionsHans de Goede2014-03-061-0/+2
| | | | | | | | | | | | This fixes the following warnings when CONFIG_PM_SLEEP is not set: drivers/ata/ahci_imx.c:284:12: warning: ‘imx_ahci_suspend’ defined but not used [-Wunused-function] drivers/ata/ahci_imx.c:299:12: warning: ‘imx_ahci_resume’ defined but not used [-Wunused-function] Reported-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Cc: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Tejun Heo <tj@kernel.org>
* ahci-imx: Port to library-ised ahci_platformHans de Goede2014-02-221-204/+127
| | | | | | | | | | | | | This avoids the ugliness of creating a nested platform device from probe. While moving it around anyways, move the mk6q phy init code from probe to imx_sata_enable, as the phy needs to be re-initialized on resume too, otherwise the drive won't be recognized after resume. Tested on a wandboard i.mx6 quad. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Tejun Heo <tj@kernel.org>
* ahci: imx: fix the error handling in imx_ahci_probe()Wei Yongjun2013-12-121-1/+2
| | | | | | | | | | Release alloced resources instead of direct return from imx_ahci_probe() in the error handling case. Fixes: 4a23d1793f8e ('ahci: imx: Add i.MX53 support') Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Signed-off-by: Tejun Heo <tj@kernel.org> Acked-by: Marek Vasut <marex@denx.de>
* ahci: imx: ahci_imx_softreset() can be staticFengguang Wu2013-12-031-1/+1
| | | | | | Acked-by: Marek Vasut <marex@denx.de> Signed-off-by: Fengguang Wu <fengguang.wu@intel.com> Signed-off-by: Tejun Heo <tj@kernel.org>
* ahci: imx: Add i.MX53 supportMarek Vasut2013-12-031-58/+122
| | | | | | | | | | | | | | | Add minor adjustments to support i.MX53 SATA port as well as i.MX6Q one. The difference here is mostly the clock which need to be enabled and also the lack of need of programming IOMUXC registers on i.MX53. All of which is well handles in the clock enable/disable functions. Note that this patch also cleans up the names of the common functions, so they don't read imx6q_* but imx_* instead. Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Shawn Guo <shawn.guo@linaro.org> Cc: Richard Zhu <r65037@freescale.com> Cc: Linux-IDE <linux-ide@vger.kernel.org> Signed-off-by: Tejun Heo <tj@kernel.org>
* ahci: imx: Pull out the clock enable/disable callsMarek Vasut2013-12-031-68/+75
| | | | | | | | | | | | The same code for enabling and disabling SATA clock was found in multiple places in the driver. Implement functions that enable/disable the SATA clock and use them in such places instead of duplicating the code. Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Shawn Guo <shawn.guo@linaro.org> Cc: Richard Zhu <r65037@freescale.com> Cc: Linux-IDE <linux-ide@vger.kernel.org> Signed-off-by: Tejun Heo <tj@kernel.org>
* ahci: imx: Explicitly clear IMX6Q_GPR13_SATA_MPLL_CLK_ENMarek Vasut2013-12-031-1/+2
| | | | | | | | | | | | | | | We must clear this IMX6Q_GPR13_SATA_MPLL_CLK_EN bit on i.MX6Q, otherwise Linux will fail to find the attached drive on some boards. This entire fix was: Reported-by: Eric Nelson <eric.nelson@boundarydevices.com> Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Shawn Guo <shawn.guo@linaro.org> Cc: Richard Zhu <r65037@freescale.com> Cc: Linux-IDE <linux-ide@vger.kernel.org> Signed-off-by: Tejun Heo <tj@kernel.org> Cc: stable@vger.kernel.org
* ahci: imx: setup power saving methodsRichard Zhu2013-10-151-2/+99
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | In order to save power consumption as much as possible. * Disable sata phy internal pll reference clock when sysetem enter into suspend mode, enable it after resume. * Setup module parameter used to enable imx ahci test power down mode(PDDQ) or not, when there is no device detected on the port * minor modifications: - The format of the copyright is changed, because that the original one can't pass fsl internal patch reivew without the character '(c)'. - Exports ahci_platform_ops and ahci_error_handler(). NOTE: * The hot-plug can't be supported when PDDQ mode is ever enabled. * module parameter usage how-to: - default: enable PDDQ mode when no device detected. - add "ahci-imx.hotplug=1" into kernel command line if your don't want to enable PDDQ mode when no device detected on the port. tj: Slightly updated description and comments. Signed-off-by: Richard Zhu <r65037@freescale.com> Signed-off-by: Tejun Heo <tj@kernel.org>
* ahci_imx: add ahci sata support on imx platformsRichard Zhu2013-07-241-0/+236
imx6q contains one Synopsys AHCI SATA controller, But it can't share ahci_platform driver with other controllers because there are some misalignments of the generic AHCI controller - the bits definitions of the HBA registers, the Vendor Specific registers, the AHCI PHY clock and the AHCI signals adjustment window(GPR13 register). - CAP_SSS(bit20) of the HOST_CAP is writable, default value is '0', should be configured to be '1' - bit0 (only one AHCI SATA port on imx6q) of the HOST_PORTS_IMPL should be set to be '1'.(default 0) - One Vendor Specific register HOST_TIMER1MS(offset:0xe0) should be configured regarding to the frequency of AHB bus clock. - Configurations of the AHCI PHY clock, and the signal parameters of the GPR13 Setup its own ahci sata driver, contained the imx6q specific initialized codes, re-use the generic ahci_platform driver, and keep the generic ahci_platform driver clean as much as possible. tj: patch description reformatted Signed-off-by: Richard Zhu <r65037@freescale.com> Reviewed-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Tejun Heo <tj@kernel.org>
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