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* powerpc/p4080ds: dts - add usb controller version info and port0Shengzhou Liu2012-08-101-0/+7
| | | | | | | | Add the missing usb controller version info and port0, which is required during setup usb phy. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: P3041DS - change espi input-clock from 40MHz to 35MHzShaohui Xie2012-07-261-1/+1
| | | | | | | | | Default CoreNet Coherency Bus (CCB) frequency on P3041 is 750MHz, but espi cannot work at 40MHz with this CCB frequency, so we need to slow down the clock rate of espi to 35MHz to make it work stable at the CCB frequency. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Fix pci base address error for p2020rdb-pc in dtsTang Yuantian2012-07-262-4/+4
| | | | | Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Add phy nodes in SGMII mode for MPC8536/44/72DS & P2020DSJia Hongtao2012-07-124-0/+44
| | | | | | | | | | | | | | In SGMII riser card different PHY chip are used with different external IRQ from eTSEC. To support PHY link state auto detect in SGMII mode we should add another group of PHY nodes for SGMII mode. For MPC8572DS IRQ6 is used for PHY0~PHY1, IRQ7 is used for PHY2~PHY3. For MPC8544DS and MPC8536DS IRQ6 is used for PHY0~PHY1. For P2020DS IRQ5 is used for PHY1~PHY2. Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Jia Hongtao <B38951@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Rename P1021RDB-PC device trees to be consistentXu Jiucheng2012-07-113-5/+5
| | | | | | | | The board is really P1021RDB-PC, so rename from p1021rdb.* to p1021rdb-pc.* Signed-off-by: Xu Jiucheng <Jiucheng.Xu@freescale.com> Signed-off-by: Matthew McClintock <msm@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Add ucc uart support for p1025rdbZhicheng Fan2012-07-102-1/+55
| | | | | | | Add device tree nodes to enable ucc uart support on P1025RDB. Signed-off-by: Zhicheng Fan <B32736@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: MPC8572DS - Update the MSI interrupts into 4-cell formatJia Hongtao2012-07-102-8/+8
| | | | | | | | With 2-cell format interrupts of MSI PCIe ethernet card can not work. Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Jia Hongtao <B38951@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: MPC8572DS - Fix eTSEC is not available on core1 of AMP bootJia Hongtao2012-07-101-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The issue log on core1 is: root@mpc8572ds:~# ifconfig eth0 10.192.208.244 net eth0: could not attach to PHY SIOCSIFFLAGS: No such device To attach PHY node mdio@24520 should not be disabled in dts of core1. Because all PHYs are controlled through this node as follows: mdio@24520 { phy0: ethernet-phy@0 { interrupts = <10 1 0 0>; reg = <0x0>; }; phy1: ethernet-phy@1 { interrupts = <10 1 0 0>; reg = <0x1>; }; phy2: ethernet-phy@2 { interrupts = <10 1 0 0>; reg = <0x2>; }; phy3: ethernet-phy@3 { interrupts = <10 1 0 0>; reg = <0x3>; }; tbi0: tbi-phy@11 { reg = <0x11>; device_type = "tbi-phy"; }; }; Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Jia Hongtao <B38951@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Add BSC9131 RDB SupportPrabhakar Kushwaha2012-07-104-0/+428
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | BSC9131RDB is a Freescale reference design board for BSC9131 SoC. The BSC9131 is integrated SoC that targets Femto base station market. It combines Power Architecture e500v2 and DSP StarCore SC3850 core technologies with MAPLE-B2F baseband acceleration processing elements. The BSC9131 SoC includes the following function and features: . Power Architecture subsystem including a e500 processor with 256-Kbyte shared L2 cache . StarCore SC3850 DSP subsystem with a 512-Kbyte private L2 cache . The Multi Accelerator Platform Engine for Femto BaseStation Baseband Processing (MAPLE-B2F) . A multi-standard baseband algorithm accelerator for Channel Decoding/Encoding, Fourier Transforms, UMTS chip rate processing, LTE UP/DL Channel processing, and CRC algorithms . Consists of accelerators for Convolution, Filtering, Turbo Encoding, Turbo Decoding, Viterbi decoding, Chiprate processing, and Matrix Inversion operations . DDR3/3L memory interface with 32-bit data width without ECC and 16-bit with ECC, up to 400-MHz clock/800 MHz data rate . Dedicated security engine featuring trusted boot . DMA controller . OCNDMA with four bidirectional channels . Interfaces . Two triple-speed Gigabit Ethernet controllers featuring network acceleration including IEEE 1588. v2 hardware support and virtualization (eTSEC) . eTSEC 1 supports RGMII/RMII . eTSEC 2 supports RGMII . High-speed USB 2.0 host and device controller with ULPI interface . Enhanced secure digital (SD/MMC) host controller (eSDHC) . Antenna interface controller (AIC), supporting three industry standard JESD207/three custom ADI RF interfaces (two dual port and one single port) and three MAXIM's MaxPHY serial interfaces . ADI lanes support both full duplex FDD support and half duplex TDD support . Universal Subscriber Identity Module (USIM) interface that facilitates communication to SIM cards or Eurochip pre-paid phone cards . TDM with one TDM port . Two DUART, four eSPI, and two I2C controllers . Integrated Flash memory controller (IFC) . TDM with 256 channels . GPIO . Sixteen 32-bit timers The DSP portion of the SoC consists of DSP core (SC3850) and various accelerators pertaining to DSP operations. BSC9131RDB Overview ---------------------- BSC9131 SoC 1Gbyte DDR3 (on board DDR) 128Mbyte 2K page size NAND Flash 256 Kbit M24256 I2C EEPROM 128 Mbit SPI Flash memory USB-ULPI eTSEC1: Connected to RGMII PHY eTSEC2: Connected to RGMII PHY DUART interface: supports one UARTs up to 115200 bps for console display Linux runs on e500v2 core and access some DSP peripherals like AIC Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com> Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Signed-off-by: Akhil Goyal <Akhil.Goyal@freescale.com> Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Rajan Srivastava <rajan.srivastava@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Revert "powerpc/p3060qds: Add support for P3060QDS board"Timur Tabi2012-07-103-669/+0
| | | | | | | | | | This reverts commit 96cc017c5b7ec095ef047d3c1952b6b6bbf98943. The P3060 was cancelled before it went into production, so there's no point in supporting it. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: use the BRx registers to enable indirect mode on the P1022DSTimur Tabi2012-07-101-16/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In order to enable the DIU video controller on the P1022DS, the FPGA needs to be switched to "indirect mode", where the localbus is disabled and the FPGA is accessed via writes to localbus chip select signals CS0 and CS1. To obtain the address of CS0 and CS1, the platform driver uses an "indirect pixis mode" device tree node. This node assumes that the localbus 'ranges' property is sorted in chip-select order. That is, reg value 0 maps to CS0, reg value 1 maps to CS1, etc. This is how the 'ranges' property is supposed to be arranged. Unfortunately, the 'ranges' property is often mis-arranged, and not just on the P1022DS. Linux normally does not care, since it does not program the localbus. But the indirect-mode code on the P1022DS does care. The "proper" fix is to have U-Boot fix the 'ranges' property, but this would be too cumbersome. The names and 'reg' properties of all the localbus devices would also need to be updated, and determining which localbus device maps to which chip select is board-specific. Instead, we determine the CS0/CS1 base addresses the same way that U-boot does -- by reading the BRx registers directly and mapping them to physical addresses. This code is simpler and more reliable, and it does not require a U-boot or device tree change. Since the indirect pixis device tree node is no longer needed, the node is deleted from the DTS. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/p2041rdb: add NAND node in device treeShaohui Xie2012-07-101-1/+40
| | | | | | | NAND on p2041 uses CS1 as chip select. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc: remove Wind River SBC8560 supportPaul Gortmaker2012-07-102-407/+0
| | | | | | | | | | | | | | | This reference board dates back to 2004, and is largely a legacy EOL product. The MPC8560 is a pre e500v2 CPU. The SBC8548 is a more modern, better e500v2 target for people to use as a reference board with today's kernels, should they require one. Removing support for it will also allow us to remove some sbc8560 specific quirk handling in 8250 UART code, and some MTD mapping support. Cc: David Woodhouse <David.Woodhouse@intel.com> Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Add P1024rdb dts supportTang Yuantian2012-07-103-0/+402
| | | | | | | Signed-off-by: Jin Qing <b24347@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/p1010rdb: add EEPROMs to device treeGustavo Zacarias2012-07-101-0/+12
| | | | | | | | | | Add EEPROM to the P1010RDB device tree. The 24c01 acts as a memory SPD so it shouldn't be overwritten without care. The 24c256 is a general purpose memory. Signed-off-by: Gustavo Zacarias <gustavo@zacarias.com.ar> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Revert "powerpc/85xx: p2020rdb - move the NAND address."Sebastian Andrzej Siewior2012-07-101-1/+1
| | | | | | | | | | | | | This reverts commit 0c00f65653389a408dfbbee7578e671664eea26a. The initial commit was my fault. There are two boards out there: P2020RDB and P2020RDB-PC. I wasn't aware of that and assumed that I have a RDB board in front of me while I the RDB-PC. This patch makes it work for the RDB-PC variant and breaks it for the RDB. Now there is a device tree file available for the RDB-PC which was not there earlier. So with this revert, everything gets back to normal :) Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/82xx: add SPI support for mgcogeHolger Brunck2012-07-101-0/+23
| | | | | | | | | | | Add spi support for mgcoge into the platform code and the dts file. Additionaly SPIDEV is switched on in the defconfig and the updates for the newer kernel version are committed. The SPI interface is used to drive the Maxim DS3106 clock chip. Signed-off-by: Holger Brunck <holger.brunck@keymile.com> cc: Heiko Schocher <hs@denx.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/p1022ds: Add RTC supportJerry Huang2012-07-101-0/+4
| | | | | | | | Add the RTC support into the p1022ds device tree Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com> Acked-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc: Kill flatdevtree_env.h tooPaul Bolle2012-07-031-27/+0
| | | | | | | | | Commit 430b01e8f5e524a2bfa50074d97d0bdc2505807b ("[POWERPC] Kill flatdevtree.c") killed the two files including flatdevtree_env.h. It was apparently just an oversight to not kill that header too. Kill it now. Signed-off-by: Paul Bolle <pebolle@tiscali.nl> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* powerpc/boot: Only build board support files when required.Tony Breeds2012-07-031-19/+37
| | | | | | | | | | | | | Currently we build all board files regardless of the final zImage target. This is sub-optimal (in terms on compilation) and leads to problems in one platform needlessly causing failures for other platforms. Use the Kconfig variables to selectively construct this board files to build. Signed-off-by: Tony Breeds <tony@bakeyournoodle.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* Merge tag 'drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-socLinus Torvalds2012-05-261-0/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull arm-soc driver specific updates from Olof Johansson: "These changes are specific to some driver that may be used by multiple boards or socs. The most significant change in here is the move of the samsung iommu code from a platform specific in-kernel interface to the generic iommu subsystem." Fix up trivial conflicts in arch/arm/mach-exynos/Kconfig * tag 'drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (28 commits) mmc: dt: Consolidate DT bindings iommu/exynos: Add iommu driver for EXYNOS Platforms ARM: davinci: optimize the DMA ISR ARM: davinci: implement DEBUG_LL port choice ARM: tegra: Add SMMU enabler in AHB ARM: tegra: Add Tegra AHB driver Input: pxa27x_keypad add choice to set direct_key_mask Input: pxa27x_keypad direct key may be low active Input: pxa27x_keypad bug fix for direct_key_mask Input: pxa27x_keypad keep clock on as wakeup source ARM: dt: tegra: pinmux changes for USB ULPI ARM: tegra: add USB ULPI PHY reset GPIO to device tree ARM: tegra: don't hard-code USB ULPI PHY reset_gpio ARM: tegra: change pll_p_out4's rate to 24MHz ARM: tegra: fix pclk rate ARM: tegra: reparent sclk to pll_c_out1 ARM: tegra: Add pllc clock init table ARM: dt: tegra cardhu: basic audio support ARM: dt: tegra30.dtsi: Add audio-related nodes ARM: tegra: add AUXDATA required for audio ...
| * Merge branch 'drivers/mmc' into next/driversArnd Bergmann2012-05-151-0/+1
| |\ | | | | | | | | | | | | | | | | | | | | | | | | * drivers/mmc: mmc: dt: Consolidate DT bindings Also pulls in the omap/dt-missed-3.4 branch as a dependency. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| | * mmc: dt: Consolidate DT bindingsArnd Bergmann2012-05-151-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch unifies the current DT MMC bindings documentation and code, adds generic MMC DT bindings documentation, and updates .dts files for consistency. [cjb: typo fixes, addition of max-frequency property] Signed-off-by: Chris Ball <cjb@laptop.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* | | powerpc/44x: Add PCI MSI node for Maui APM821xx SoC and Bluestone board in DTSMai La2012-05-031-0/+25
|/ / | | | | | | | | Signed-off-by: Mai La <mla@apm.com> Signed-off-by: Josh Boyer <jwboyer@gmail.com>
* | powerpc/mpc85xx: add MPIC message dts nodeMingkai Hu2012-04-192-0/+53
|/ | | | | Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/dts: Removed fsl,msi property from dts.Diana CRACIUN2012-03-295-16/+0
| | | | | | | | | The association in the decice tree between PCI and MSI using fsl,msi property was an artificial one and it does not reflect the actual hardware. Signed-off-by: Diana CRACIUN <Diana.Craciun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: add the P1020UTM-PC DTS supportJerry Huang2012-03-293-0/+318
| | | | | Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: add the P1020MBG-PC DTS supportJerry Huang2012-03-293-0/+329
| | | | | Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc: Random little legacy iSeries removal tidy upsStephen Rothwell2012-03-281-1/+0
| | | | | Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* Merge branch 'next' of ↵Linus Torvalds2012-03-2154-641/+3713
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc Pull powerpc merge from Benjamin Herrenschmidt: "Here's the powerpc batch for this merge window. It is going to be a bit more nasty than usual as in touching things outside of arch/powerpc mostly due to the big iSeriesectomy :-) We finally got rid of the bugger (legacy iSeries support) which was a PITA to maintain and that nobody really used anymore. Here are some of the highlights: - Legacy iSeries is gone. Thanks Stephen ! There's still some bits and pieces remaining if you do a grep -ir series arch/powerpc but they are harmless and will be removed in the next few weeks hopefully. - The 'fadump' functionality (Firmware Assisted Dump) replaces the previous (equivalent) "pHyp assisted dump"... it's a rewrite of a mechanism to get the hypervisor to do crash dumps on pSeries, the new implementation hopefully being much more reliable. Thanks Mahesh Salgaonkar. - The "EEH" code (pSeries PCI error handling & recovery) got a big spring cleaning, motivated by the need to be able to implement a new backend for it on top of some new different type of firwmare. The work isn't complete yet, but a good chunk of the cleanups is there. Note that this adds a field to struct device_node which is not very nice and which Grant objects to. I will have a patch soon that moves that to a powerpc private data structure (hopefully before rc1) and we'll improve things further later on (hopefully getting rid of the need for that pointer completely). Thanks Gavin Shan. - I dug into our exception & interrupt handling code to improve the way we do lazy interrupt handling (and make it work properly with "edge" triggered interrupt sources), and while at it found & fixed a wagon of issues in those areas, including adding support for page fault retry & fatal signals on page faults. - Your usual random batch of small fixes & updates, including a bunch of new embedded boards, both Freescale and APM based ones, etc..." I fixed up some conflicts with the generalized irq-domain changes from Grant Likely, hopefully correctly. * 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: (141 commits) powerpc/ps3: Do not adjust the wrapper load address powerpc: Remove the rest of the legacy iSeries include files powerpc: Remove the remaining CONFIG_PPC_ISERIES pieces init: Remove CONFIG_PPC_ISERIES powerpc: Remove FW_FEATURE ISERIES from arch code tty/hvc_vio: FW_FEATURE_ISERIES is no longer selectable powerpc/spufs: Fix double unlocks powerpc/5200: convert mpc5200 to use of_platform_populate() powerpc/mpc5200: add options to mpc5200_defconfig powerpc/mpc52xx: add a4m072 board support powerpc/mpc5200: update mpc5200_defconfig to fit for charon board Documentation/powerpc/mpc52xx.txt: Checkpatch cleanup powerpc/44x: Add additional device support for APM821xx SoC and Bluestone board powerpc/44x: Add support PCI-E for APM821xx SoC and Bluestone board MAINTAINERS: Update PowerPC 4xx tree powerpc/44x: The bug fixed support for APM821xx SoC and Bluestone board powerpc: document the FSL MPIC message register binding powerpc: add support for MPIC message register API powerpc/fsl: Added aliased MSIIR register address to MSI node in dts powerpc/85xx: mpc8548cds - add 36-bit dts ...
| * powerpc/ps3: Do not adjust the wrapper load addressStephen Rothwell2012-03-211-9/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit c55aef0e5bc6 "powerpc/boot: Change the load address for the wrapper to fit the kernel" adjusted the laod address if the uncompressed kernel was too large. Ps3 does not compress the kernel and uses a different linker script, so do not adjust the load address in that case. fixes this build error: powerpc64-linux-ld: section .text loaded at [0000000000e00000,0000000000e0721b] overlaps section .kernel:dtb loaded at [0000000000e00000,0000000000e0066f] Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * powerpc: Remove the remaining CONFIG_PPC_ISERIES piecesStephen Rothwell2012-03-211-8/+1
| | | | | | | | | | Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * Merge remote-tracking branch 'kumar/next' into nextBenjamin Herrenschmidt2012-03-2150-622/+3403
| |\
| | * powerpc/fsl: Added aliased MSIIR register address to MSI node in dtsDiana CRACIUN2012-03-161-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The MSIIR register for each MSI bank is aliased to a different address. The MSI node reg property was updated to contain this address: e.g. reg = <0x41600 0x200 0x44140 4>; The first region contains the address and length of the MSI register set and the second region contains the address of the aliased MSIIR register at 0x44140. Signed-off-by: Diana CRACIUN <Diana.Craciun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * powerpc/85xx: mpc8548cds - add 36-bit dtsZhao Chenhui2012-03-161-0/+86
| | | | | | | | | | | | | | | | | | | | | | | | Create mpc8548cds_36b.dts. Support 36-bit mode. Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * powerpc/85xx: Refactor mpc8548cds device treeZhao Chenhui2012-03-164-358/+393
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * Create mpc8548cds.dtsi * Move lbc, soc and pci0 nodes to mpc8548cds_32b.dtsi * Change cuImage.mpc8548cds to cuImage.mpc8548cds_32b * Rename mpc8548cds.dts to mpc8548cds_32b.dts Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * powerpc/85xx: mpc8548cds - Add FPGA node to dtschenhui zhao2012-03-161-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | Remove FPGA(CADMUS) macros in code. Move it to dts. Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Acked-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * powerpc/85xx: mpc8548cds - fix alias in mpc8548si-pre.dtsiZhao Chenhui2012-03-161-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | Correct ethernet1 and add ethernet2 and ethernet3. Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * powerpc/85xx: mpc8548cds - Add RapidIO node to dtschenhui zhao2012-03-162-0/+23
| | | | | | | | | | | | | | | | | | | | | | | | Enable RapidIO and add rapidio and rmu nodes to dts. Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * powerpc/85xx: mpc8548cds - Add NOR flash node to dtschenhui zhao2012-03-161-1/+39
| | | | | | | | | | | | | | | | | | Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * powerpc/dts: fix the compatible string of sec 4.0Liu Shuo2012-03-161-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | Fix the compatible string of sec 4.0 to match with CAAM driver according to Documentation/devicetree/bindings/crypto/fsl-sec4.txt Signed-off-by: Liu Shuo <shuo.liu@freescale.com> Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * powerpc/83xx: mpc836x - fix failed phy detection for ucc ethernet on MDSPaul Gortmaker2012-03-161-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The mpc836x_mds platform has been broken since the commit 6fe3264945ee63292cdfb27b6e95bc52c603bb09 "netdev/phy: Use mdiobus_read() so that proper locks are taken" which caused the fsl_pq_mdio TBI autoprobe to oops. The oops was "fixed" in commit 28d8ea2d568534026ccda3e8936f5ea1e04a86a1 "fsl_pq_mdio: Clean up tbi address configuration" by simply removing the the autoscan code, and making tbi nodes mandatory. Some of the newer reference platforms were updated to have tbi nodes in 220669495bf8b68130a8218607147c7b74c28d2b "powerpc: Add TBI PHY node to first MDIO bus" but the older mpc836x didn't get one and hence was just failing with -EBUSY as follows: fsl-pq_mdio: probe of e0102120.mdio failed with error -16 ... net eth0: Could not attach to PHY eth0: Cannot initialize PHY, aborting. Add a TBI node and use the 1st free address for it. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * powerpc/85xx: Board support for GE IMP3AMartyn Welch2012-03-161-0/+255
| | | | | | | | | | | | | | | | | | | | | | | | Initial board support for the GE IMP3A, a 3U compactPCI card with a p2020 processor. Signed-off-by: Martyn Welch <martyn.welch@ge.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * powerpc/85xx: Add dts for p1020rdb-pc boardZhicheng Fan2012-03-165-0/+633
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | P1020RDB-PC Overview ------------------ 1Gbyte DDR3 SDRAM 32 Mbyte NAND flash 10 16Mbyte NOR flash 16 Mbyte SPI flash SD connector to interface with the SD memory card Real-time clock on I2C bus PCIe: - x1 PCIe slot - x1 mini-PCIe slot 10/100/1000 BaseT Ethernet ports: - eTSEC1, RGMII: one 10/100/1000 port using VitesseTM VSC7385 L2 switch - eTSEC2, SGMII: one 10/100/1000 port using VitesseTM VSC8221 - eTSEC3, RGMII: one 10/100/1000 port using AtherosTM AR8021 USB 2.0 port: - Two USB2.0 Type A receptacles - One USB2.0 signal to Mini PCIe slot Dual RJ45 UART ports: - DUART interface: supports two UARTs up to 115200 bps for console display Signed-off-by: Zhicheng Fan <b32736@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * powerpc/85xx: Clean up partition nodes in dts for MPC8572DSJia Hongtao2012-03-161-18/+32
| | | | | | | | | | | | | | | | | | | | | Signed-off-by: Jin Qing <b24347@freescale.com> Signed-off-by: Jia Hongtao <B38951@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * powerpc/85xx: p1022ds: disable the NOR flash node if video is enabledTimur Tabi2012-03-161-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Freescale P1022 has a unique pin muxing "feature" where the DIU video controller's video signals are muxed with 24 of the local bus address signals. When the DIU is enabled, the bulk of the local bus is disabled, preventing access to memory-mapped devices like NOR flash and the pixis FPGA. Therefore, if the DIU is going to be enabled, then memory-mapped devices on the localbus, like NOR flash, need to be disabled. This also means that the localbus is not a 'simple-bus' any more, so remove that string from the compatible node. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * powerpc/85xx: create 32-bit DTS for the P1022DSTimur Tabi2012-03-164-274/+440
| | | | | | | | | | | | | | | | | | | | | | | | | | | Create a 32-bit address space version of p1022ds.dts. To avoid confusion, p1022ds.dts is renamed to p1022ds_36b.dts. We also create p1022ds.dtsi to store some common nodes. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * powerpc/85xx: Add magic-packet properties for etsecXie Xiaobo2012-03-164-4/+8
| | | | | | | | | | | | | | | | | | | | | | | | The properties indicates that the hardware supports waking up via magic packet. Signed-off-by: Xie Xiaobo <X.Xie@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * powerpc/85xx: Add some DTS nodes and attributes for mpc8536dsXie Xiaobo2012-03-163-3/+104
| | | | | | | | | | | | | | | | | | | | | Add partitions for NOR and NAND Flash. Signed-off-by: Xie Xiaobo <X.Xie@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * powerpc/85xx: fix typo in p1010rdb.dtsiGustavo Zacarias2012-03-161-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix typo introduced by "powerpc: Add TBI PHY node to first MDIO bus" from Andy Fleming. It's device_type rather than device-type, which causes the mdio probe to fail thus making all gianfar ethernet interfaces unusable. Signed-off-by: Gustavo Zacarias <gustavo@zacarias.com.ar> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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