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* MIPS: Fix microMIPS LL/SC immediate offsetsMaciej W. Rozycki2014-11-241-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the microMIPS encoding some memory access instructions have their immediate offset reduced to 12 bits only. That does not match the GCC `R' constraint we use in some places to satisfy the requirement, resulting in build failures like this: {standard input}: Assembler messages: {standard input}:720: Error: macro used $at after ".set noat" {standard input}:720: Warning: macro instruction expanded into multiple instructions Fix the problem by defining a macro, `GCC_OFF12_ASM', that expands to the right constraint depending on whether microMIPS or standard MIPS code is produced. Also apply the fix to where `m' is used as in the worst case this change does nothing, e.g. where the pointer was already in a register such as a function argument and no further offset was requested, and in the best case it avoids an extraneous sequence of up to two instructions to load the high 20 bits of the address in the LL/SC loop. This reduces the risk of lock contention that is the higher the more instructions there are in the critical section between LL and SC. Strictly speaking we could just bulk-replace `R' with `ZC' as the latter constraint adjusts automatically depending on the ISA selected. However it was only introduced with GCC 4.9 and we keep supporing older compilers for the standard MIPS configuration, hence the slightly more complicated approach I chose. The choice of a zero-argument function-like rather than an object-like macro was made so that it does not look like a function call taking the C expression used for the constraint as an argument. This is so as not to confuse the reader or formatting checkers like `checkpatch.pl' and follows previous practice. Signed-off-by: Maciej W. Rozycki <macro@codesourcery.com> Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/8482/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Octeon: Mark octeon_model_get_string() with __initAaro Koskinen2014-11-242-4/+1
| | | | | | | | | | | Mark octeon_model_get_string() with __init and make internal functions static. Signed-off-by: Aaro Koskinen <aaro.koskinen@nsn.com> Cc: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/7668/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Octeon: Delete potentially dangerous feature checksAaro Koskinen2014-11-242-95/+0
| | | | | | | | | | | | | | We should not need to read fuses during normal operation, also the current code has issues with that (not safe for concurrent access). Since there are no in-kernel users for these, just delete them. Drivers should not need such OCTEON_HAS_FEATURE mechanism in any case, instead the information should be passed via device tree. Signed-off-by: Aaro Koskinen <aaro.koskinen@nsn.com> Cc: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/7665/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Octeon: Move cvmx_fuse_read_byte()Aaro Koskinen2014-11-241-19/+1
| | | | | | | | | | | Move cvmx_fuse_read_byte() into a .c file. Signed-off-by: Aaro Koskinen <aaro.koskinen@nsn.com> Cc: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Cc: Aaro Koskinen <aaro.koskinen@nsn.com> Patchwork: https://patchwork.linux-mips.org/patch/7666/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* mips: Convert pr_warning to pr_warnJoe Perches2014-11-241-42/+27
| | | | | | | | | | | | | | | | Use the much more common pr_warn instead of pr_warning with the goal of removing pr_warning eventually. Other miscellanea: o Coalesce formats o Realign arguments Signed-off-by: Joe Perches <joe@perches.com> Cc: linux-mips <linux-mips@linux-mips.org> Cc: LKML <linux-kernel@vger.kernel.org> Patchwork: https://patchwork.linux-mips.org/patch/7935/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: OCTEON: cvmx-bootinfo: add D-Link DSR-1000NAaro Koskinen2014-08-021-0/+2
| | | | | | | | | | | | | Add a definition for D-Link DSR-1000N router. The bootloader on this board supplies 20006 in the bootinfo; the enum CVMX_BOARD_TYPE_CUST_DSR1000N comes from the GPL sources of the board. Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: David Daney <ddaney.cavm@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/7217/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Octeon: Remove checks for CONFIG_CAVIUM_GDBPaul Bolle2014-05-231-1/+0
| | | | | | | | | | | | | | | | Three checks for CONFIG_CAVIUM_GDB were added in v2.6.29. But the Kconfig symbol CAVIUM_GDB was never added to the tree. Remove these checks. Also remove the last reference to octeon_get_boot_debug_flag(). There is no definition of that function anyway. Signed-off-by: Paul Bolle <pebolle@tiscali.nl> Tested-by: Andreas Herrmann <andreas.herrmann@caviumnetworks.com>) Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/6976/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: OCTEON: Supply OCTEON+ USB nodes in internal device trees.David Daney2014-01-231-0/+9
| | | | | | | | | | This will be needed by the next patch to use said nodes for probing via the device tree. Signed-off-by: David Daney <david.daney@cavium.com> Tested-by: Aaro Koskinen <aaro.koskinen@iki.fi> Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6185/
* Merge branch 'for-linus' of ↵Linus Torvalds2013-11-151-2/+2
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial Pull trivial tree updates from Jiri Kosina: "Usual earth-shaking, news-breaking, rocket science pile from trivial.git" * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial: (23 commits) doc: usb: Fix typo in Documentation/usb/gadget_configs.txt doc: add missing files to timers/00-INDEX timekeeping: Fix some trivial typos in comments mm: Fix some trivial typos in comments irq: Fix some trivial typos in comments NUMA: fix typos in Kconfig help text mm: update 00-INDEX doc: Documentation/DMA-attributes.txt fix typo DRM: comment: `halve' -> `half' Docs: Kconfig: `devlopers' -> `developers' doc: typo on word accounting in kprobes.c in mutliple architectures treewide: fix "usefull" typo treewide: fix "distingush" typo mm/Kconfig: Grammar s/an/a/ kexec: Typo s/the/then/ Documentation/kvm: Update cpuid documentation for steal time and pv eoi treewide: Fix common typo in "identify" __page_to_pfn: Fix typo in comment Correct some typos for word frequency clk: fixed-factor: Fix a trivial typo ...
| * treewide: Fix common typo in "identify"Maxime Jayat2013-10-141-2/+2
| | | | | | | | | | | | | | | | Correct common misspelling of "identify" as "indentify" throughout the kernel Signed-off-by: Maxime Jayat <maxime@artisandeveloppeur.fr> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
* | MIPS: Move declaration of Octeon function fixup_irqs() to header.Ralf Baechle2013-09-031-0/+2
|/ | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Octeon: Enable interfaces on EdgeRouter LiteAaro Koskinen2013-07-011-0/+2
| | | | | | | | | | | | | | Enable interfaces on EdgeRouter Lite. Tested with cavium_octeon_defconfig and busybox shell. DHCP & ping works with eth0, eth1 and eth2. The board type "UBNT_E100" is taken from the sources of the vendor kernel shipped with the product. Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi> Acked-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5546/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds2013-03-0230-775/+775
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull MIPS updates from Ralf Baechle: o Add basic support for the Mediatek/Ralink Wireless SoC family. o The Qualcomm Atheros platform is extended by support for the new QCA955X SoC series as well as a bunch of patches that get the code ready for OF support. o Lantiq and BCM47XX platform have a few improvements and bug fixes. o MIPS has sent a few patches that get the kernel ready for the upcoming microMIPS support. o The rest of the series is made up of small bug fixes and cleanups that relate to various parts of the MIPS code. The biggy in there is a whitespace cleanup. After I was sent another set of whitespace cleanup patches I decided it was the time to clean the whitespace "issues" for once and and that touches many files below arch/mips/. Fix up silly conflicts, mostly due to whitespace cleanups. * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (105 commits) MIPS: Quit exporting kernel internel break codes to uapi/asm/break.h MIPS: remove broken conditional inside vpe loader code MIPS: SMTC: fix implicit declaration of set_vi_handler MIPS: early_printk: drop __init annotations MIPS: Probe for and report hardware virtualization support. MIPS: ath79: add support for the Qualcomm Atheros AP136-010 board MIPS: ath79: add USB controller registration code for the QCA955X SoCs MIPS: ath79: add PCI controller registration code for the QCA955X SoCs MIPS: ath79: add WMAC registration code for the QCA955X SoCs MIPS: ath79: register UART for the QCA955X SoCs MIPS: ath79: add QCA955X specific glue to ath79_device_reset_{set, clear} MIPS: ath79: add GPIO setup code for the QCA955X SoCs MIPS: ath79: add IRQ handling code for the QCA955X SoCs MIPS: ath79: add clock setup code for the QCA955X SoCs MIPS: ath79: add SoC detection code for the QCA955X SoCs MIPS: ath79: add early printk support for the QCA955X SoCs MIPS: ath79: fix WMAC IRQ resource assignment mips: reserve elfcorehdr mips: Make sure kernel memory is in iomem MIPS: ath79: use dynamically allocated USB platform devices ...
| * MIPS: Whitespace cleanup.Ralf Baechle2013-02-0130-775/+775
| | | | | | | | | | | | | | | | Having received another series of whitespace patches I decided to do this once and for all rather than dealing with this kind of patches trickling in forever. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | Merge branch 'master' into for-nextJiri Kosina2013-01-294-7/+3465
|\ \ | |/ | | | | | | | | | | | | Conflicts: drivers/devfreq/exynos4_bus.c Sync with Linus' tree to be able to apply patches that are against newer code (mvneta).
| * MIPS: OCTEON: Add definitions for OCTEON memory contoller registers.David Daney2012-12-131-0/+3457
| | | | | | | | Signed-off-by: David Daney <david.daney@cavium.com>
| * MIPS: OCTEON: Add OCTEON family definitions to octeon-model.hDavid Daney2012-12-131-0/+6
| | | | | | | | | | | | Used by follow-on EDAC patches. Signed-off-by: David Daney <david.daney@cavium.com>
| * MIPS/OCTEON/ata: Convert pata_octeon_cf.c to use device tree.David Daney2012-12-131-7/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | The patch needs to eliminate the definition of OCTEON_IRQ_BOOTDMA so that the device tree code can map the interrupt, so in order to not temporarily break things, we do a single patch to both the interrupt registration code and the pata_octeon_cf driver. Also rolled in is a conversion to use hrtimers and corrections to the timing calculations. Acked-by: Jeff Garzik <jgarzik@redhat.com> Signed-off-by: David Daney <david.daney@cavium.com>
| * MIPS: Octeon: Add kexec and kdump supportRalf Baechle2012-12-131-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | [ralf@linux-mips.org: Original patch by Maxim Uvarov <muvarov@gmail.com> with plenty of further shining, polishing, debugging and testing by me.] Signed-off-by: Maxim Uvarov <muvarov@gmail.com> Cc: linux-mips@linux-mips.org Cc: kexec@lists.infradead.org Cc: horms@verge.net.au Patchwork: https://patchwork.linux-mips.org/patch/1026/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | treewide: Replace incomming with incoming in all comments and stringsJorrit Schippers2013-01-031-2/+2
|/ | | | | Signed-off-by: Jorrit Schippers <jorrit@ncode.nl> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
* Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds2012-10-0940-1159/+43331
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull MIPS update from Ralf Baechle: "This is the MIPS update for 3.7. A fair chunk of them are platform updates to the Cavium Octeon SOC (which involves machine generated header files of considerable size), Atheros ATH79xx, RMI aka Netlogic aka Broadcom XLP, Broadcom BCM63xx platforms. Support for the commercial MIPS simulator MIPSsim has been removed as MIPS Technologies is shifting away from this product and Qemu is offering various more powerful platforms. The generic MIPS code can now also probe for no-execute / write-only TLB features implemented without the full SmartMIPS extension as permitted by the latest MIPS processor architecture. Lots of small changes to generic code." * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (78 commits) MIPS: ath79: Fix CPU/DDR frequency calculation for SRIF PLLs MIPS: ath79: use correct fractional dividers for {CPU,DDR}_PLL on AR934x MIPS: BCM63XX: Properly handle mac address octet overflow MIPS: Kconfig: Avoid build errors by hiding USE_OF from the user. MIPS: Replace `-' in defconfig filename wth `_' for consistency. MIPS: Wire kcmp syscall. MIPS: MIPSsim: Remove the MIPSsim platform. MIPS: NOTIFY_RESUME is not needed in TIF masks MIPS: Merge the identical "return from syscall" per-ABI code MIPS: Unobfuscate _TIF..._MASK MIPS: Prevent hitting do_notify_resume() with !user_mode(regs). MIPS: Replace 'kernel_uses_smartmips_rixi' with 'cpu_has_rixi'. MIPS: Add base architecture support for RI and XI. MIPS: Optimise TLB handlers for MIPS32/64 R2 cores. MIPS: uasm: Add INS and EXT instructions. MIPS: Avoid pipeline stalls on some MIPS32R2 cores. MIPS: Make VPE count to be one-based. MIPS: Add new end of interrupt functionality for GIC. MIPS: Add EIC support for GIC. MIPS: Code clean-ups for the GIC. ...
| * Merge branch 'master' of git://dev.phrozen.org/mips-next into ↵Ralf Baechle2012-10-051-0/+328
| |\ | | | | | | | | | mips-for-linux-next
| | * MIPS: OCTEON: Add register definitions for SPI host hardware.David Daney2012-08-221-0/+328
| | | | | | | | | | | | | | | | | | | | | | | | Needed by SPI driver. Signed-off-by: David Daney <david.daney@cavium.com> Patchwork: http://patchwork.linux-mips.org/patch/3796/ Signed-off-by: John Crispin <blogic@openwrt.org>
| * | Merge branch 'cn6xxx-mgmt' of ↵Ralf Baechle2012-09-271-0/+1
| |\ \ | | | | | | | | | | | | git://git.linux-mips.org/pub/scm/daney/upstream-daney into mips-for-linux-next
| | * | MIPS: Octeon: Add octeon_io_clk_delay() function.David Daney2012-08-311-0/+1
| | |/ | | | | | | | | | | | | | | | | | | Also cleanup and fix octeon_init_cvmcount() Signed-off-by: David Daney <ddaney@caviumnetworks.com> Acked-by: David S. Miller <davem@davemloft.net>
| * | MIPS: OCTEON: Add support for cn68XX interrupt controller.David Daney2012-08-311-0/+3
| | | | | | | | | | | | | | | | | | | | | The cn68XX has a new interrupt controller named CIU2, add support for this, and use it if cn68XX detected at runtime. Signed-off-by: David Daney <david.daney@cavium.com>
| * | MIPS: OCTEON: Update register definitions.David Daney2012-08-3137-1159/+42981
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for cn68xx, cn61xx, cn63xx, cn66xx and cnf71XX. Add little-endian register layouts. Patch cvmx-interrupt-rsl.c for changed definition. Signed-off-by: David Daney <david.daney@cavium.com>
| * | MIPS: OCTEON: Add detection of cnf71xx parts.David Daney2012-08-311-0/+18
| |/ | | | | | | | | | | | | | | | | Also add cvmx_get_octeon_family(). Both of these are needed by the upcoming register definition refresh patch. Signed-off-by: David Daney <david.daney@cavium.com>
* | UAPI: (Scripted) Convert #include "..." to #include <path/...> in kernel ↵David Howells2012-10-0215-48/+48
|/ | | | | | | | | | | | system headers Convert #include "..." to #include <path/...> in kernel system headers. Signed-off-by: David Howells <dhowells@redhat.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com> Acked-by: Dave Jones <davej@redhat.com>
* i2c: Convert i2c-octeon.c to use device tree.David Daney2012-07-231-5/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | There are three parts to this: 1) Remove the definitions of OCTEON_IRQ_TWSI and OCTEON_IRQ_TWSI2. The interrupts are specified by the device tree and these hard coded irq numbers block the used of the irq lines by the irq_domain code. 2) Remove platform device setup code from octeon-platform.c, it is now unused. 3) Convert i2c-octeon.c to use device tree. Part of this includes using the devm_* functions instead of the raw counterparts, thus simplifying error handling. No functionality is changed. Signed-off-by: David Daney <david.daney@cavium.com> Acked-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Wolfram Sang <w.sang@pengutronix.de> Cc: linux-mips@linux-mips.org Cc: devicetree-discuss@lists.ozlabs.org Cc: Grant Likely <grant.likely@secretlab.ca> Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/3939/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: OCTEON: Remove some unused files.David Daney2012-07-232-66/+0
| | | | | | | | | | These FPA related files are not used anywhere in the kernel. Remove them. Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3892/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: OCTEON: Remove unused file.David Daney2012-05-151-1365/+0
| | | | | | | | | cvmx-pcieep-defs.h is not mentioned anywhere in the tree, remove it. Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3652/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Octeon: Update DMA mapping operations for OCTEON II processors.David Daney2011-12-071-1/+2
| | | | | | | | | | | | | OCTEON II has a new dma to phys mapping method for PCIe. Define OCTEON_DMA_BAR_TYPE_PCIE2 to denote this case, and handle it. OCTEON II also needs a swiotlb if the OHCI USB driver is enabled, so allocate this too. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2983/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Octeon: Update feature test functions for new chips and features.David Daney2011-12-072-30/+126
| | | | | | | | | | cvmx.h was rearranged to fix include file ordering problems, but there is no change other than moving some definitions around. Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2984/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Octeon: Update SOC PCI related register definitions for new chips.David Daney2011-12-077-83/+4909
| | | | | | | Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2986/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Octeon: Rearrange CVMX files in preperation for device treeDavid Daney2011-12-077-0/+7
| | | | | | | | | | Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Cc: netdev@vger.kernel.org Cc: devel@driverdev.osuosl.org Acked-by: Greg Kroah-Hartman <gregkh@suse.de> Patchwork: https://patchwork.linux-mips.org/patch/2941/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Octeon: Update bootloader board type constants.David Daney2011-12-072-3/+75
| | | | | | | | | | | | Many new types of boards exist, so lets recognize them. Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Cc: netdev@vger.kernel.org Cc: devel@driverdev.osuosl.org Acked-by: Greg Kroah-Hartman <gregkh@suse.de> Patchwork: https://patchwork.linux-mips.org/patch/2940/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Octeon: Move some Ethernet support files out of staging.David Daney2011-12-0734-0/+15227
| | | | | | | | | | | Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Cc: netdev@vger.kernel.org Cc: devel@driverdev.osuosl.org Acked-by: Greg Kroah-Hartman <gregkh@suse.de> Patchwork: https://patchwork.linux-mips.org/patch/2942/ Patchwork: https://patchwork.linux-mips.org/patch/3012/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Oceton: Update model detection code for new chips.David Daney2011-12-072-154/+1094
| | | | | | | | | | | Several newer chips were not covered, update the code to detect them. This necessitates updating cvmx-mio-defs.h as well, because it has new and required definitions. Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2939/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Octeon: Update struct cvmx_bootinfo to v3.David Daney2011-12-071-2/+8
| | | | | | | | | | Bootloaders can pass version 3 of this structure. Add the new fields so we can support the Device Tree. Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2938/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* Fix common misspellingsLucas De Marchi2011-03-314-4/+4
| | | | | | Fixes generated by 'codespell' and manually reviewed. Signed-off-by: Lucas De Marchi <lucas.demarchi@profusion.mobi>
* MIPS: Octeon: Rewrite interrupt handling code.David Daney2011-03-291-0/+2
| | | | | | | | | | | | | | | | | This includes conversion to new style irq_chip functions, and correctly enabling/disabling per-CPU interrupts. The hardware interrupt bit to irq number mapping is now done with a flexible map, instead of by bit twiddling the irq number. [ tglx: Adjusted to new irq_cpu_on/offline callbacks and __irq_set_affinity_lock ] Signed-off-by: David Daney <ddaney@caviumnetworks.com> Cc: linux-mips@linux-mips.org Cc: ralf@linux-mips.org LKML-Reference: <1301081931-11240-5-git-send-email-ddaney@caviumnetworks.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* MIPS: Octeon: Add register definitions for EHCI / OHCI USB glue logic.David Daney2010-10-291-0/+261
| | | | | | | | | | | | | | The EHCI and OHCI blocks connection to the I/O bus is controlled by these registers. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-usb@vger.kernel.org To: dbrownell@users.sourceforge.net Patchwork: http://patchwork.linux-mips.org/patch/1674/ Acked-by: Greg Kroah-Hartman <gregkh@suse.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org> create mode 100644 arch/mips/include/asm/octeon/cvmx-uctlx-defs.h
* MIPS: Octeon: Add octeon_get_io_clock_rate() for cn63xxDavid Daney2010-10-291-0/+1
| | | | | | | | | | | | | Starting with cn63xx Octeon I/O blocks are clocked at a different rate than the CPU. Add a new function octeon_get_io_clock_rate() that yields the I/O clock rate. Also rearrange octeon_get_clock_rate() to get the value from the saved sysinfo structure. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Patchwork: http://patchwork.linux-mips.org/patch/1671/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Octeon: Update L2 Cache code for CN63XXDavid Daney2010-10-292-95/+141
| | | | | | | | | | | | The CN63XX has a different L2 cache architecture. Update the helper functions to reflect this. Some joining of split lines was also done to improve readability, as well as reformatting of comments. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Patchwork: http://patchwork.linux-mips.org/patch/1663/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Octeon: Add cn63XX to Octeon chip detection macros.David Daney2010-10-291-8/+28
| | | | | | Signed-off-by: David Daney <ddaney@caviumnetworks.com> Patchwork: http://patchwork.linux-mips.org/patch/1661/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Octeon: Update register definitions for CN63XX chipsDavid Daney2010-10-2920-2161/+4212
| | | | | | | | | | | The CN63XX is a new 6-CPU SOC based on the new OCTEON II CPU cores. Join some lines back together. This makes some of them exceed 80 columns, but they are uninteresting and this unclutters things. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Patchwork: http://patchwork.linux-mips.org/patch/1668/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Octeon: Rewrite DMA mapping functions.David Daney2010-10-291-0/+10
| | | | | | | | | | | | | All Octeon chips can support more than 4GB of RAM. Also due to how Octeon PCI is setup, even some configurations with less than 4GB of RAM will have portions that are not accessible from 32-bit devices. Enable the swiotlb code to handle the cases where a device cannot directly do DMA. This is a complete rewrite of the Octeon DMA mapping code. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Patchwork: http://patchwork.linux-mips.org/patch/1639/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Octeon: Allow more than 3.75GB of memory with PCIeDavid Daney2010-08-051-0/+13
| | | | | | | | | | | | | | | | | We reserve the 3.75GB - 4GB region of PCIe address space for device to device transfers, making the corresponding physical memory under direct mapping unavailable for DMA. To allow for PCIe DMA to all physical memory we map this chunk of physical memory with BAR1. Because of the resulting discontinuity in the mapping function, we remove a page of memory at each end of the range so multi-page DMA buffers can never be allocated that span the range. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1535/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Octeon: Implement delays with cycle counter.David Daney2010-08-051-0/+1
| | | | | | | | | | | Power throttling make deterministic delay loops impossible. Re-implement delays using the cycle counter. This also allows us to get rid of the code that calculates loops per jiffy. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1317/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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