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* Blackfin arch: Blacklist Hibernate (PM_SUSPEND_MEM) on BF561 as wellMichael Hennerich2009-03-281-1/+1
| | | | | | Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: remove duplicated ANOMALY_05000448 ifdef checkMike Frysinger2009-03-061-4/+2
| | | | | | Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: fix bug - On bf548-ezkit, ethernet fails to work after wakeup ↵Michael Hennerich2009-03-051-0/+24
| | | | | | | | from "mem" Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: Random read/write errors are a bad thingRobin Getz2009-03-051-0/+6
| | | | | | | | | Random read/write errors are a bad thing - so don't let anyone (including the test bench) run on something we know is bad. Signed-off-by: Robin Getz <rgetz@blackfin.uclinux.org> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: Fix bug - KGDB single step into the middle of a 4 bytes ↵Sonic Zhang2009-03-051-0/+22
| | | | | | | | | | | | | | | | instruction on bf561 after soft bp is hit Run IFLUSH twice to avoid loading wrong instruction after invalidating icache and following sequence is met. 1) The one instruction address is cached in the icache. 2) This instruction in SDRAM is changed. 3) IFLASH[P0] is executed only once in lackfin_icache_flush_range(). 4) This instruction is executed again, but not the changed new one. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: make sure people do not set the kernel load address too highMike Frysinger2009-03-051-0/+5
| | | | | | Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: fix bug - The SPORT_HYS bit is not set for BF561 0.5Enrik Berkhan2009-03-051-1/+1
| | | | | | | | | | | | | | IMHO the setting should depend on ANOMALY_05000305 which is about the availability of the bit, not ANOMALY_05000265 which only describes the SPORT sensitivity to noise (checked for BF561 only, though). If that's not true for other BF variants, maybe the definition of ANOMALY_05000265 for BF561 should be changed to '(1)' instead. Signed-off-by: Enrik Berkhan <Enrik.Berkhan@ge.com> Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: fix bug - kgdb fails to continue after setting breakpoint on ↵Sonic Zhang2009-03-051-1/+5
| | | | | | | | | | | | | | | | | | | | bf561-ezkit kernel with smp patch Free spinlock before call IPI handlers. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org> Header from folded patch 'blackfin_arch__fix_bug_-_kgdb_fails_to_continue_after_setting_breakpoint_on_bf561-ezkit_kernel_with_smp_patch-1': Blackfin arch: fix bug - kgdb fails to continue after setting breakpoint on bf561-ezkit kernel with smp patch Don't test l1 code in SMP kernel. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: Update adeos blackfin arch patch to 1.9-00Philippe Gerum2009-03-043-86/+113
| | | | | | Signed-off-by: Philippe Gerum <rpm@xenomai.org> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: fix 2 bugs related to debugJie Zhang2009-02-041-8/+1
| | | | | | | | | | | | - unable to single step over emuexcpt instruction - gdbproxy goes into infinite loop when doing gdb does "next" over "emuexcpt" Don't decrement PC after software breakpoint. Signed-off-by: Jie Zhang <jie.zhang@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: Fix bug - 561 SMP kernel can't boot from jffs2Graf Yang2009-02-041-42/+42
| | | | | | | | | bss_l2 section is garbage when the data in this section is used by _bfin_relocate_l1_mem, so move the zero out function ahead. Signed-off-by: Graf Yang <graf.yang@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: base SIC_IWR# programming on whether the MMR existsMike Frysinger2009-02-042-14/+8
| | | | | | | | | base SIC_IWR# programming on whether the MMR exists rather than having to maintain another list of processors Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: Fix URLRobin Getz2009-02-041-1/+1
| | | | | | Signed-off-by: Robin Getz <rgetz@blackfin.uclinux.org> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: Fix Bug - Kernel does not boot if re-program clocksMichael Hennerich2009-02-041-1/+2
| | | | | | | | | | On BF561 EBIU_SDGCTL bit 31 controls the SDRAM external data path width, typically set 0 for a 32-bit bus width. On other Blackfin derivatives this bit should be set by default. Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: remove hardware PM code, oprofile not use itGraf Yang2009-01-072-34/+0
| | | | | | Signed-off-by: Graf Yang <graf.yang@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: merge adeos blackfin part to arch/blackfin/Yi Li2009-01-075-32/+281
| | | | | | | | | | | | | | | | | | [Mike Frysinger <vapier.adi@gmail.com>: - handle bf531/bf532/bf534/bf536 variants in ipipe.h - cleanup IPIPE logic for bfin_set_irq_handler() - cleanup ipipe asm code a bit and add missing ENDPROC() - simplify IPIPE code in trap_c - unify some of the IPIPE code and fix style - simplify DO_IRQ_L1 handling with ipipe code - revert IRQ_SW_INT# addition from ipipe merge - remove duplicate get_{c,s}clk() prototypes ] Signed-off-by: Yi Li <yi.li@analog.com> Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: Faster C implementation of no-MPU CPLB handlerBernd Schmidt2009-01-071-12/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a mixture ofcMichael McTernan's patch and the existing cplb-mpu code. We ditch the old cplb-nompu implementation, which is a good example of why a good algorithm in a HLL is preferrable to a bad algorithm written in assembly. Rather than try to construct a table of all posible CPLBs and search it, we just create a (smaller) table of memory regions and their attributes. Some of the data structures are now unified for both the mpu and nompu cases. A lot of needless complexity in cplbinit.c is removed. Further optimizations: * compile cplbmgr.c with a lot of -ffixed-reg options, and omit saving these registers on the stack when entering a CPLB exception. * lose cli/nop/nop/sti sequences for some workarounds - these don't * make sense in an exception context Additional code unification should be possible after this. [Mike Frysinger <vapier.adi@gmail.com>: - convert CPP if statements to C if statements - remove redundant statements - use a do...while loop rather than a for loop to get slightly better optimization and to avoid gcc "may be used uninitialized" warnings ... we know that the [id]cplb_nr_bounds variables will never be 0, so this is OK - the no-mpu code was the last user of MAX_MEM_SIZE and with that rewritten, we can punt it - add some BUG_ON() checks to make sure we dont overflow the small cplb_bounds array - add i/d cplb entries for the bootrom because there is functions/data in there we want to access - we do not need a NULL trailing entry as any time we access the bounds arrays, we use the nr_bounds variable ] Signed-off-by: Michael McTernan <mmcternan@airvana.com> Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bernd Schmidt <bernds_cb1@t-online.de> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: Fix incorrect use of loose in cpufreq.cNick Andrew2009-01-071-1/+1
| | | | | | | | | It should be 'lose', not 'loose'. Signed-off-by: Nick Andrew <nick@nick-andrew.net> Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: rename MAX_BLACKFIN_DMA_CHANNEL to MAX_DMA_CHANNELS to match ↵Mike Frysinger2009-01-071-1/+1
| | | | | | | | everyone else Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: get oprofile work for user spaceGraf Yang2009-01-072-7/+9
| | | | | | Signed-off-by: Graf Yang <graf.yang@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: fix bugs and unify BFIN_KERNEL_CLOCK optionMichael Hennerich2009-01-073-1/+95
| | | | | | | | | | | | | | | | | | | | | | | - remove duplicated code and headers - add option allowing arbitrary SDRAM/DDR Timing parameters. - mark automatically calculated timings as EXPERIMENTAL - fix comment header block Related to BUGs: - kernel boot up fails with CONFIG_BFIN_KERNEL_CLOCK item on. - kernel does not boot if re-program clocks [ Mike Frysinger <vapier.adi@gmail.com> - fix comment header - mark do_sync static - document the DMA shutdown - simplify SIC_IWR handling - fix ANOMALY_05000265 handling to work as intended ] Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: Allow a gpio pin be requested both as gpio and irq.Graf Yang2009-01-071-12/+13
| | | | | | | | | | | | [Mike Frysinger <vapier.adi@gmail.com>: - use KERN_NOTICE when using gpios as both irq and non rather than KERN_ERR - embedded newlines in printk() does not fly] Signed-off-by: Graf Yang <graf.yang@analog.com> Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: Request the gpio resource when making it as an irq pin, ↵Graf Yang2008-11-181-1/+14
| | | | | | | | avoiding override it. Signed-off-by: Graf Yang <graf.yang@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: Add code to free gpio when shutdown irqGraf Yang2008-11-181-1/+5
| | | | | | Signed-off-by: Graf Yang <graf.yang@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: fix bug - reboot fails on BF527Mike Frysinger2008-11-182-2/+8
| | | | | | | | add ANOMALY_05000435 to handle SIC_IWR1 workaround for rebooting Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: rename cache_lock() to bfin_cache_lock()Mike Frysinger2008-11-181-2/+2
| | | | | | | | | rename cache_lock() to bfin_cache_lock() to avoid namespace collision with common code Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: fix building with CONFIG_DEBUG_DOUBLEFAULTMike Frysinger2008-11-181-2/+3
| | | | | | | | | arch/blackfin/mach-common/entry.S:465: Error: pcrel too far BFD_RELOC_BFIN_10 Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: rename irq_flags to bfin_irq_flagsMike Frysinger2008-11-183-11/+11
| | | | | | | | | rename irq_flags to bfin_irq_flags to avoid namespace collision with common code Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: move SIC_SYSIRQ() to the one file that actually uses itMike Frysinger2008-11-181-0/+2
| | | | | | Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: rewrite blackfin_invalidate_entire_dcache functionMike Frysinger2008-11-183-37/+25
| | | | | | | | | rewrite blackfin_invalidate_entire_dcache() in C for easier management, better optimization, and so we take all SSYNC anomalies into account Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: SMP supporting patchset: Blackfin header files and machine ↵Graf Yang2009-01-076-70/+605
| | | | | | | | | | | | | | common code Blackfin dual core BF561 processor can support SMP like features. https://docs.blackfin.uclinux.org/doku.php?id=linux-kernel:smp-like In this patch, we provide SMP extend to Blackfin header files and machine common code Signed-off-by: Graf Yang <graf.yang@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: Cleanup and unify Blackfin IRQ and GPIO IRQ handlingMichael Hennerich2008-11-181-125/+66
| | | | | | | | | | | | | | | - Remove SSYNC() - Use irq_to_gpio where applicable - Remove gpio_edge_triggered bitfield, check irq_desc fields instead. - Remove gpio_both_edge_triggeredb bitfield, check irq_desc fields instead. - Use BITMAP and bitops on gpio_enabled - Preferably use 32-bit - Looking at the disassembly this indeed saves quite a few instructions. Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: remove useless SSYNC() in irq priority codeMike Frysinger2008-11-181-4/+0
| | | | | | | | | | | - remove SSYNC() left over from irq init split - do not force SSYNC() when masking/unmasking IRQs in the SIC as any order enforced by the hardware should already be enforced by software Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: fix bug - gpio_bank() macros messed up bank number caculating ↵Bryan Wu2008-11-181-3/+3
| | | | | | | | | | | | | | | | | | | | with positioning a gpio The whole story: Before BF51x merged, all the MAX_BLACKFIN_GPIOS are integral multiple of GPIO_BANKSIZE (= 16). But BF51x provides MAX_BLACKFIN_GPIOS = 40 which includes 3 banks and the 3rd bank has only 8 GPIO pins. Therefore, gpio_bank() macros is correct when you try to find a GPIO in which bank (GPIO_35 is in bank 2). But on BF51x gpio_bank(MAX_BLACKFIN_GPIOS) only gives out 2 banks instead of 3 banks for some static array initialization. This patch add a new macros gpio_bank_n() and GPIO_BANK_NUM to do bank number caculating and remain the gpio_bank() macros for positioning a gpio in which bank. Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: do not bother initializing the first 4kMike Frysinger2008-11-181-12/+0
| | | | | | | | | our kernel should be sane now, and we want to catch NULL bugs, not ignore them Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: use sti to set the mask rather than banging on imaskMike Frysinger2008-11-181-6/+2
| | | | | | Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: only add IFLUSH nop padding when anomaly 443 is enabledMike Frysinger2008-10-281-1/+5
| | | | | | Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: add support for Blackfin latest processor family BF51xBryan Wu2008-11-183-11/+15
| | | | | Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: fix bug - kernel with SMP patch can not bootupGraf Yang2008-10-281-3/+4
| | | | | | | | | | The original code defined _exception_stack but not alloc space for the exception stack. In exception, this area is over written by exception stack. Common kernel luckly boot up, but SMP kernel stuck. Signed-off-by: Graf Yang <graf.yang@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: add an option to allow people to stick exception stack into ↵Mike Frysinger2008-10-281-6/+15
| | | | | | | | | | | L1 scratch allow people to stick exception stack into L1 scratch and make sure it gets placed into .bss sections rather than .data Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: move EXPORT_SYMBOL to the place where it is actually definedMike Frysinger2008-10-281-0/+1
| | | | | | | | | | - kernel_thread - irq_flags - checksum Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: BF538/9 Linux kernel SupportMichael Hennerich2008-11-183-8/+18
| | | | | | | | Add supporing for Blackfin BF538 and BF539 processors. Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: unify duplicated bss init codeMike Frysinger2008-10-271-47/+19
| | | | | | Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: fix bug - Turn on DEBUG_DOUBLEFAULT, booting SMP kernel crashGraf Yang2008-11-181-1/+1
| | | | | | Signed-off-by: Graf Yang <graf.yang@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: fix bug - Cpufreq assumes clocks in kHz and not Hz.Michael Hennerich2008-10-281-7/+7
| | | | | | Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: fix bug - kernel build with write back policy fails to be ↵Mike Frysinger2008-10-281-1/+1
| | | | | | | | | | | | | | | | booted up Make sure IFLUSH is not the last instruction in the hardware loop to avoid infinite core stall. The dcache/icache function that only gets used in writeback mode was putting IFLUSH as the last instruction in the hardware loop ... we know from design that this may often lead to inifite core stalling, so switch the FLUSH/IFLUSH order. Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Blackfin arch: fix bug - dmacopy test case fail on all platformMike Frysinger2008-11-181-1/+5
| | | | | | | | | | The cache code I added flushes 1 line too little if the start address is not aligned to the cache size. Cache align the start address so that when we straddle cache aligns, we get the right count. Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
* Merge branch 'for-linus' of ↵Linus Torvalds2008-10-162-115/+112
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/cooloney/blackfin-2.6 * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cooloney/blackfin-2.6: Blackfin arch: make sure cycles is marked as volatile so gcc doesnt reorder on us Blackfin arch: disable CONFIG_HW_RANDOM and CONFIG_DAB in defconfig files Blackfin arch: update cache flush prototypes with argument names to make them less mysterious Blackfin arch: move bfin_addr_dcachable() and friends into the cacheflush header where it belongs Blackfin arch: use the new bfin_addr_dcachable() function Blackfin arch: fix bug - build kernel failed at head.S when reprogram clock on all platforms Blackfin arch: unify/cleanup cache code Blackfin arch: update AD7879 platform resources in board file Blackfin arch: Zero out bss region in L1/L2 memory. Blackfin arch: add read/write IO accessor functions to Blackfin Blackfin arch: fix bug - some serial header files set RTS to an input when they should all be outputs
| * Blackfin arch: unify/cleanup cache codeMike Frysinger2008-10-161-115/+58
| | | | | | | | | | | | | | | | | | - to be correct wrt to end ranges - to be optimal with a one-instruction hardware loop Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
| * Blackfin arch: Zero out bss region in L1/L2 memory.Graf Yang2008-10-161-0/+54
| | | | | | | | | | | | Signed-off-by: Graf Yang <graf.yang@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
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