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* Merge branch 'late/kirkwood' into late/socOlof Johansson2012-10-041094-34041/+18661
|\ | | | | | | | | | | | | | | | | | | | | | | Merge in the late Kirkwood branch with the OMAP late branch for upstream submission. Final contents described in shared tag. Fixup remove/change conflicts in arch/arm/mach-omap2/devices.c and drivers/spi/spi-omap2-mcspi.c. Signed-off-by: Olof Johansson <olof@lixom.net>
| * ARM: mvebu: fix build breaks from multi-platform conversionRob Herring2012-09-283-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | Moving ARCH_MVEBU for multi-platform support caused several breakages in recently added addr-map and pinctrl support for mvebu. This adds the necessary selects and include paths to fix the build. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: Gregory CLEMENT <gregory.clement@free-electrons.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * ARM: kirkwood: dockstar: fix header includeOlof Johansson2012-09-221-1/+1
| | | | | | | | | | | | | | The platform data was moved, but this file was introduced in parallel so didn't get caught in the sweeping changes. Fix it up now. Signed-off-by: Olof Johansson <olof@lixom.net>
| * ARM: kirkwood: move new dtbs to common MakefileOlof Johansson2012-09-223-8/+6
| | | | | | | | | | | | | | This moves a few of the newly introduced dtb targets to the common dts/Makefile instead of the per-platform file. Signed-off-by: Olof Johansson <olof@lixom.net>
| * Merge branch 'kirkwood/drivers' of ↵Olof Johansson2012-09-228-5/+261
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.infradead.org/users/jcooper/linux into late/kirkwood From Jason Cooper: New drivers: - pinctrl (dove, kirkwood, mvebu) - gpio (mvebu) * 'kirkwood/drivers' of git://git.infradead.org/users/jcooper/linux: arm: mvebu: add gpio support in defconfig arm: mvebu: add DT information for GPIO banks on Armada 370 and XP arm: mvebu: use GPIO support now that a driver is available Documentation: add description of DT binding for the gpio-mvebu driver gpio: introduce gpio-mvebu driver for Marvell SoCs arm: mvebu: select the pinctrl drivers for Armada 370 and Armada XP platforms arm: mvebu: split Kconfig options for Armada 370 and XP ARM: mvebu: adjust Armada XP evaluation board DTS ARM: mvebu: Add pinctrl support to Armada 370 SoC ARM: mvebu: Add pinctrl support to Armada XP SoCs pinctrl: mvebu: add pinctrl driver for Armada XP pinctrl: mvebu: add pinctrl driver for Armada 370 pinctrl: mvebu: kirkwood pinctrl driver pinctrl: mvebu: dove pinctrl driver pinctrl: mvebu: pinctrl driver core Signed-off-by: Olof Johansson <olof@lixom.net>
| | * arm: mvebu: add gpio support in defconfigThomas Petazzoni2012-09-221-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Andrew Lunn <andrew@lunn.ch> Cc: Gregory Clement <gregory.clement@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| | * arm: mvebu: add DT information for GPIO banks on Armada 370 and XPThomas Petazzoni2012-09-224-0/+152
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The gpioX aliases are needed so that the driver can use of_alias_get_id() to get a 0-based number of the GPIO bank, which we then use to compute the base GPIO of the bank being probed. This is similar to what gpio-mxs.c is doing. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Andrew Lunn <andrew@lunn.ch> Cc: Gregory Clement <gregory.clement@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| | * arm: mvebu: use GPIO support now that a driver is availableThomas Petazzoni2012-09-222-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: Andrew Lunn <andrew@lunn.ch> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Gregory Clement <gregory.clement@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| | * arm: mvebu: select the pinctrl drivers for Armada 370 and Armada XP platformsThomas Petazzoni2012-09-221-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch actually enables pinctrl drivers for Armada 370 and XP. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Reviewed-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| | * arm: mvebu: split Kconfig options for Armada 370 and XPThomas Petazzoni2012-09-221-3/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Until now, all the code for Armada 370 and XP was common, so we had a single Kconfig option to support all boards using both SoCs. With the addition of pinctrl drivers, this situation has changed: those two SoCs are radically different in terms of pinctrl, so they have two separate drivers. Since pinctrl drivers are typically select-ed from the SoC Kconfig option, it makes sense to split the 370/XP option into two separate options: one for Armada 370 and another for Armada XP. We keep an hidden option selected by both ARMADA_370 and ARMADA_XP in order to easily compile common code. A followup patch actually makes use of this split to select the appropriate pinctrl drivers. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Gregory Clement <gregory.clement@free-electrons.com> Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Reviewed-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| | * ARM: mvebu: adjust Armada XP evaluation board DTSThomas Petazzoni2012-09-221-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Armada XP evaluation board is based on the MV78460 Armava XP SoC. Now that we have separate .dtsi files for the three different SoCs of the Armada XP family, use the appropriate one as include for the Armada XP evaluation board .dts file. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Reviewed-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| | * ARM: mvebu: Add pinctrl support to Armada 370 SoCThomas Petazzoni2012-09-221-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commits adds the necessary device tree information to define the compatible property for the pinctrl driver instance of Armada 370 SoC. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Reviewed-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| | * ARM: mvebu: Add pinctrl support to Armada XP SoCsThomas Petazzoni2012-09-223-0/+84
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commits adds the necessary device tree information to define the compatible property for the pinctrl driver instance of Armada XP SoCs. Until now, the device tree representation considered the Armada XP as a single SoC. But in fact, there are three different SoCs in the Armada XP families, with different number of CPU cores, different number of Ethernet interfaces... and different number of muxable pins or functions. We therefore introduce three armada-xp-mv78xx0.dtsi for the three SoCs of the Armada XP family. The current armada-xp-db.dts evaluation board uses the MV78460 variant of the SoC. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Reviewed-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| | * pinctrl: mvebu: pinctrl driver coreSebastian Hesselbarth2012-09-221-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds a pinctrl driver core for Marvell SoCs plus DT binding documentation. This core driver will be used by SoC family specific drivers, i.e. Armada XP, Armada 370, Dove, Kirkwood, aso. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Reviewed-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Jason Cooper <jason@lakedaemon.net> Conflicts: arch/arm/Kconfig
| * | Merge branch 'kirkwood/addr_decode' of ↵Olof Johansson2012-09-2240-316/+459
| |\ \ | | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.infradead.org/users/jcooper/linux into late/kirkwood * 'kirkwood/addr_decode' of git://git.infradead.org/users/jcooper/linux: arm: mvebu: add address decoding controller to the DT arm: mvebu: add basic address decoding support to Armada 370/XP arm: plat-orion: make bridge_virt_base non-const to support DT use case arm: plat-orion: introduce PLAT_ORION_LEGACY hidden config option arm: plat-orion: use void __iomem pointers for addr-map functions arm: plat-orion: use void __iomem pointers for time functions arm: plat-orion: use void __iomem pointers for MPP functions arm: plat-orion: use void __iomem pointers for UART registration functions arm: mach-mvebu: use IOMEM() for base address definitions arm: mach-orion5x: use IOMEM() for base address definitions arm: mach-mv78xx0: use IOMEM() for base address definitions arm: mach-kirkwood: use IOMEM() for base address definitions arm: mach-dove: use IOMEM() for base address definitions arm: mach-orion5x: use plus instead of or for address definitions arm: mach-mv78xx0: use plus instead of or for address definitions arm: mach-kirkwood: use plus instead of or for address definitions arm: mach-dove: use plus instead of or for address definitions This branch had quite a few conflicts, in particular with the PCI static map rework from Rob Herring, and a few other context conflicts due to changes in Kconfig, etc. I fixed up conflicts in: arch/arm/Kconfig arch/arm/mach-dove/common.c arch/arm/mach-dove/include/mach/dove.h arch/arm/mach-kirkwood/common.c arch/arm/mach-kirkwood/include/mach/kirkwood.h arch/arm/mach-mv78xx0/common.c arch/arm/mach-mv78xx0/include/mach/mv78xx0.h arch/arm/mach-orion5x/common.c arch/arm/mach-orion5x/include/mach/orion5x.h Signed-off-by: Olof Johansson <olof@lixom.net>
| | * arm: mvebu: add address decoding controller to the DTThomas Petazzoni2012-09-211-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Tested-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| | * arm: mvebu: add basic address decoding support to Armada 370/XPThomas Petazzoni2012-09-212-1/+135
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit adds basic support for address decoding configuration for the Armada 370 and Armada XP SoCs, re-using the infrastructure provided in plat-orion. For now, only a BootROM window is configured on Armada XP, which is needed to get the non-boot CPUs started and is therefore a requirement for SMP support. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Tested-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| | * arm: plat-orion: make bridge_virt_base non-const to support DT use caseThomas Petazzoni2012-09-211-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For the Armada 370 and XP SoCs where the DT is used, we need to fill at runtime the bridge_virt_base field on the orion_addr_map_cfg. Therefore, remove the 'const' qualifier on this field. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Tested-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| | * arm: plat-orion: introduce PLAT_ORION_LEGACY hidden config optionThomas Petazzoni2012-09-212-9/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Until now, the PLAT_ORION configuration option was common to all the Marvell EBU SoCs, and selecting this option had the effect of enabling the MPP code, GPIO code, address decoding and PCIe code from plat-orion, as well as providing access to driver-specific header files from plat-orion/include. However, the Armada 370 and XP SoCs will not use the MPP and GPIO code (instead some proper pinctrl and gpio drivers are in preparation), and generally, we want to move away from plat-orion and instead have everything in mach-mvebu. That said, in the mean time, we want to leverage the driver-specific headers as well as the address decoding code, so we introduce PLAT_ORION_LEGACY. The older Marvell SoCs need to select PLAT_ORION_LEGACY, while the newer Marvell SoCs need to select PLAT_ORION. Of course, when PLAT_ORION_LEGACY is selected, it automatically selects PLAT_ORION. Then, with just PLAT_ORION, you have the address decoding code plus the driver-specific headers. If you add PLAT_ORION_LEGACY to this, you gain the old MPP, GPIO and PCIe code. Again, this is only a temporary solution until we make all Marvell EBU platforms converge into the mach-mvebu directory. This solution avoids duplicating the existing address decoding code into mach-mvebu. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Tested-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| | * arm: plat-orion: use void __iomem pointers for addr-map functionsThomas Petazzoni2012-09-216-16/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The functions for address mapping management now take void __iomem pointers, so we remove the temporary "unsigned long" casts from the mach-*/common.c files. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Tested-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| | * arm: plat-orion: use void __iomem pointers for time functionsThomas Petazzoni2012-09-216-18/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The functions for time management now take void __iomem pointers, so we remove the temporary "unsigned long" casts from the mach-*/common.c files. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Tested-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| | * arm: plat-orion: use void __iomem pointers for MPP functionsThomas Petazzoni2012-09-216-12/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The registration function for MPP now takes void __iomem pointers, so we remove the temporary "unsigned long" casts from the mach-*/mpp.c files. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Tested-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| | * arm: plat-orion: use void __iomem pointers for UART registration functionsThomas Petazzoni2012-09-216-34/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The registration functions for UARTs now take void __iomem pointers, so we remove the temporary "unsigned long" casts from the mach-*/common.c files. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Tested-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| | * arm: mach-mvebu: use IOMEM() for base address definitionsThomas Petazzoni2012-09-212-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We now define all virtual base address constants using IOMEM() so that those are naturally typed as void __iomem pointers, and we do the necessary adjustements in the mach-mvebu code. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Tested-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| | * arm: mach-orion5x: use IOMEM() for base address definitionsThomas Petazzoni2012-09-217-19/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We now define all virtual base address constants using IOMEM() so that those are naturally typed as void __iomem pointers, and we do the necessary adjustements in the mach-orion5x code. Note that we introduce a few temporary additional "unsigned long" casts when calling into plat-orion functions. Those are removed by followup patches converting plat-orion functions to void __iomem pointers as well. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Tested-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| | * arm: mach-mv78xx0: use IOMEM() for base address definitionsThomas Petazzoni2012-09-216-24/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We now define all virtual base address constants using IOMEM() so that those are naturally typed as void __iomem pointers, and we do the necessary adjustements in the mach-mv78xx0 code. Note that we introduce a few temporary additional "unsigned long" casts when calling into plat-orion functions. Those are removed by followup patches converting plat-orion functions to void __iomem pointers as well. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Tested-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| | * arm: mach-kirkwood: use IOMEM() for base address definitionsThomas Petazzoni2012-09-217-27/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We now define all virtual base address constants using IOMEM() so that those are naturally typed as void __iomem pointers, and we do the necessary adjustements in the mach-kirkwood code. Note that we introduce a few temporary additional "unsigned long" casts when calling into plat-orion functions. Those are removed by followup patches converting plat-orion functions to void __iomem pointers as well. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Tested-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| | * arm: mach-dove: use IOMEM() for base address definitionsThomas Petazzoni2012-09-216-26/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We now define all virtual base address constants using IOMEM() so that those are naturally typed as void __iomem pointers, and we do the necessary adjustements in the mach-dove code. Note that we introduce a few temporary additional "unsigned long" casts when calling into plat-orion functions. Those are removed by followup patches converting plat-orion functions to void __iomem pointers as well. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Tested-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| | * arm: mach-orion5x: use plus instead of or for address definitionsThomas Petazzoni2012-09-213-37/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since we are going to use IOMEM() to define many base virtual addresses, we can no longer use binary or to define the individual register addresses ("binary or" arithmetic on pointers is not allowed). Instead, use the more conventional plus operator to do so. The binary or operators were actually not useful because the low-order bits of the base address were always zero, so the usage of the binary or operators was effectively identical to a plus operator. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Tested-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| | * arm: mach-mv78xx0: use plus instead of or for address definitionsThomas Petazzoni2012-09-212-47/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since we are going to use IOMEM() to define many base virtual addresses, we can no longer use binary or to define the individual register addresses ("binary or" arithmetic on pointers is not allowed). Instead, use the more conventional plus operator to do so. The binary or operators were actually not useful because the low-order bits of the base address were always zero, so the usage of the binary or operators was effectively identical to a plus operator. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Tested-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| | * arm: mach-kirkwood: use plus instead of or for address definitionsThomas Petazzoni2012-09-212-65/+65
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since we are going to use IOMEM() to define many base virtual addresses, we can no longer use binary or to define the individual register addresses ("binary or" arithmetic on pointers is not allowed). Instead, use the more conventional plus operator to do so. The binary or operators were actually not useful because the low-order bits of the base address were always zero, so the usage of the binary or operators was effectively identical to a plus operator. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Tested-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| | * arm: mach-dove: use plus instead of or for address definitionsThomas Petazzoni2012-09-212-67/+67
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since we are going to use IOMEM() to define many base virtual addresses, we can no longer use binary or to define the individual register addresses ("binary or" arithmetic on pointers is not allowed). Instead, use the more conventional plus operator to do so. The binary or operators were actually not useful because the low-order bits of the base address were always zero, so the usage of the binary or operators was effectively identical to a plus operator. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Tested-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| * | Merge branch 'kirkwood/cleanup' of ↵Olof Johansson2012-09-221-9/+0
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.infradead.org/users/jcooper/linux into late/kirkwood From Jason Cooper: Misc: - trim includes for board-dnskw.c * 'kirkwood/cleanup' of git://git.infradead.org/users/jcooper/linux: ARM: kirkwood: Trim excess #includes in board-dnskw.c
| | * | ARM: kirkwood: Trim excess #includes in board-dnskw.cJamie Lentin2012-09-221-9/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Lots of code has now moved into the devicetree, leaving a collection of useless header files. Tidy them up. This applies cleanly atop of my previous patch, "[PATCH V2 2/2] ARM: kirkwood: Use devicetree to define DNS-32[05] fan", which also removes gpio-fan.h Signed-off-by: Jamie Lentin <jm@lentin.co.uk> Acked-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| * | | Merge branch 'kirkwood/dt' of git://git.infradead.org/users/jcooper/linux ↵Olof Johansson2012-09-226-77/+71
| |\ \ \ | | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into late/kirkwood From Jason Cooper: New bindings: - iconnect nand and keys - mv_cesa - gpio-fan * 'kirkwood/dt' of git://git.infradead.org/users/jcooper/linux: ARM: kirkwood: Use devicetree to define DNS-32[05] fan hwmon: Add devicetree bindings to gpio-fan Crypto: CESA: Add support for DT based instantiation. ARM: Kirkwood: Describe iconnect nand in DT. ARM: Kirkwood: Describe iconnect keys in DT.
| | * | ARM: kirkwood: Use devicetree to define DNS-32[05] fanJamie Lentin2012-09-222-26/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove more board-specific code by using devicetree to define the fan attached to both boards. Signed-off-by: Jamie Lentin <jm@lentin.co.uk> Acked-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| | * | Crypto: CESA: Add support for DT based instantiation.Andrew Lunn2012-09-222-2/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Based on work by Michael Walle and Jason Cooper. Added support for getting the interrupt number and address of SRAM from DT. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net> Conflicts: arch/arm/mach-kirkwood/board-dt.c
| | * | ARM: Kirkwood: Describe iconnect nand in DT.Arnaud Patard (Rtp)2012-09-222-11/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Define the nand and its partitions in DT and remove them from cmdline Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| | * | ARM: Kirkwood: Describe iconnect keys in DT.Arnaud Patard (Rtp)2012-09-222-38/+18
| | |/ | | | | | | | | | | | | | | | | | | | | | Define the 2 keys found on iconnect in DT. It's also changing the keycodes/ switches to use better ones. Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| * | Merge branch 'kirkwood/defconfig' of ↵Olof Johansson2012-09-221-19/+19
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.infradead.org/users/jcooper/linux into late/kirkwood From Jason Cooper: defconfig: - update kirkwood_defconfig via 'make oldconfig' - Add all Kirkwood DT boards to the defconfig - enable SERIAL_OF_PLATFORM and ORION_WATCHDOG in kirkwood_defconfig * 'kirkwood/defconfig' of git://git.infradead.org/users/jcooper/linux: ARM: Kirkwood: add DT boards to defconfig ARM: Kirkwood: update defconfig
| | * | ARM: Kirkwood: add DT boards to defconfigJason Cooper2012-09-211-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | Also, enable SERIAL_OF_PLATFORM and ORION_WATCHDOG Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| | * | ARM: Kirkwood: update defconfigJason Cooper2012-09-211-19/+6
| | | | | | | | | | | | | | | | Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| * | | Merge branch 'kirkwood/boards' of ↵Olof Johansson2012-09-2222-33/+881
| |\ \ \ | | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.infradead.org/users/jcooper/linux into late/kirkwood * 'kirkwood/boards' of git://git.infradead.org/users/jcooper/linux: ARM: Dove: allow PCI to be disabled ARM: dove: SolidRun CuBox DT ARM: dove: add device tree descriptors ARM: dove: add device tree based machine descriptor ARM: dove: add crypto engine ARM: dove: add clock gating control ARM: dove: unify clock setup ARM: initial DTS support for km_kirkwood arm: add documentation describing Marvell families of SoC ARM: kirkwood: DT descriptor for Seagate FreeAgent Dockstar ARM: kirkwood: DT board setup for Seagate FreeAgent Dockstar ARM: Kirkwood: Iomega ix2-200 DT support Context conflicts in arch/arm/Kconfig and arch/arm/mach-dove/common.c. The new device trees added to arch/arm/mach-kirkwood/Makefile.boot are kept and dealt with in a separate changeset, since moving them out to the new Makefile in this merge commit doesn't work well. Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | ARM: Dove: allow PCI to be disabledRussell King2012-09-213-3/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Allow PCI support for Dove to be disabled. Some platforms do not have anything connected to the PCIe ports, so requiring PCI support to be built into the kernel just wastes space, and presents a lot more config options than are necessary. However, select USB_ARCH_HAS_EHCI so that we can still have EHCI support. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| | * | ARM: dove: SolidRun CuBox DTSebastian Hesselbarth2012-09-212-0/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds basic support for the SolidRun CuBox to DT based mach-dove. There are still some issues related to ongoing orion/mvebu development, e.g. gpio-led will not work as there is no DT pinctrl for dove yet and we don't have board specific setup code. Nevertheless, the DT description is already introduced here. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| | * | ARM: dove: add device tree descriptorsSebastian Hesselbarth2012-09-214-0/+222
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds device tree decriptors for dove SoC and currently supported boards. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| | * | ARM: dove: add device tree based machine descriptorSebastian Hesselbarth2012-09-212-0/+74
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds a generic DT_MACHINE for mach-dove. As with other orion based SoCs there still is some glue code required to make all internal devices work, i.e. auxdata is provided to pass clocks to corresponding device drivers. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| | * | ARM: dove: add crypto engineSebastian Hesselbarth2012-09-211-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds a dove specific setup function for the Marvell CESA crypto engine available on orion based SoCs. Dove setup was just missing a function to call orion_crypto_init with dove specific setup. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| | * | ARM: dove: add clock gating controlSebastian Hesselbarth2012-09-212-19/+92
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds clock gates from the clock gating control register available on dove. All clock gates are hooked up to tclk, except for gigabit ethernet controller (ge) which is a child of gephy to allow both enabled/disabled at the same time. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| | * | ARM: dove: unify clock setupSebastian Hesselbarth2012-09-211-10/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch synchronizes the clock setup of dove with other orion-based platforms. In dove_find_tclk there was a note about DOVE_SAMPLE_HI/LO register to detect tclk. While it might be possible to set a different tclk frequency with reset strapping the Dove datasheets don't tell anything about tclk frequency here. Therefore, I removed that comment. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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