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* Merge branch 'dev/cleanup-clocks' into for-nextKukjin Kim2011-01-051-13/+3
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| * ARM: S5P6450: Tidy register and disable clock usageKukjin Kim2011-01-041-13/+3
| | | | | | | | | | | | | | This patch changes the clock registration code to use the s3c_register_clocks() followed by s3c_disable_clocks() instead of the loops it was using. Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
* | Merge branch 'next-s5p64x0' into for-next-newKukjin Kim2010-12-301-0/+6
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| * | ARM: S5P64X0: Add clock support for RTCAtul Dahiya2010-12-301-0/+6
| |/ | | | | | | | | | | | | | | This patch adds RTC clock for S5P6450. Signed-off-by: Atul Dahiya <atul.dahiya@samsung.com> Signed-off-by: Sangbeom Kim <sbkim73@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
* | ARM: S5P6450: Define clocks for I2SJassi Brar2010-12-301-0/+12
| | | | | | | | | | | | | | | | Define missing controller clocks for the I2S-0,1 blocks. Signed-off-by: Jassi Brar <jassi.brar@samsung.com> Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
* | ARM: S5P64X0: Upgrade platform device for I2SJassi Brar2010-11-191-1/+1
|/ | | | | | | | | | | Add more information to I2S platform_devices in order to prepare them for new controller driver. Also, discard duplicated gpio-cfg. Signed-off-by: Jassi Brar <jassi.brar@samsung.com> Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: Liam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
* ARM: S5P64X0: Set DMA clock disable as defaultSeungwhan Youn2010-10-251-6/+6
| | | | | | | | | This patch modify to DMA operation clock into disable list for default clock setting. Signed-off-by: Seungwhan Youn <sw.youn@samsung.com> Acked-by: Jassi Brar <jassi.brar@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
* ARM: S5P: Add EPLL rate change warningSeungwhan Youn2010-10-251-0/+3
| | | | | | | | | | This patch adds warning about changing EPLL rate to notice that other driver that controls H/W, which is using EPLL, will has unknown effects by this EPLL rate change. Signed-off-by: Seungwhan Youn <sw.youn@samsung.com> Acked-by: Jassi Brar <jassi.brar@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
* ARM: S5P: Reduce duplicated EPLL control codesSeungwhan Youn2010-10-251-2/+2
| | | | | | | | | | | | S5P Samsung SoCs has a EPLL to support various PLL clock sources for other H/W blocks. Until now, to control EPLL, each of SoCs make their own functions in 'mach-s5pxxx/clock.c'. But some of functions, 'xxx_epll_get_rate()' and 'xxx_epll_enable()', are exactly same in all S5P SoCs, so this patch move these duplicated codes to common EPLL functions that use platform wide. Signed-off-by: Seungwhan Youn <sw.youn@samsung.com> Acked-by: Jassi Brar <jassi.brar@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
* ARM: S5P64X0: Update Clock for S5P6440 and S5P6450Kukjin Kim2010-10-181-0/+655
This patch updates regarding clock files for supporting S5P6440 and S5P6450 with one kernel image. The mach-s5p64x0/clock.c is for common of them and there are specific clock files for each SoCs. Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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