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* ARM: dts: uniphier: fix size of sdctrl nodesMasahiro Yamada2017-08-281-1/+1
| | | | | | All registers are located within 0x400 size from the base address. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: dts: uniphier: add AIDET nodesMasahiro Yamada2017-08-281-0/+7
| | | | | | | Add UniPhier AIDET (ARM Interrupt Detector) nodes to support active low interrupts. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: dts: uniphier: add Denali NAND controller nodeMasahiro Yamada2017-08-161-0/+11
| | | | | | | | | Add NAND controller node to LD4, Pro4, sLD8, Pro5, and PXs2. Set up pinctrl to enable 2 chip select lines except Pro4. The CS1 for Pro4 is multiplexed with other peripherals such as UART2, so I did not enable it. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: dts: uniphier use #include instead of /include/Masahiro Yamada2017-08-161-1/+1
| | | | | | To include dt-bindings headers. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: dts: uniphier: use SPDX-License-IdentifierMasahiro Yamada2017-06-061-37/+1
| | | | | | | | | | | | | | Follow the recent trend for the license description, and fix the wrongly stated X11 to MIT. The X11 license text [1] is explicitly for the X Consortium and has a couple of extra clauses. The MIT license text [2] is actually what the current DT files claim. [1] https://spdx.org/licenses/X11.html [2] https://spdx.org/licenses/MIT.html Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: dts: uniphier: fix simple-bus unit address format errorMasahiro Yamada2017-06-061-1/+1
| | | | | | | | | | Compiling the UniPhier DT files with W=1, DTC warns like follows: Warning (simple_bus_reg): Node /soc/system-bus@58c00000/support_card@1,1f00000/ethernet@00000000 simple-bus unit address format error, expected "0" Warning (simple_bus_reg): Node /soc/system-bus@58c00000/support_card@1,1f00000/uart@000b0000 simple-bus unit address format error, expected "b0000" Warning (simple_bus_reg): Node /soc/smpctrl@59800000 simple-bus unit address format error, expected "59801000" Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: dts: uniphier: Use - instead of @ for DT OPP entriesViresh Kumar2017-06-061-8/+8
| | | | | | | | | | | | | | | | | Compiling the DT file with W=1, DTC warns like follows: Warning (unit_address_vs_reg): Node /opp_table0/opp@1000000000 has a unit name, but no reg property Fix this by replacing '@' with '-' as the OPP nodes will never have a "reg" property. Reported-by: Krzysztof Kozlowski <krzk@kernel.org> Reported-by: Masahiro Yamada <yamada.masahiro@socionext.com> Suggested-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: dts: uniphier: remove skeleton.dtsi inclusionMasahiro Yamada2017-03-071-2/+2
| | | | | | | Commit 9c0da3cc61f1 ("ARM: dts: explicitly mark skeleton.dtsi as deprecated") declared that skeleton.dtsi was deprecated. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: dts: uniphier: make 32bit SoC DTSI linearMasahiro Yamada2016-11-051-115/+238
| | | | | | | | | | | | | | | | | | | I notice some mistakes in the SoC DTSI; wrong interrupts properties of timer nodes, mismatch between the node name and the compatible for sdctrl block. Given those problems fixed, the common parts among SoCs are less than I had first expected. The more and more property overrides are making the SoC DTSI unreadable. Stretch out the SoC DTSI files and fix the following: - Fix the 3rd cell of the interrupts property of the timer nodes for Pro4, Pro5, PXs2 - Fix the node name mioctrl to sdctrl for Pro5, PXs2 - Fix the second region of l2 node for PXs2 Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: dts: uniphier: add CPU clocks and OPP table for PXs2 SoCMasahiro Yamada2016-11-051-0/+46
| | | | | | | | Add a CPU clock to every CPU node and a CPU OPP table to use the generic cpufreq driver. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
* ARM: dts: uniphier: change MIO node to SD control nodeMasahiro Yamada2016-10-221-2/+2
| | | | | | | I made a mistake bacuse the Media I/O block is not implemented in these SoCs. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: dts: uniphier: use clock/reset controllersMasahiro Yamada2016-08-311-19/+31
| | | | | | | | The UniPhier reset controller driver has been merged. Enable it. Also, replace the fixed-rate clocks with the dedicated clock drivers. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: dts: uniphier: switch over to PSCIMasahiro Yamada2016-08-301-1/+4
| | | | | | Use PSCI for enable-method instead of SoC specific implementation. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: dts: uniphier: match DT names to other projects and documentsMasahiro Yamada2016-08-301-0/+210
All UniPhier device trees have the common prefix "uniphier-", so "ph1-" is just making names longer. Recent documents and other projects are not using PH1- prefixes any more. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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