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* ARM: tegra: apalis: Properly align pin namesThierry Reding2015-09-151-76/+76
| | | | | | | Align pin names on subsequent lines with the first the name of the first pin in the first line. Signed-off-by: Thierry Reding <treding@nvidia.com>
* ARM: tegra: apalis: Add digital audio pin muxingMarcel Ziswiler2015-09-151-0/+24
| | | | | | | | | Add Apalis digital audio pin muxing which is e.g. used for HDA operation together with the Realtek HDA codec as found on the Apalis Evaluation board. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
* ARM: tegra: apalis: Add comment concerning eMMCMarcel Ziswiler2015-09-151-0/+1
| | | | | | | | Instead of adding an otherwise unused emmc label just add a comment describing what the SDHCI is routed to. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
* ARM: tegra: apalis: Fix pin muxingMarcel Ziswiler2015-09-151-9/+9
| | | | | | | | Fix pin muxing which got broken due to certain stuff having been fixed or renamed since. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
* ARM: tegra: apalis: Fix HDMI power suppliesMarcel Ziswiler2015-09-151-5/+27
| | | | | | | | | Fix HDMI supplies (both regular VDD as well as PLL ones) being switched by the TPS65911 PMIC's GPIO6 aka EN_VDD_HDMI by introducing two new GPIO switched fixed regulators avdd_hdmi_pll_1v8_reg and avdd_hdmi_3v3_reg. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
* ARM: tegra: apalis: Update hardware revisions compatibility commentMarcel Ziswiler2015-09-151-2/+3
| | | | | | | | Update introductory comment about what exact hardware revisions this device tree is compatible with as a hint for our customers. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
* ARM: tegra: apalis/colibri t30: fix on-module 5v0 suppliesMarcel Ziswiler2014-08-241-1/+10
| | | | | | | | | | | | | | | | | Working on Gigabit/PCIe support in U-Boot for Apalis T30 I realised that the current device tree source includes for our modules only happen to work due to referencing the on-carrier 5v0 supply from USB which is not at all available on-module. The modules actually contain TPS60150 charge pumps to generate the PMIC required 5 volts from the one and only 3.3 volt module supply. This patch fixes this. (Note: When back-porting this to v3.16 stable releases, simply drop the change to tegra30-apalis.dtsi; that file was added in v3.17) Cc: <stable@vger.kernel.org> #v3.16+ Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
* ARM: tegra: Migrate Apalis T30 PCIe power supply schemeMarcel Ziswiler2014-07-171-3/+8
| | | | | | | | | This migration is required for continued PCIe operation after commit d3c7e24b84fc "PCI: tegra: Implement accurate power supply scheme". Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com> [swarren: added commit subject and shortened hash] Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: initial support for apalis t30Marcel Ziswiler2014-07-171-0/+673
This patch adds the device tree to support Toradex Apalis T30, a computer on module which can be used on different carrier boards. The module consists of a Tegra 3 SoC, two PMICs, 1 or 2 GB of DDR3L RAM, eMMC, an LM95245 temperature sensor chip, an i210 resp. i211 gigabit Ethernet controller, an STMPE811 ADC/touch controller as well as two MCP2515 CAN controllers. Furthermore, there is an SGTL5000 audio codec which is not yet supported. Anything that is not self contained on the module is disabled by default. The device tree for the Evaluation Board includes the modules device tree and enables the supported peripherals of the carrier board (the Evaluation Board supports almost all of them). While at it also add the device tree binding documentation for Apalis T30. Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com> [swarren: fixed some node sort orders] Signed-off-by: Stephen Warren <swarren@nvidia.com>
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