summaryrefslogtreecommitdiffstats
path: root/arch/arm/boot/dts/r8a7794.dtsi
Commit message (Collapse)AuthorAgeFilesLines
* ARM: dts: r8a7794: Fix W=1 dtc warningsGeert Uytterhoeven2016-05-301-6/+7
| | | | | | | | | | Warning (unit_address_vs_reg): Node /cache-controller@1 has a unit name, but no reg property Move the cache-controller node under the cpus node, and make its unit name and reg property match the MPIDR value. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: dts: r8a7794: Reference both DMA controllersNiklas Söderlund2016-05-301-44/+75
| | | | | | | | | | R-Car Gen2 have two DMA controllers, which are equivalent. Add references to both dmac0 and dmac1 so the driver can choose which one to use. Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* Merge tag 'armsoc-late' of ↵Linus Torvalds2016-05-241-53/+63
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC late DT updates from Arnd Bergmann: "This is a collection of a few late fixes and other misc stuff that had dependencies on things being merged from other trees. The Renesas R-Car power domain handling, and the Nvidia Tegra USB support both hand notable changes that required changing the DT binding in a way that only provides compatibility with old DT blobs on new kernels but not vice versa. As a consequence, the DT changes are based on top of the driver changes and are now in this branch. For NXP i.MX and Samsung Exynos, the changes in here depend on other changes that got merged through the clk maintainer tree" * tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (35 commits) ARM: dts: exynos: Add support of Bus frequency using VDD_INT for exynos5422-odroidxu3 ARM: dts: exynos: Add bus nodes using VDD_INT for Exynos542x SoC ARM: dts: exynos: Add NoC Probe dt node for Exynos542x SoC ARM: dts: exynos: Add support of bus frequency for exynos4412-trats/odroidu3 ARM: dts: exynos: Expand the voltage range of buck1/3 regulator for exynos4412-odroidu3 ARM: dts: exynos: Add support of bus frequency using VDD_INT for exynos3250-rinato ARM: dts: exynos: Add exynos4412-ppmu-common dtsi to delete duplicate PPMU nodes ARM: dts: exynos: Add bus nodes using VDD_MIF for Exynos4210 ARM: dts: exynos: Add bus nodes using VDD_INT for Exynos4x12 ARM: dts: exynos: Add bus nodes using VDD_MIF for Exynos4x12 ARM: dts: exynos: Add bus nodes using VDD_INT for Exynos3250 ARM: dts: exynos: Add DMC bus frequency for exynos3250-rinato/monk ARM: dts: exynos: Add DMC bus node for Exynos3250 ARM: tegra: Enable XUSB on Nyan ARM: tegra: Enable XUSB on Jetson TK1 ARM: tegra: Enable XUSB on Venice2 ARM: tegra: Add Tegra124 XUSB controller ARM: tegra: Move Tegra124 to the new XUSB pad controller binding ARM: dts: r8a7794: Use SYSC "always-on" PM Domain ARM: dts: r8a7793: Use SYSC "always-on" PM Domain ...
| * ARM: dts: r8a7794: Use SYSC "always-on" PM DomainGeert Uytterhoeven2016-04-271-53/+53
| | | | | | | | | | | | | | | | | | | | Hook up all devices that are part of the CPG/MSTP Clock Domain to the SYSC "always-on" PM Domain, for a more consistent device-power-area description in DT. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * ARM: dts: r8a7794: Add SYSC PM DomainsGeert Uytterhoeven2016-04-271-0/+10
| | | | | | | | | | | | | | | | | | | | Add a device node for the System Controller. Hook up the Cortex-A7 CPU cores and the Cortex-A7 L2 cache/SCU to their respective PM Domains. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | ARM: dts: r8a7794: Don't disable referenced optional clocksGeert Uytterhoeven2016-04-271-2/+0
|/ | | | | | | | | | | | clk_get() on a disabled clock node will return -EPROBE_DEFER, which can cause drivers to be deferred forever if such clocks are referenced in their devices' clocks properties. Update the various disabled external clock nodes to default to a frequency of 0, but don't disable them, to prevent this. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: dts: r8a7794: Add IIC nodesSimon Horman2016-04-201-0/+28
| | | | | | | | | Add IIC nodes to r8a7794 device tree. Based on similar work for the r8a7793 by Laurent Pinchart. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
* ARM: dts: r8a7794: add IIC clocksSimon Horman2016-04-201-3/+6
| | | | | | | | | Add IIC clocks to r8a7794 device tree. Based on similar work for the r8a7790 by Wolfram Sang. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
* ARM: dts: r8a7794: add CAN nodes to device treeSimon Horman2016-04-201-0/+22
| | | | | | | | | | Add CAN nodes to r8a7794 device tree. Based on work by Sergei Shtylyov for the r8a7791 SoC. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>
* ARM: dts: r8a7794: add CAN clocks to device treeSimon Horman2016-04-201-7/+26
| | | | | | | | | Add CAN nodes to r8a7794 device tree. Based on work by Sergei Shtylyov for the r8a7791 SoC. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>
* ARM: dts: r8a7794: Remove unnecessary clock-output-names propertiesSimon Horman2016-03-281-44/+22
| | | | | | | | | | | | | | | * Fixed rate and fixed factor clocks do not require an clock-output-names property. * Since 07705583e920fef6 ("clk: shmobile: div6: Make clock-output-names optional") Renesas div6 clocks do not require a clock-output-names property. In the above cases there is only one clock output and its name is taken from that of the clock node. Accordingly, remove the unnecessary clock-output-names properties and as necessary update the node names. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
* ARM: dts: r8a7794: add EtherAVB supportSergei Shtylyov2016-02-191-0/+12
| | | | | | | | | | Define the generic R8A7794 part of the EtherAVB device node. Based on the commit 46ece349aa54 ("ARM: shmobile: r8a7791: add EtherAVB DT support"). Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: dts: r8a7794: add EtherAVB clockSergei Shtylyov2016-02-191-3/+4
| | | | | | | | | | Add the EtherAVB clock to the R8A7794 device tree. Based on the commit eaa870b30553 ("ARM: shmobile: r8a7791: add EtherAVB clock"). Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: dts: r8a7794: Add L2 cache-controller nodeGeert Uytterhoeven2016-02-191-0/+8
| | | | | | | | | | Add a device node for the L2 cache, and link the CPU nodes to it. The L2 cache for the Cortex-A7 CPU cores is 512 KiB large (organized as 64 KiB x 8 ways). Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: dts: r8a7794: use fallback pci compatibility stringSimon Horman2016-02-151-2/+2
| | | | | | Use recently added fallback compatibility string in r8a7794 device tree. Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: dts: r8a7794: Add BRG support for (H)SCIFGeert Uytterhoeven2016-02-091-18/+36
| | | | | | | | | | | | | | | | Add the device node for the external SCIF_CLK. The presence of the SCIF_CLK crystal and its clock frequency depends on the actual board. Add the two optional clock sources (ZS_CLK and SCIF_CLK for the internal resp. external clock) for the Baud Rate Generator for External Clock (BRG) to all SCIF and HSCIF device nodes. This increases the range and accuracy of supported baud rates on (H)SCIF. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: dts: r8a7794: Rename the serial port clock to fckLaurent Pinchart2016-02-091-18/+18
| | | | | | | | | The clock is really the device functional clock, not the interface clock. Rename it. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: dts: r8a7794: Add SCIF fallback compatibility stringsGeert Uytterhoeven2016-02-091-18/+36
| | | | | Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: dts: r8a7794: use GIC_* definesSimon Horman2016-01-291-117/+117
| | | | | | | Use GIC_* defines for GIC interrupt cells in r8a7794 device tree. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
* ARM: dts: r8a7794: use fallback usbhs compatibility stringSimon Horman2016-01-251-1/+1
| | | | | | | Use recently added fallback compatibility string in r8a7794 device tree. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
* ARM: shmobile: r8a7794: IPMMU compat string SoC part number updateMagnus Damm2015-12-151-6/+6
| | | | | | | | | | Update IPMMU compat strings to include SoC part number. By specifying SoC part number in DT it becomes possible to implement SoC specific features in the IPMMU driver. Signed-off-by: Magnus Damm <damm+renesas@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: r8a7794: dtsi: add internal delay for i2c IPsWolfram Sang2015-12-151-0/+6
| | | | | Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: r8a7794: remove deprecated #gpio-range-cells from dtsiWolfram Sang2015-11-251-1/+0
| | | | | | | | | Commit a1bc260bb5f5d9 ("gpio: clean up gpio-ranges documentation") declares the above property deprecated. That was more than 2 years ago. Remove it, so it doesn't get copied around needlessly. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: r8a7794: Use SoC specific binding for rcar-dmac nodesSimon Horman2015-11-171-2/+2
| | | | | | | | | | | | | | | | | | Use the new SoC specific binding for rcar-dmac and the generic binding as a fall-back in the r8a7794 device tree. In general Renesas hardware is not documented to the extent where the relationship between IP blocks on different SoCs can be assumed although they may appear to operate the same way. Furthermore the documentation typically does not specify a version for individual IP blocks. For these reasons a convention of using the SoC name in place of a version and providing SoC-specific compat strings has been adopted. Although not universally liked this convention is used in the bindings for most drivers for Renesas hardware. The purpose of this patch is to update the Renesas R-Car DMA Controller nodes to follow this convention. Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: r8a7794: Add DU node to device treeLaurent Pinchart2015-11-171-0/+28
| | | | | | | | | Add the DU device with a disabled state. Boards that want to enable the DU need to specify the output topology. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Magnus Damm <damm+renesas@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: r8a7794: Add DU0 clockLaurent Pinchart2015-11-171-3/+4
| | | | | | | | | The DU0 clock is an MSTP clock, child of the CPG ZX clock. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Magnus Damm <damm+renesas@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: r8a7794: Disable all IPMMU nodes by defaultMagnus Damm2015-10-231-0/+2
| | | | | | | | | The r8a7794 IPMMU nodes for MX and DS are currently lacking a line containing 'status = "disabled"', fix this by making sure they are disabled like all other IPMMU nodes. Signed-off-by: Magnus Damm <damm+renesas@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: r8a7794 dtsi: Remove bogus imp_clk nodeGeert Uytterhoeven2015-10-191-8/+0
| | | | | | | R-Car E2 does not have an IMP core or an IMP clock. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: r8a7794: add HS-USB DT supportSergei Shtylyov2015-10-051-0/+12
| | | | | | | | Define the R8A7794 generic part of the HS-USB device node. It is up to the board file to enable the device. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: r8a7794: link PCI USB devices to USB PHYSergei Shtylyov2015-10-021-0/+28
| | | | | | | | Describe the PCI USB devices that are behind the PCI bridges, adding necessary links to the USB PHY device. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: r8a7794: add USB PHY DT supportSergei Shtylyov2015-10-021-0/+20
| | | | | | | | Define the R8A7794 generic part of the USB PHY device node. It is up to the board file to enable the device. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: r8a7794: add internal PCI bridge nodesSergei Shtylyov2015-09-301-0/+42
| | | | | | | Add device nodes for the R8A7794 internal PCI bridge devices. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: r8a7794: add VIN DT supportSergei Shtylyov2015-09-141-0/+20
| | | | | | | | Define the generic R8A7794 part of the VIN[01] device nodes. Add aliases for the VIN[01] device nodes. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: r8a7794: add I2C DT supportSergei Shtylyov2015-09-141-0/+73
| | | | | | | | | Define the generic R8A7794 parts of the I2C[0-5] device nodes. Based on the original patch by Koji Matsuoka <koji.matsuoka.xm@renesas.com>. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: r8a7794: add QSPI DT supportSergei Shtylyov2015-09-141-0/+18
| | | | | | | | | | Define the generic R8A7794 part of the QSPI device node. Based on original patch by Hisashi Nakamura <hisashi.nakamura.ak@renesas.com>. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: r8a7794: add GPIO DT supportSergei Shtylyov2015-09-141-0/+91
| | | | | | | | | | Describe GPIO[0-6] controllers in the R8A7794 device tree. Based on original patch by Hisashi Nakamura <hisashi.nakamura.ak@renesas.com>. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: r8a7794: add GPIO clocksSergei Shtylyov2015-09-141-8/+14
| | | | | | | | | | | Describe the GPIO clocks in the R8A7794 device tree. Based on the original patch by Koji Matsuoka <koji.matsuoka.xm@renesas.com>. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: r8a7794 dtsi: Add CPG/MSTP Clock DomainGeert Uytterhoeven2015-08-121-0/+29
| | | | | | | | | | | | | | Add an appropriate "#power-domain-cells" property to the cpg_clocks device node, to create the CPG/MSTP Clock Domain. Add "power-domains" properties to all device nodes for devices that are part of the CPG/MSTP Clock Domain and can be power-managed through an MSTP clock. This applies to most on-SoC devices, which have a one-to-one mapping from SoC device to DT device node. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: r8a7794: add MMCIF DT supportSergei Shtylyov2015-08-031-0/+11
| | | | | | | | | Define the generic R8A7794 part of the MMCIF0 device node. Based on the orginal patch by Shinobu Uehara <shinobu.uehara.xc@renesas.com>. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: r8a7794: add PFC DT supportSergei Shtylyov2015-07-291-0/+6
| | | | | | | | | | Define the generic R8A7794 part of the PFC device node. Based on original patch by Hisashi Nakamura <hisashi.nakamura.ak@renesas.com>. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Acked-by: by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: r8a7794 dtsi: Use "arm,gic-400" for GICGeert Uytterhoeven2015-07-061-1/+1
| | | | | | | | | | | | | Replace the "arm,cortex-a15-gic" compatible value for the GIC by "arm,gic-400", as the R-Car Gen2 GIC is assumed to be a GIC-400. This has been confirmed by reading the GICD_IIDR register (on r8a7791), which reports 0x0200043b (GIC-400 = 0x02, ARM = 0x43b). This has no effect on runtime behavior, as currently the GIC driver treats both compatible values the same. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: r8a7794 dtsi: Describe DMA for the serial portsGeert Uytterhoeven2015-05-261-0/+36
| | | | | | | Add DMA properties to all SCIF, SCIFA, SCIFB, and HSCIF device nodes. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: r8a7794: Add IRQC clock to device treeGeert Uytterhoeven2015-05-111-0/+9
| | | | | | | | Link the external IRQ controller irqc0 to the IRQC module clock, so it can be power managed using that clock. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: r8a7794: add SDHI DT supportSergei Shtylyov2015-02-241-0/+24
| | | | | | | | | | Define the generic R8A7794 parts of the SDHI[012] device nodes. Based on the orginal patch by Shinobu Uehara <shinobu.uehara.xc@renesas.com>. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: r8a7794: Correct SDHI clock base address, labels and output-namesSimon Horman2015-02-241-6/+6
| | | | | | | | | | | | | | | | * Correct base address of SD3 div6 clk. * Update div6 clock node labels There appears to have been some inconsistency and confusion here as on the r8a7790 these clocks are referred to as SD(HI)1 and SD(HI)2 while on the r8a7791 and r8a7794 they are referred to as SD(HI)2 and SD(HI)3. This has no run-time affect as the clock nodes are not currently used. Fixes: 8e181633e6ca96049 ("ARM: shmobile: r8a7794: Add SDHI clocks to device tree") Reported-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reported-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
* ARM: shmobile: r8a7794: Add ethernet controller to device treeLaurent Pinchart2015-02-241-0/+11
| | | | | | | | Add a DT node for the on-SoC ethernet controller device. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: r8a7794: Add IPMMU DT nodesLaurent Pinchart2015-02-241-0/+50
| | | | | | | | Add the six IPMMU instances found in the r8a7794 to DT with a disabled status. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: r8a7794: Add DMAC devices to DTLaurent Pinchart2015-02-241-0/+60
| | | | | | | Instantiate the two system DMA controllers in the r8a7794 device tree. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: r8a7794: Add MMCIF clock to device treeShinobu Uehara2014-12-211-4/+11
| | | | | | Signed-off-by: Shinobu Uehara <shinobu.uehara.xc@renesas.com> [horms: omitted device node; only add clock] Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: r8a7794: Add SDHI clocks to device treeShinobu Uehara2014-12-211-1/+19
| | | | | | Signed-off-by: Shinobu Uehara <shinobu.uehara.xc@renesas.com> [horms: omitted device nodes; only add clock] Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
OpenPOWER on IntegriCloud