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* ARM: dts: r8a73a4: Add clock for CA15 CPU0 coreGeert Uytterhoeven2017-10-161-0/+1
| | | | | | | | | Improve hardware description by adding a clocks property to the device node corresponding to the primary CA15 CPU core, which is for now the only one described. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: dts: r8a73a4: update PFC node name to pin-controllerSimon Horman2017-05-151-1/+1
| | | | | | | | | | | | | | The device trees for Renesas SoCs use either pfc or pin-controller as the node name for the PFC device. This patch is intended to take a step towards unifying the node name used as pin-controller which appears to be the more generic of the two and thus more in keeping with the DT specs. My analysis is that this is a user-visible change to the extent that kernel logs, and sysfs entries change from e6050000.pfc and pfc@e6050000 to e6050000.pin-controller and pin-controller@e6050000. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
* ARM: dts: r8a73a4: Add INTC-SYS clock to device treeGeert Uytterhoeven2017-03-101-4/+9
| | | | | | | | | | | Link the ARM GIC to the INTC-SYS module clock and the C4 power domain, so it can be power managed using that clock in the future. Note that currently the GIC-400 driver doesn't support module clocks nor Runtime PM, so this must be handled as a critical clock. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: dts: r8a73a4: Remove unit-addresses and regs from integrated cachesGeert Uytterhoeven2017-03-071-4/+2
| | | | | | | | | | The Cortex-A15/A7 cache controllers are integrated controllers, and thus the device nodes representing them should not have unit-addresses or reg properties. Fixes: b0da45c60d2f7b08 ("ARM: dts: r8a73a4: Fix W=1 dtc warnings") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: DTS: Fix register map for virt-capable GICMarc Zyngier2017-02-071-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Since everybody copied my own mistake from the DT binding example, let's address all the offenders in one swift go. Most of them got the CPU interface size wrong (4kB, while it should be 8kB), except for both keystone platforms which got the control interface wrong (4kB instead of 8kB). In a few cases where I knew for sure what implementation was used, I've added the "arm,gic-400" compatible string. I'm 99% sure that this is what everyone is using, but short of having the TRM for all the other SoCs, I've left them alone. Acked-by: Shawn Guo <shawnguo@kernel.org> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Santosh Shilimkar <ssantosh@kernel.org> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Antoine Tenart <antoine.tenart@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* ARM: dts: r8a73a4: Use SoC-specific compat string for mmcifSimon Horman2017-01-031-2/+2
| | | | | | | | | Use the SoC-specific compat string for mmcif in DT for the r8a73a4 SoC. This is in keeping with the use of compat strings for mmcif for other Renesas ARM based SoCs. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
* ARM: dts: r8a73a4: Add device node for PRRGeert Uytterhoeven2016-11-231-0/+5
| | | | | | | | Add a device node for the Product Register, which provides SoC product and revision information. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: dts: r8a73a4: Fix W=1 dtc warningsGeert Uytterhoeven2016-05-301-16/+18
| | | | | | | | | | | Warning (unit_address_vs_reg): Node /cache-controller@0 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /cache-controller@1 has a unit name, but no reg property Move the cache-controller nodes under the cpus node, and make their unit names and reg properties match the MPIDR values. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: dts: r8a73a4: Remove unnecessary clock-output-names propertiesSimon Horman2016-03-281-50/+25
| | | | | | | | | | | | | | | | | | | | * Fixed rate and fixed factor clocks do not require an clock-output-names property. * Since 07705583e920fef6 ("clk: shmobile: div6: Make clock-output-names optional") Renesas div6 clocks do not require a clock-output-names property. In the above cases there is only one clock output and its name is taken from that of the clock node. Accordingly, remove the unnecessary clock-output-names properties and as necessary update the node names. The clock-output-names property is left in place for the zb_clk which is thus treated as a special case as the MSTP clock driver (clk-mstp.c) explicitly looks for a clock with node name zb_clk for the r8a73a4 and sh73a0 SoCs. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
* ARM: dts: r8a73a4: Add L2 cache-controller nodesGeert Uytterhoeven2016-02-191-0/+17
| | | | | | | | | | | | | | Add device nodes for the L2 caches, and link the CPU node to its L2 cache node. The L2 cache for the Cortex-A15 CPU cores is 1 MiB large (organized as 64 KiB x 16 ways), and located in PM domain A3SM. The L2 cache for the Cortex-A7 CPU cores is 512 KiB large (organized as 64 KiB x 8 ways), and located in PM domain A3KM. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: dts: r8a73a4: Rename the serial port clock to fckLaurent Pinchart2016-02-091-6/+6
| | | | | | | | | The clock is really the device functional clock, not the interface clock. Rename it. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: dts: r8a73a4: use GIC_* definesSimon Horman2016-01-291-106/+106
| | | | | | | Use GIC_* defines for GIC interrupt cells in r8a73a4 device tree. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
* ARM: shmobile: r8a73a4 dtsi: Add missing "gpio-ranges" to gpio nodeGeert Uytterhoeven2015-08-051-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If a GPIO driver uses gpiochip_add_pin_range() (which is usually the case for GPIO/PFC combos), the GPIO hogging mechanism configured from DT doesn't work: requesting hog GPIO led1-high (chip r8a73a4_pfc, offset 28) failed The actual error code is -517 == -EPROBE_DEFER. The problem is that PFC+GPIO registration is handled in multiple steps: 1. pinctrl_register(), 2. gpiochip_add(), 3. gpiochip_add_pin_range(). Configuration of the hogs is handled in gpiochip_add(): gpiochip_add of_gpiochip_add of_gpiochip_scan_hogs gpiod_hog gpiochip_request_own_desc __gpiod_request chip->request pinctrl_request_gpio pinctrl_get_device_gpio_range However, at this point the GPIO controller hasn't been added to pinctrldev_list yet, so the range can't be found, and the operation fails with -EPROBE_DEFER. To fix this, add a "gpio-ranges" property to the gpio device node, so the ranges are added by of_gpiochip_add_pin_range(), which is called by of_gpiochip_add() before the call to of_gpiochip_scan_hogs(). Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: r8a73a4 dtsi: Use "arm,gic-400" for GICGeert Uytterhoeven2015-07-061-1/+1
| | | | | | | | | | | | | Replace the "arm,cortex-a15-gic" compatible value for the GIC by "arm,gic-400", as the documentation states it's a GIC-400. This has been confirmed by reading the GICD_IIDR register, which reports 0x0200043b (GIC-400 = 0x02, ARM = 0x43b). This has no effect on runtime behavior, as currently the GIC driver treats both compatible values the same. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: r8a73a4: Add IRQC clock to device treeGeert Uytterhoeven2015-05-111-4/+7
| | | | | | | | | Link the external IRQ controllers irqc0 and irqc1 to the IRQC module clock, so they can be power managed using that clock. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> [horms: corrected typo in changelog to refer to r8a73a4] Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: r8a73a4 dtsi: Add PM domain supportGeert Uytterhoeven2015-02-251-0/+177
| | | | | | | | | | | | | | | | | | | Add a device node for the System Controller, with subnodes that represent the hardware power area hierarchy. Hook up all devices to their respective PM domains. Add a minimal device node for the Coresight-ETM hardware block, and hook it up to the D4 PM domain, so the R-Mobile System Controller driver can keep the domain powered, until the new Coresight code handles runtime PM. The System Controller is also used by the R-Mobile Reset driver, which can now restart the system. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: r8a73a4: Move pfc node to work around probe ordering bugGeert Uytterhoeven2015-02-241-23/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | Currently the pin function controller (which is also a GPIO controller) is instantiated before the interrupt controllers due to the order in the DTS. At that time, the irq domains for the interrupt controllers referenced by its interrupts-extended property cannot be found yet: irq: no irq domain found for /interrupt-controller@e61c0000 ! Nevertheless, the core OF probing code ignores this failure, besides a debug message that's not normally printed: not all legacy IRQ resources mapped for pfc and continues initialization of the device. Then, the sh-pfc driver cannot find any IRQ resources, and thinks no interrupts are available, causing gpio-keys to fail later: gpio-keys keyboard: Unable to claim irq 0; error -22 gpio-keys: probe of keyboard failed with error -22 Move the pin function controller node after the interrupt controller nodes it references to work around the bug in the core OF probing code. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: r8a73a4 dtsi: Add Bus State Controller nodeGeert Uytterhoeven2015-02-241-0/+10
| | | | | | | | | | | | | Add a node for the Bus State Controller (BSC) on r8a73a4, to which multiple external devices can be connected. The BSC is driven by the ZB clock, and located in PM domain C4. A reference to the latter will be added later. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Tested-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Acked-by: Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: r8a73a4: Add MSTP clock assignments to DTUlrich Hecht2015-02-241-0/+30
| | | | | | | | | | Assigns clocks to dmac, i2c*, cmt1, thermal, scif*, sdhi*, and mmcif*. Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: r8a73a4: Common clock framework DT descriptionUlrich Hecht2015-02-241-0/+294
| | | | | | | | | | Declares all r8a73a4 clocks supported by the legacy clock framework. Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: r8a73a4 dtsi: Add memory-controller nodesGeert Uytterhoeven2015-01-151-0/+10
| | | | | | | | | | | Add device nodes for the two DDR Bus State Controllers (DBSC). The DBSCs are located in the A3BC PM domain, which must not be powered down, else the system will crash. A reference to the A3BC PM domain will be added later. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* Merge tag 'renesas-dt2-for-v3.19' of ↵Arnd Bergmann2014-11-211-9/+9
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt Pull "Second Round of Renesas ARM Based SoC DT Updates for v3.19" from Simon Horman: * Add labels for LEDs on kzm9g-reference and koelsch * Add Sound support to r8a7790/lager and r8a7791/koelsch * Add IIC DMA nodes to r8a7790 and r8a7791 * Use SoC-specific IIC compatible properties on sh73a0 and r8a73a4 * Add SGX, MMP and VSP1 clocks to r8a7794 * Add USBDMAC{0,1} clocks to r8a7790 and r8a7791 * tag 'renesas-dt2-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (29 commits) ARM: shmobile: r8a7791: add USBDMAC{0,1} clocks to device tree ARM: shmobile: r8a7790: add USBDMAC{0,1} clocks to device tree ARM: shmobile: r8a7794: Add MMP and VSP1 clocks to device tree ARM: shmobile: r8a7794: Add SGX clock to device tree ARM: shmobile: koelsch: add Volume Ramp usage on comment ARM: shmobile: lager: add Volume Ramp usage on comment ARM: shmobile: r8a7791: add DMA nodes for IIC ARM: shmobile: r8a7790: add DMA nodes for IIC ARM: shmobile: kzm9g-reference dts: Add labels for the LEDs ARM: shmobile: koelsch dts: Add labels for the LEDs ARM: shmobile: sh73a0 dtsi: Add SoC-specific IIC compatible properties ARM: shmobile: r8a73a4 dtsi: Add SoC-specific IIC compatible properties ARM: shmobile: koelsch: Sound DMA support via DVC on DTS ARM: shmobile: koelsch: Sound DMA support via SRC on DTS ARM: shmobile: koelsch: Sound DMA support via BUSIF on DTS ARM: shmobile: koelsch: Sound DMA support on DTS ARM: shmobile: koelsch: Sound PIO support on DTS ARM: shmobile: koelsch: fixup I2C2 clock frequency ARM: shmobile: lager: Sound DMA support via DVC on DTS ARM: shmobile: lager: Sound DMA support via SRC on DTS ... Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * ARM: shmobile: r8a73a4 dtsi: Add SoC-specific IIC compatible propertiesGeert Uytterhoeven2014-11-191-9/+9
| | | | | | | | | | | | | | | | | | | | | | | | The IIC nodes used the generic compatible properties only. This may cause the driver to fail when using Standard Speed on IIC masters where the operational clock is driven by the 130 MHz HP clock. Add the SoC-specific compatible property to fix this. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | Merge tag 'renesas-dt-cleanups2-for-v3.19' of ↵Arnd Bergmann2014-11-191-4/+4
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt Pull "Second Round of Renesas ARM Based SoC DT Cleanups for v3.19" from Simon Horman: * Drop console= bootargs parameter on alt * Correct scifb* naming on r8a73a4 * Drop 0x unit-address prefixes * Remove unnecessary MMC options * tag 'renesas-dt-cleanups2-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: alt dts: Drop console= bootargs parameter ARM: shmobile: r8a73a4: fix scifb* naming ARM: shmobile: kzm9g-reference dts: Drop bogus 0x unit-address prefix ARM: shmobile: r8a7791 dtsi: Drop bogus 0x unit-address prefix ARM: shmobile: r8a7790 dtsi: Drop bogus 0x unit-address prefix ARM: shmobile: r8a7790 dtsi: Remove unnecessary MMC options ARM: shmobile: r8a7779 dtsi: Remove unnecessary MMC options ARM: shmobile: r8a7778 dtsi: Remove unnecessary MMC options Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * ARM: shmobile: r8a73a4: fix scifb* namingUlrich Hecht2014-11-051-4/+4
| | | | | | | | | | | | | | Ports are named scifb0-3, not scifb2-5. Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | ARM: shmobile: r8a73a4: Add SoC-specific CMT compatible propertyGeert Uytterhoeven2014-10-301-1/+1
| | | | | | | | | | | | | | | | | | The CMT1 timer used the generic compatible property only. Add the SoC-specific one, which is already documented, to make it future proof. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | ARM: shmobile: r8a73a4: Add CMT1 nodeSimon Horman2014-10-241-0/+11
|/ | | | | | | This describes all of the CMT1 hardware of the r8a73a4. The node is disabled and may be enabled as necessary by board DTS files. Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: r8a73a4: sort dtsi file by addressUlrich Hecht2014-10-241-116/+116
| | | | | | | Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> [horms+renesas@verge.net.au: updated for removal of dma-multiplexer base address] Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: r8a73a4: Remove spurious dma-multiplexer base addressesSimon Horman2014-10-241-1/+1
| | | | | | | | As there is no reg property the dma-multiplexer nodes should not include @... Reported-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: r8a73a4 dtsi: Add SoC-specific irqc compatible propertyGeert Uytterhoeven2014-09-161-2/+2
| | | | | | | | The interrupt controller used the generic compatible property only. Add the SoC-specific one, to make it future proof. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: r8a73a4 dtsi: Add SoC-specific thermal compatible propertyGeert Uytterhoeven2014-09-011-1/+1
| | | | | | | | The thermal node used the generic compatible property only. Add the SoC-specific one, to make it future proof. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: r8a73a4: Add SCIF nodesSimon Horman2014-07-121-0/+42
| | | | | | | | This describes all of the SCIF hardware of the r8a73a4. Each node is disabled and may be enabled as necessary by board DTS files. Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: dts: Move interrupt-parent property to root nodeLaurent Pinchart2014-05-131-18/+0
| | | | | | | | | | There's no need to duplicate the interrupt-parent property in all DT nodes as the kernel automatically walks parent nodes to find the property. Specify it once in the root node only. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: r8a73a4: Specify PFC interrupts in DTLaurent Pinchart2013-12-191-0/+16
| | | | | | Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: Use interrupt macros in r8a73a4 and r8a7778 DT filesLaurent Pinchart2013-12-101-25/+25
| | | | | Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: Use interrupt macros in SoC DT filesLaurent Pinchart2013-12-101-31/+77
| | | | | Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: r8a73a4: tidyup DT node namingKuninori Morimoto2013-12-101-5/+5
| | | | | | | | According to ePAPR spec, this patch tidies up DT node name and related clock. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* Merge tag 'omap-for-v3.13/quirk-signed' of ↵Kevin Hilman2013-10-141-3/+3
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt From Tony Lindgren: Changes needed to prepare for making omap3 device tree only: - Always build in board-generic, and add pdata quirks and auxdata support for it so we have all the pdata related quirks in the same place. - Merge of the drivers/pinctrl changes that are needed for PM to continue working on omap3 and also needed for other omaps eventually. The three pinctrl related patches have been acked by Linus Walleij and are pulled into both the pinctrl tree and this branch. - Few defconfig related changes for drivers needed. * tag 'omap-for-v3.13/quirk-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (523 commits) ARM: configs: omap2plus_defconfig: enable dwc3 and dependencies ARM: OMAP2+: Add WLAN modules and of_serial to omap2plus_defconfig ARM: OMAP2+: Run make savedefconfig on omap2plus_defconfig to shrink it ARM: OMAP2+: Add minimal 8250 support for GPMC ARM: OMAP2+: Use pdata quirks for wl12xx for omap3 evm and zoom3 ARM: OMAP: Move DT wake-up event handling over to use pinctrl-single-omap ARM: OMAP2+: Add support for auxdata pinctrl: single: Add support for auxdata pinctrl: single: Add support for wake-up interrupts pinctrl: single: Prepare for supporting SoC specific features ARM: OMAP2+: igep0020: use display init from dss-common ARM: OMAP2+: pdata-quirks: add legacy display init for IGEPv2 board +Linux 3.12-rc4 Signed-off-by: Kevin Hilman <khilman@linaro.org>
| * ARM: shmobile: update SDHI DT compatibility string to the <unit>-<soc> formatGuennadi Liakhovetski2013-09-211-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | Currently DT compatibility strings of both types can be found in the kernel sources: <unit>-<soc> and <soc>-<unit>, whereas a unique format should be followed and the former one is preferred. This patch converts the SDHI MMC driver and its users to the common standard. This is safe for now, since ATM no real products are using this driver with DT. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com> Acked-by: Chris Ball <cjb@laptop.org> [Removed r8a7740.dtsi portion as it is not applicable] Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | ARM: shmobile: r8a73a4: add a DT node for the DMACGuennadi Liakhovetski2013-10-081-0/+43
| | | | | | | | | | | | | | | | | | | | Add a DT node for the only system DMAC instance on r8a73a4. The RT DMAC can be added later under the same multiplexer, because they can serve the same slaves and use the same MID-RID values. Configuration data is supplied to the driver, using a compatibility match string. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | ARM: shmobile: only enable used I2C interfaces in DT on all Renesas boardsGuennadi Liakhovetski2013-10-081-0/+9
|/ | | | | | | | | | | Currently all I2C interfaces in all *.dtsi files for various Renesas SoCs are enabled by default. Switch them all off and only enable populated I2C interfaces in board-specific *.dts files. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com> Acked-by: Mark Rutland <mark.rutland@arm.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* Merge tag 'renesas-pinmux-for-v3.12' of ↵Olof Johansson2013-08-141-0/+7
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt From Simon Horman: Renesas ARM based SoC pinmux updates for v3.12 SH Mobile pinctrl DT support * tag 'renesas-pinmux-for-v3.12' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: kzm9g-reference: Add LED1-LED4 to the device tree ARM: shmobile: kzm9g-reference: Move SDHI regulators to DT ARM: shmobile: kzm9g-reference: Move pinctrl mappings to device tree ARM: shmobile: marzen-reference: Add LED2-LED4 to the device tree ARM: shmobile: marzen-reference: Move pinctrl mappings to device tree ARM: shmobile: armadillo-reference: Add LED1-LED4 to the device tree ARM: shmobile: armadillo-reference: Move st1232 reset GPIO to DT ARM: shmobile: armadillo-reference: Add st1232 pin mappings ARM: shmobile: armadillo-reference: Move pinctrl mappings to device tree ARM: shmobile: sh73a0: Add pin control device to device tree ARM: shmobile: sh7372: Add pin control device to device tree ARM: shmobile: r8a7790: Add GPIO controller devices to device tree ARM: shmobile: r8a7790: Add pin control device to device tree ARM: shmobile: r8a7779: Add GPIO controller devices to device tree ARM: shmobile: r8a7779: Add pin control device to device tree ARM: shmobile: r8a7778: Add GPIO controller devices to device tree ARM: shmobile: r8a7778: Add pin control device to device tree ARM: shmobile: r8a7740: Add pin control device to device tree ARM: shmobile: r8a73a4: Add pin control device to device tree Signed-off-by: Olof Johansson <olof@lixom.net> Conflicts: arch/arm/boot/dts/r8a73a4.dtsi arch/arm/boot/dts/r8a7790.dtsi
| * ARM: shmobile: r8a73a4: Add pin control device to device treeLaurent Pinchart2013-07-221-0/+7
| | | | | | | | | | | | | | | | | | Add a pfc node to the r8a73a4 device tree. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> [g.liakhovetski+renesas@gmail.com use 2 nodes for address and size] Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | ARM: shmobile: r8a73a4: add MMCIF and SDHI DT templatesGuennadi Liakhovetski2013-07-171-0/+45
| | | | | | | | | | | | | | | | | | This adds DT templates for all MMCIF and SDHI controllers on r8a73a4. They are added with status="disabled". To use them platform-specific DTs have to enable the required ones. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | ARM: shmobile: r8a73a4: add I2C controller DT nodesGuennadi Liakhovetski2013-07-171-0/+81
|/ | | | | | | | | Add Device Tree nodes for the 9 I2C controllers on r8a73a4, compatible with the i2c-sh_mobile.c driver. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: Remove unused r8a73a4 GIC CPU interface DT bitsMagnus Damm2013-06-041-6/+0
| | | | | | | Remove unused GIC CPU interface DT bits for r8a73a4. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: r8a73a4 SoC 64-bit DT supportTakashi Yoshii2013-04-021-10/+10
| | | | | | | | | | The r8a73a4 SoC supports LPAE and has memory window up to 0x2ffffffff. Convert to 64-bit addresses by enlarging #addr-cells and #size-cells to 2. Signed-off-by: Takashi Yoshii <takashi.yoshii.zj@renesas.com> Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: r8a73a4: add thermal driver supportKuninori Morimoto2013-04-021-0/+7
| | | | | | | | | You can get current thermal by > cat /sys/class/thermal/thermal_zone?/temp Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: r8a73a4 IRQC support V2Magnus Damm2013-04-021-0/+32
| | | | | | | | | | | | | | | | Add IRQC interrupt controller support to r8a73a4 by hooking up two IRQC instances to handle 58 external IRQ signals. There IRQC controllers are tied to SPIs of the GIC. On r8a73a4 exact IRQ pin routing is handled by the PFC which is excluded from this patch. Both platform devices and DT devices are added in this patch. The platform device versions are used to provide a static interrupt map configuration for board code written in C. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: shmobile: Initial r8a73a4 SoC support V3Magnus Damm2013-04-021-0/+55
V3 of initial support for the r8a73a4 SoC including: - Single Cortex-A15 CPU Core - GIC - Architecture timer No static virtual mappings are used, all the components make use of ioremap(). DT_MACHINE_START is still wrapped in CONFIG_USE_OF to match other mach-shmobile code. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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