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* ARM: dts: DRA72: switch to cpsw slave0 for ethernetVignesh R2015-07-141-2/+8
| | | | | | | | | | On DRA72 EVM, cpsw slave1 is muxed with VIN2A, hence switch to cpsw slave0 for ethernet. Add gpio hog entry to pcf_gpio_21 in order to select cpsw slave0. Signed-off-by: Vignesh R <vigneshr@ti.com> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* arm/dts: dra72-evm.dts: add HDMITomi Valkeinen2015-06-041-0/+110
| | | | | | | | | DRA72 EVM has a HDMI output. This patch adds the device tree nodes required for HDMI. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Cc: devicetree@vger.kernel.org Acked-by: Tony Lindgren <tony@atomide.com>
* Merge tag 'armsoc-dt' of ↵Linus Torvalds2015-04-221-0/+8
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM DT updates from Olof Johansson: "As always, this tends to be one of our bigger branches. There are lots of updates this release, but not that many jumps out as something that needs more detailed coverage. Some of the highlights are: - DTs for the new Annapurna Labs Alpine platform - more graphics DT pieces falling into place on Exynos, bridges, clocks. - plenty of DT updates for Qualcomm platforms for various IP blocks - some churn on Tegra due to switch-over to tool-generated pinctrl data - misc fixes and updates for Atmel at91 platforms - various DT updates to add IP block support on Broadcom's Cygnus platforms - more updates for Renesas platforms as DT support is added for various IP blocks (IPMMU, display, audio, etc)" * tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (231 commits) ARM: dts: alpine: add internal pci Revert "ARM: dts: mt8135: Add pinctrl/GPIO/EINT node for mt8135." ARM: mvebu: use 0xf1000000 as internal registers on Armada 370 DB ARM: dts: qcom: Add idle state device nodes for 8064 ARM: dts: qcom: Add idle states device nodes for 8084 ARM: dts: qcom: Add idle states device nodes for 8974/8074 ARM: dts: qcom: Update power-controller device node for 8064 Krait CPUs ARM: dts: qcom: Add power-controller device node for 8084 Krait CPUs ARM: dts: qcom: Add power-controller device node for 8074 Krait CPUs devicetree: bindings: Document qcom,idle-states devicetree: bindings: Update qcom,saw2 node bindings dt-bindings: Add #defines for MSM8916 clocks and resets arm: dts: qcom: Add LPASS Audio HW to IPQ8064 device tree arm: dts: qcom: Add APQ8084 chipset SPMI PMIC's nodes arm: dts: qcom: Add 8x74 chipset SPMI PMIC's nodes arm: dts: qcom: Add SPMI PMIC Arbiter nodes for APQ8084 and MSM8974 arm: dts: qcom: Add LCC nodes arm: dts: qcom: Add TCSR support for MSM8960 arm: dts: qcom: Add TCSR support for MSM8660 arm: dts: qcom: Add TCSR support for IPQ8064 ...
| * Merge tag 'omap-for-v4.1/wl12xx-dt' of ↵Olof Johansson2015-04-031-6/+4
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt Merge "wireless wl12xx and omap device tree changes for v4.1" from Tony Lindgren: Wireless and omap changes to make wl12xx driver to use device tree data instead of platform data from Eliad Peller <eliad@wizery.com>: - Add device-tree support to the wlcore (wl12xx/wl18xx) driver. - Update the current users to use the bindings instead of pdata-quirks. - Finally, remove the deprecated wl12xx_platform_data struct Note that da850 board file code that still uses the platform data, but we have da850.dtsi that can be used instead. So it was decided that we should try to remove the wl12xx support from the da850 board file as suggested by Sekhar Nori <nsekhar@ti.com>. As it's the last patch in the series, the last patch can be simply reverted if needed. As this series touches quite a bit of arch code, it was suggested by Kalle Valo <kvalo@codeaurora.org> that the whole series should be merged via the arm-soc tree. * tag 'omap-for-v4.1/wl12xx-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: wlcore: remove wl12xx_platform_data ARM: dts: add wl12xx/wl18xx bindings wlcore: add device-tree support dt: bindings: add TI's wilink wireless device wl12xx: use frequency instead of enumerations for pdata clocks wlcore: set irq_trigger in board files instead of hiding behind a quirk + Linux 4.0-rc4 Signed-off-by: Olof Johansson <olof@lixom.net>
| * | ARM: dts: dra7x-evm: beagle-x15: Fix USB PeripheralRoger Quadros2015-03-171-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that we have EXTCON_USB_GPIO queued for v4.1, revert commit addfcde7c485 ("ARM: dts: dra7x-evm: beagle-x15: Fix USB Host") On these EVMs, the USB cable state has to be determined via the ID pin tied to a GPIO line. We use the gpio-usb-extcon driver to read the ID pin and the extcon framework to forward the USB cable state information to the USB driver so the controller can be configured in the right mode (host/peripheral). Gets USB peripheral mode to work on this EVM. Reviewed-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Roger Quadros <rogerq@ti.com>
* | | Merge tag 'irqchip-core-4.1-3' of ↵Thomas Gleixner2015-04-111-1/+0
|\ \ \ | |_|/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.infradead.org/users/jcooper/linux into irq/core irqchip core change for v4.1 (round 3) from Jason Cooper Purge the gic_arch_extn hacks and abuse by using the new stacked domains NOTE: Due to the nature of these changes, patches crossing subsystems have been kept together in their own branches. - tegra - Handle the LIC properly - omap - Convert crossbar to stacked domains - kill arm,routable-irqs in GIC binding - exynos - Convert PMU wakeup to stacked domains - shmobile, ux500, zynq (irq_set_wake branch) - Switch from abusing gic_arch_extn to using gic_set_irqchip_flags
| * | irqchip: crossbar: Convert dra7 crossbar to stacked domainsMarc Zyngier2015-03-151-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Support for the TI crossbar used on the DRA7 family of chips is implemented as an ugly hack on the side of the GIC. Converting it to stacked domains makes it slightly more palatable, as it results in a cleanup. Unfortunately, as the DT bindings failed to acknowledge the fact that this is actually yet another interrupt controller (the third, actually), we have yet another breakage. Oh well. Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Link: https://lkml.kernel.org/r/1426088629-15377-3-git-send-email-marc.zyngier@arm.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* | | ARM: dts: dra7x-evm: avoid possible contention while muxing on CAN linesRoger Quadros2015-03-061-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | DCAN1 RX and TX lines are internally pulled high according to [1]. While muxing between DCAN mode and SAFE mode we make sure that the same pull direction is set to minimize opposite pull contention during the switching window. [1] in DRA7 data manual, Ball characteristics table 4-2, DSIS colum shows the state driven to the peripheral input while in the deselcted mode. DSIS - De-Selected Input State. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* | | ARM: dts: dra7x-evm: Don't use dcan1_rx.gpio1_15 in DCAN pinctrlRoger Quadros2015-03-061-2/+0
| |/ |/| | | | | | | | | | | | | Rev.F onwards ball G19 (dcan1_rx) is used as a GPIO for some other function so don't include it in DCAN pinctrl node. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* | ARM: dts: dra7x-evm: beagle-x15: Fix USB HostRoger Quadros2015-02-241-8/+0
|/ | | | | | | | | | | | | | | | | | | In commit 87517d26d888 ("ARM: dts: dra7-evm: Add extcon nodes for USB") we enabled Extcon USB gpio to tackle the USB ID pin and get peripheral mode to work. But the extcon-gpio-usb driver [1] didn't make it into v4.0 and this makes the USB driver defer probe indefinitely breaking USB Host functionality. As a temporary fix we remove the extcon handle from the USB controller and add it back when the extcon driver merges in v4.1. [1] - https://lkml.org/lkml/2015/2/2/187 Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: dts: dra72-evm: Add extcon nodes for USBRoger Quadros2015-01-301-0/+31
| | | | | | | | | | | | | | | On this EVM, the USB cable state has to be determined via the ID pin tied to a GPIO line. We use the gpio-usb-extcon driver to read the ID pin and the extcon framework to forward the USB cable state information to the USB driver so the controller can be configured in the right mode (host/peripheral). Gets USB peripheral mode to work on this EVM. Signed-off-by: Roger Quadros <rogerq@ti.com> Reviewed-by: Felipe Balbi <balbi@ti.com> Acked-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: dts: dra72-evm: Add qspi deviceMugunthan V N2015-01-201-0/+77
| | | | | | | These add device tree entry for qspi device on dra72-evm. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: dts: dra7-evm: Update SMPS7 (VDD_CORE) max voltage to match DMRavikumar Kattekola2014-12-101-1/+1
| | | | | | | | | | | | | | | | | As per the latest Data Manual, for newer samples, the nominal voltage required for VDD_CORE at OPP_NOM can be upto 1.06V which was 1.03V earlier. Update the regulator max voltage constraint for SMPS7, connected to VDD_CORE, to meet this requirement. Document reference: DRA74 Data Manual, SPRS857M - Dec 2012, Revised Oct 2014. DRA72 Data Manual, SPRS906G - Dec 2012, revised Oct 2014. Signed-off-by: Ravikumar Kattekola <rk@ti.com> Acked-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: dts: dra72-evm: Add CAN supportRoger Quadros2014-11-241-0/+23
| | | | | | | | | | | | | | The board has 2 CAN ports but only the first one can be used. Enable the first CAN port. WAKEUP0 pin doesn't have INPUT enable bit so we just disable weak PULLs. The second CAN port cannot be used without hardware modification so we don't enable the second port. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: dts: dra72x-evm: Enable CPSW and MDIOMugunthan V N2014-11-101-0/+73
| | | | | | | | Adding CPSW phy-id, CPSW and MDIO pinmux configuration for active and sleep states and enable them in board evm dts file. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: dts: dra72-evm: Add MMC nodesNishanth Menon2014-11-101-0/+59
| | | | | | | | | | | | | | | | | | Add MMC1 and 2 nodes. MMC1 is SDcard and MMC2 is eMMC. NOTE on MMC1 card detect: Ideally, we should be using in-built SDCD support, but we dont have it yet. So, use the fact that control module of DRA7 is setup such that no matter what mode one configures it, GPIO option is always hardwired in - use GPIO mode for SDcard detection. [peter.ujfalusi@ti.com] The power line feeding the SD card is also used by other devices on the EVM. Use generic name instead of mmc2_3v3 so when other devices want to use the same regulator it will look a bit better. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: dts: dra72-evm: Add power button nodeNishanth Menon2014-11-101-0/+8
| | | | | | | | | With Commit adff5962fdd2 ("Input: introduce palmas-pwrbutton"), we can now support tps power button as a event source - This is SW7 (PB/WAKE) on the J6-evm. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: dts: dra72-evm: Provide explicit pinmux for TPS PMICNishanth Menon2014-11-101-0/+9
| | | | | | | | Even thought sys_nirq1 is hardwired on the SoC for the pin, it is better to configure the pin to the required mux configuration. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: dts: dra72-evm: Add regulator information to USB2 PHYsRoger Quadros2014-11-101-0/+8
| | | | | | | | The ldo4_reg regulator provides power to the USB1 and USB2 High Speed PHYs. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: dts: dra72-evm: Enable USB support for dra72-evm.George Cherian2014-11-101-0/+24
| | | | | | | | | Add USB data and pinctrl for USB. Signed-off-by: George Cherian <george.cherian@ti.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: dts: dra72-evm: Add NAND supportRoger Quadros2014-11-101-0/+115
| | | | | | | | | | | | | | | | | | DRA72-evm has a 256MB 16-bit wide NAND chip. Add pinmux and NAND node. The NAND chips 'Chip select' and 'Write protect' can be controlled using DIP Switch SW5. To use NAND, the switch must be configured like so: SW5.1 (NAND_SELn) = ON (LOW) SW5.9 (GPMC_WPN) = OFF (HIGH) Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com> Tested-by: Nishanth Menon <nm@ti.com> Acked-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: dts: dra72-evm: Add tps65917 PMIC nodeKeerthy J2014-09-081-0/+104
| | | | | | | | | | | | | | | DRA72x-evm uses TPS65917 PMIC. Add the node. NOTE: LDO2 is actually unused, but the usage if any is expected to be between 1.8 to 3.3v IO voltage. So define the node. NOTE: Interrupt used is crossbar number based. Tested-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Keerthy <j-keerthy@ti.com> Tested-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: dts: dra72-evm: Enable I2C1 nodeKeerthy J2014-09-081-0/+16
| | | | | | | | | | | | | | | | | | | | | I2C1 bus is used for the following peripherals P8 connector (MLB) TLV320AIC3106 Audio codec J15 LCD header 24WC256 eeprom TMP102AIDRLT temperature sensor PCF8575 GPIO expander PCA9306 i2c voltage translator -> Goes to P9 for comm interface P2 expansion connector TPS65917 PMIC The slowest speed of all the peripherals seems to be 400KHz. Tested-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Keerthy <j-keerthy@ti.com> Tested-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
* ARM: dts: Add support for DRA72x family of devicesRajendra Nayak2014-05-061-0/+24
DRA722 is part of DRA72x family which are single core cortex A15 devices with most infrastructure IPs otherwise same as whats on the DRA74x family. So move the cpu nodes into dra74x.dtsi and dra72x.dtsi respectively. Also add a minimal dra72-evm dts file. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Cc: linux-doc@vger.kernel.org Cc: devicetree@vger.kernel.org Acked-by: Arnd Bergmann <arnd@arndb.de> [tony@atomide.com: updated for Makefile sorting] Signed-off-by: Tony Lindgren <tony@atomide.com>
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