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* ARM: bcm2835: add I2S pinctrl to device treeMark Brown2014-09-251-0/+1
| | | | | | | | | Signed-off-by: Florian Meier <florian.meier@koalo.de> [Tweaked slightly to disable by default -- broonie] Signed-off-by: Mark Brown <broonie@linaro.org> [swarren, removed duplicate i2s node] Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* ARM: bcm2835: fix clock DT node namesStephen Warren2014-02-241-3/+6
| | | | | | | | | | | | | DT nodes should be named according to the type of object that they represent rather than the identity. DT nodes that contain a reg property should include a unit address in their name. Fix these issues. Add clock-output-names properties to the nodes so that the clocks get named something meaningful. This works around the fact that the fixed clock driver names clocks after the short node name, i.e. not including the unit address. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
* ARM: bcm2835: node name unit address cleanupStephen Warren2014-02-201-10/+10
| | | | | | | | | | | | | | DT nodes that contain a reg property should include a unit address in their name. Add the missing unit addresses. The unit address in a node name must match the value in the reg property. Fix the cases where they don't match. Don't fix the /clocks/* node names yet; that causes problems the clock driver to attempt to register multiple clocks with the same name, which fails. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
* ARM: bcm2835: fix DT node sort orderStephen Warren2014-02-111-16/+16
| | | | | | Re-order all the DT nodes so that they're ordered by their reg address. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
* ARM: bcm2835: add I2S driver to device treeFlorian Meier2014-02-111-0/+10
| | | | | | | | | | | This adds the definitions for the BCM2835 I2S driver to the device tree. Some GPIO settings are needed for the correct pin functions. Signed-off-by: Florian Meier <florian.meier@koalo.de> [swarren: fixed DT node sort order, simplified DT label name, removed RPI .dts file changs, since use of I2S is a user-added option.] Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
* ARM: bcm2835: add dmaengine driver to device treeFlorian Meier2014-02-111-0/+21
| | | | | | | | | | This adds the definitions for the BCM2835 dmaengine driver to the device tree. The dma-channel-mask is currently fixed. Later it should be set via the firmware. Signed-off-by: Florian Meier <florian.meier@koalo.de> [swarren, fixed DT node sort order] Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
* ARM: bcm2835: perf_event support for Raspberry-PiVince Weaver2014-02-111-0/+4
| | | | | | | | | | | | | | | | | | | The following patch enables performance counter support on Raspberry-Pi. We have this working on the 2708 based rasp-pi kernels by manually putting the device registration in the platform files. This change does things properly in a device tree. The boot messages look proper, but my rasp-pi hangs somewhere in USB enabling when running a stock 3.13-rc6 kernel so I have been unable to fully test this change. I also understand that the rasp-pi 1176 pmu support is missing the overflow interrupt. I'm not sure if that's true of all 2835 implementations. If not, then this patch will need to be changed a bit. Signed-off-by: Vince Weaver <vincent.weaver@maine.edu> [swarren, fixed DT node sort order] Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
* ARM: bcm2835: add USB controller to device treeStephen Warren2014-01-021-0/+6
| | | | | | | | | | | | | | | The BCM2835 SoC contains a DWC2 USB controller. Add this to the DT. Set up the pin controller to fully enable the USB controller on the Raspberry Pi. The GPIO setup works because the default output value for GPIO 6 (LAN_RUN/n_reset) just happens to be 1, which enables the USB/LAN chip. Note that you'll need a U-Boot which enables power to the USB controller; search for U-Boot patch "ARM: rpi_b: power on SDHCI and USB HW modules". Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Olof Johansson <olof@lixom.net>
* ARM: bcm2835: add missing #xxx-cells to I2C nodesStephen Warren2013-11-251-0/+4
| | | | | | | | | | The I2C controller node needs #address-cells and #size-cells properties, but these are currently missing. Add them. This allows child nodes to be parsed correctly. Cc: stable@vger.kernel.org Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Olof Johansson <olof@lixom.net>
* ARM: bcm2835: override the HW UART periphidJongsung Kim2013-06-021-0/+1
| | | | | | | | | | | | | | | | | | Stephen Warren reported the recent commit 78506f2 (add support for extended FIFO-size of PL011-r1p5) breaks the serial port on the BCM2835 ARM SoC. A UART compatible with the ARM PL011-r1p5 should have 32-deep FIFOs. The BCM2835 UART just looks like an ARM PL011-r1p5, but has 16-deep FIFOs just like PL011-r1p4 or earlier revisions. As a workaround for this compatibility issue, this patch overrides the HW UART periphid register values with the actually compatible UART periphid 0x00241011 (r1p3 or r1p4). Reported-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Jongsung Kim <neidhard.kim@lge.com> Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Olof Johansson <olof@lixom.net>
* Merge tag 'bcm2835-for-3.10-dt' of ↵Arnd Bergmann2013-04-081-0/+22
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-rpi into next/dt From Stephen Warren <swarren@wwwdotorg.org>: ARM: bcm2835: device tree updates This branch adds two devices to the BCM2835 SoC device tree: the SPI controller and the HW random number generator. The SPI controller isn't actually instantiated in the Raspberry Pi device tree, since there are no on-board SPI devices; it's up to the end-user to modify their own device-tree to describe whatever they have attached. * tag 'bcm2835-for-3.10-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-rpi: ARM: bcm2835: add Broadcom BCM2835 RNG to the device tree ARM: bcm2835: add SPI device to DT Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * ARM: bcm2835: add Broadcom BCM2835 RNG to the device treeLubomir Rintel2013-04-031-0/+5
| | | | | | | | | | | | | | | | | | This adds a device tree binding for random number generator present on Broadcom BCM2835 SoC, used in Raspberry Pi and Roku 2 devices. Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Tested-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
| * ARM: bcm2835: add SPI device to DTStephen Warren2013-03-111-0/+17
| | | | | | | | | | | | | | | | | | The BCM2835 has a single instance of the "SPI0"-type SPI master controller. Instantiate it in the SoC .dtsi file, Don't enable it in the Raspberry Pi board .dts file, since we have no idea what is actually connected, and hence no idea what to set the bus clock rate to. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
* | ARM: bcm2835: fix I2C module clock rateStephen Warren2013-03-041-1/+1
|/ | | | | | | | | | | | | BCM2835-ARM-Peripherals.pdf states that the I2C module's input clock is nominally 150MHz, and that value is currently reflected in bcm2835.dtsi. However, practical measurements show that the rate is actually 250MHz, and this agrees with various downstream kernels. Switch the I2C clock's frequency to 250MHz so that the generated bus clock rate is accurate. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Olof Johansson <olof@lixom.net>
* ARM: bcm2835: fix clock node aliasing in device treeStephen Warren2013-01-141-9/+17
| | | | | | | | | | | Both clock nodes in the current device tree are named "clock" and hence end up being the same node. Rename the nodes to different names to avoid this. In fact, fixed-clock uses the node name as the clock name, so name the nodes after the clock they represent. Move the clocks into a "clocks" sub-node to group them and avoid any possible naming conflicts with other nodes also named after the device type. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
* ARM: bcm2835: add I2C controllers to DTStephen Warren2013-01-141-0/+22
| | | | | | | | | | | | The BCM2835 has 3 identical I2C controllers. Instantiate them all in the SoC .dtsi file, and enable the relevant two in the Raspberry Pi board .dts file. Note that on the Raspberry Pi Model B revision 1, I2C0 is connected to the general-purpose expansion header, and I2C1 is connected to the camera connector. Revision 2 of the board swaps these assignments:-( Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
* ARM: bcm2835: add SDHCI node to DTStephen Warren2013-01-141-0/+14
| | | | | | | | | Add the SDHCI device node to the SoC DT file. Add a dummy fixed-clock to satisfy the SDHCI driver's clock lookup; eventually this should be replaced by a real clock implementation. Add board specific properties to the Raspberry Pi board file. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
* ARM: bcm2835: enable GPIO/pinctrlStephen Warren2012-10-251-0/+23
| | | | | | | | | | | | | | | Enable GPIO and pinctrl in Kconfig. Add required <mach/gpio.h> for gpiolib. Instantiate the BCM2835 GPIO module in bcm2835.dtsi. Add a pinctrl definition to bcm2835-rpi-b.dts that sets up all of the board's required pinmux configuration. GPIO aren't specified; that's left to gpio_request(). Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Linus Walleij <linus.walleij@linaro.org>
* ARM: bcm2835: implement machine restart hookStephen Warren2012-10-251-0/+5
| | | | | | | | | | | | | | | | | | | | Implement the machine restart hook using the SoC's watchdog timer module. To support this, define a DT binding for the watchdog module, and add it to the device tree. The downstream rpi-split branch contains a full watchdog timer driver implementation, which also implements the restart hook. However, the restart function is largely separate from the watchdog driver, so for simplicity, the restart hook is implemented here directly in the main machine source file. Overall structure (separate setup/restart) functions derived from the picoxcell ARM support. Watchdog register IO sequence taken from code by Simon Arlott. Note that the watchdog module is not documented in BCM2835-ARM-Peripherals.pdf. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
* ARM: bcm2835: instantiate console UARTSimon Arlott2012-09-191-1/+8
| | | | | | | | | | | | | | | | | | | This patch was extracted from git://github.com/lp0/linux.git branch rpi-split as of 2012/09/08, and modified as follows: * s/bcm2708/bcm2835/. * Modified device tree vendor prefix. * Modified UART DT node to use a unit-address to create unique UART node names, rather than using non-type names "uart0" and "uart1". Note that UART 1 (the Broadcom "mini UART") is not yet present, but I'm naming the DT node in anticipation that it will be added. Signed-off-by: Chris Boot <bootc@bootc.net> Signed-off-by: Simon Arlott <simon@fire.lp0.eu> Signed-off-by: Dom Cobley <popcornmix@gmail.com> Signed-off-by: Dom Cobley <dc4@broadcom.com> Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Arnd Bergmann <arnd@arndb.de>
* ARM: bcm2835: add system timerSimon Arlott2012-09-191-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The System Timer peripheral provides four 32-bit timer channels and a single 64-bit free running counter. Each channel has an output compare register, which is compared against the 32 least significant bits of the free running counter values, and generates an interrupt. Timer 3 is used as the Linux timer. The BCM2835 also contains an SP804-based timer module. However, it apparently has significant differences from the standard SP804 IP block, and Broadcom's documentation recommends using the system timer instead. This patch was extracted from git://github.com/lp0/linux.git branch rpi-split as of 2012/09/08, and modified as follows: * s/bcm2708/bcm2835/. * Modified device tree vendor prefix. * Moved to drivers/clocksource/. This looks like the desired location for such code now. * Added DT binding docs. * Moved struct sys_timer bcm2835_timer into time.c to encapsulate it more. * Simplified bcm2835_time_init() to find one matching node and operate on it, rather than looping over all matching nodes. This seems more consistent with other clocksource code. * Simplified bcm2835_time_init() using of_iomap(). * Renamed struct bcm2835_timer.index to match_mask to better represent its purpose. * s/printk(PR_INFO/pr_info(/ Signed-off-by: Chris Boot <bootc@bootc.net> Signed-off-by: Simon Arlott <simon@fire.lp0.eu> Signed-off-by: Dom Cobley <popcornmix@gmail.com> Signed-off-by: Dom Cobley <dc4@broadcom.com> Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Arnd Bergmann <arnd@arndb.de>
* ARM: bcm2835: add interrupt controller driverSimon Arlott2012-09-191-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The BCM2835 contains a custom interrupt controller, which supports 72 interrupt sources using a 2-level register scheme. The interrupt controller, or the HW block containing it, is referred to occasionally as "armctrl" in the SoC documentation, hence the symbol naming in the code. This patch was extracted from git://github.com/lp0/linux.git branch rpi-split as of 2012/09/08, and modified as follows: * s/bcm2708/bcm2835/. * Modified device tree vendor prefix. * Moved implementation to drivers/irchip/. * Added devicetree documentation, and hence removed list of IRQs from bcm2835.dtsi. * Changed shift in MAKE_HWIRQ() and HWIRQ_BANK() from 8 to 5 to reduce the size of the hwirq space, and pass the total size of the hwirq space to irq_domain_add_linear(), rather than just the number of valid hwirqs; the two are different due to the hwirq space being sparse. * Added the interrupt controller DT node to the top-level of the DT, rather than nesting it inside a /axi node. Hence, changed the reg value since /axi had a ranges property. This seems simpler to me, but I'm not sure if everyone will like this change or not. * Don't set struct irq_domain_ops.map = irq_domain_simple_map, hence removing the need to patch include/linux/irqdomain.h or kernel/irq/irqdomain.c. * Simplified armctrl_of_init() using of_iomap(). * Removed unused IS_VALID_BANK()/IS_VALID_IRQ() macros. * Renamed armctrl_handle_irq() to prevent possible symbol clashes. * Made armctrl_of_init() static. * Removed comment "Each bank is registered as a separate interrupt controller" since this is no longer true. * Removed FSF address from license header. * Added my name to copyright header. Signed-off-by: Chris Boot <bootc@bootc.net> Signed-off-by: Simon Arlott <simon@fire.lp0.eu> Signed-off-by: Dom Cobley <popcornmix@gmail.com> Signed-off-by: Dom Cobley <dc4@broadcom.com> Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Arnd Bergmann <arnd@arndb.de>
* ARM: add infra-structure for BCM2835 and Raspberry PiSimon Arlott2012-09-191-0/+17
The BCM2835 is an ARM SoC from Broadcom. This patch adds very basic support for this SoC. http://www.broadcom.com/products/BCM2835 http://www.raspberrypi.org/wp-content/uploads/2012/02/BCM2835-ARM-Peripherals.pdf Note that the documentation in the latter .pdf assumes the MMU setup that's used on the "VideoCore" companion processor, and does not document physical peripheral addresses. Subtract 0x5e000000 to obtain the physical addresses. This is accounted for by the ranges property in the /soc node in the device tree. The BCM2835 SoC is used in the Raspberry Pi. This patch also adds a minimal device tree for this board; enough to see some very early kernel boot messages through earlyprintk. However, this patch does not yet provide a useful booting system. http://www.raspberrypi.org/. This patch was extracted from git://github.com/lp0/linux.git branch rpi-split from 3-4 months ago, and significantly stripped down and modified since. Signed-off-by: Chris Boot <bootc@bootc.net> Signed-off-by: Simon Arlott <simon@fire.lp0.eu> Signed-off-by: Dom Cobley <popcornmix@gmail.com> Signed-off-by: Dom Cobley <dc4@broadcom.com> Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Arnd Bergmann <arnd@arndb.de>
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