| Commit message (Collapse) | Author | Age | Files | Lines |
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Starting with commit 8947e396a829 ("Documentation: dt: mtd: replace
"nor-jedec" binding with "jedec, spi-nor"") we have "jedec,spi-nor"
binding indicating support for JEDEC identification.
Use it for all flashes that are supposed to support READ ID op according
to the datasheets.
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
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This commit adds the stdout-path property in /chosen for all Armada
boards that were not yet carrying this property, and gets rid of
/chosen/bootargs which becomes unneeded: earlyprintk should not be
used by default, and the console= parameter is replaced by the
/chosen/stdout-path property.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
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The Device Tree description of SDHCI on Armada 388 RD board was
missing. This commit adds the node for it.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
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The current GPL only licensing on the device tree makes it very
impractical for other software components licensed under another
license.
In order to make it easier for them to reuse our device trees,
relicense our device trees under a GPL/X11 dual-license.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Acked-by: Jason Cooper <jason@lakedaemon.net>
Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
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This SoC belongs to the Armada 38x family. The main difference with
the Armada 385 is that the 388 can handle two more SATA
ports. Currently the consequence is the use of a different compatible
string for the pinctrl node, in order to be able to use the pins
associated to this 2 new SATA ports. The second SATA controller has
also been moved from the armada38x.dtsi as it it specific to the
Armada388 version.
In the same time the Armada385 DB and Armada 385 RD board have been
renamed in the 388 one and now include the armada-388.dtsi file. AS
both of them have 4 SATA ports the SoC used on them were wrongly
described.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
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