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* | | dt-bindings: Document Broadcom Cygnus SoC and clocksJonathan Richardson2014-10-301-0/+34
|/ / | | | | | | | | | | | | | | Reviewed-by: Arun Parameswaran <aparames@broadcom.com> Tested-by: Jonathan Richardson <jonathar@broadcom.com> Reviewed-by: JD (Jiandong) Zheng <jdzheng@broadcom.com> Reviewed-by: Ray Jui <rjui@broadcom.com> Signed-off-by: Scott Branden <sbranden@broadcom.com>
* | Merge tag 'clk-for-linus-3.18' of ↵Linus Torvalds2014-10-158-5/+108
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.linaro.org/people/mike.turquette/linux Pull clock tree updates from Mike Turquette: "The clk tree changes for 3.18 are dominated by clock drivers. Mostly fixes and enhancements to existing drivers as well as new drivers. This tag contains a bit more arch code than I usually take due to some OMAP2+ changes. Additionally it contains the restart notifier handlers which are merged as a dependency into several trees. The PXA changes are the only messy part. Due to having a stable tree I had to revert one patch and follow up with one more fix near the tip of this tag. Some dead code is introduced but it will soon become live code after 3.18-rc1 is released as the rest of the PXA family is converted over to the common clock framework. Another trend in this tag is that multiple vendors have started to push the complexity of changing their CPU frequency into the clock driver, whereas this used to be done in CPUfreq drivers. Changes to the clk core include a generic gpio-clock type and a clk_set_phase() function added to the top-level clk.h api. Due to some confusion on the fbdev mailing list the kernel boot parameters documentation was updated to further explain the clk_ignore_unused parameter, which is often required by users of the simplefb driver. Finally some fixes to the locking around the clock debugfs stuff was done to prevent deadlocks when interacting with other subsystems." * tag 'clk-for-linus-3.18' of git://git.linaro.org/people/mike.turquette/linux: (99 commits) clk: pxa clocks build system fix Revert "arm: pxa: Transition pxa27x to clk framework" clk: samsung: register restart handlers for s3c2412 and s3c2443 clk: rockchip: add restart handler clk: rockchip: rk3288: i2s_frac adds flag to set parent's rate doc/kernel-parameters.txt: clarify clk_ignore_unused arm: pxa: Transition pxa27x to clk framework dts: add devicetree bindings for pxa27x clocks clk: add pxa27x clock drivers arm: pxa: add clock pll selection bits clk: dts: document pxa clock binding clk: add pxa clocks infrastructure clk: gpio-gate: Ensure gpiod_ APIs are prototyped clk: ti: dra7-atl-clock: Mark the device as pm_runtime_irq_safe clk: ti: LLVMLinux: Move __init outside of type definition clk: ti: consider the fact that of_clk_get() might return an error clk: ti: dra7-atl-clock: fix a memory leak clk: ti: change clock init to use generic of_clk_init clk: hix5hd2: add I2C clocks clk: hix5hd2: add watchdog0 clocks ...
| * \ Merge branch 'clk-pxa27x' into clk-nextMike Turquette2014-09-301-0/+16
| |\ \
| | * | clk: dts: document pxa clock bindingRobert Jarzmik2014-09-301-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Document the device-tree binding of Marvell PXA based SoCs. PXA clocks are mostly fixed rate and fixed ratio clocks derived from an external oscillator, and gated by a register set (CKEN or CKEN*). Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Mike Turquette <mturquette@linaro.org>
| * | | Merge tag 'for_3.18/samsung-clk' of ↵Mike Turquette2014-09-291-1/+9
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tfiga/samsung-clk into clk-next Samsung clock patches for v3.18 1) non-critical fixes (without the need to push to stable) fa0111be4ff3 clk: samsung: exynos4: remove duplicate div_core2 divider clock instantiation b511593d7165 clk: samsung: exynos4: fix g3d clocks c14254300131 clk: samsung: exynos4: add missing smmu_g2d clock and update comments 22842d244af3 clk: samsung: exynos5260: fix typo in clock name e82ba578ccde clk: samsung: exynos3250: fix width field of mout_mmc0/1 59037b92f440 clk: samsung: exynos3250: fix width and shift of div_spi0_isp clock 5ce37f266650 clk: samsung: exynos3250: fix mout_cam_blk parent list 2) Clock driver extensions 07ccf02ba5c3 dt-bindings: clk: samsung: Document the DMC domain of Exynos3250 CMU d0e73eaf1925 ARM: dts: exynos3250: Add CMU node for DMC domain clocks e3c3f19bc618 clk: samsung: exynos3250: Register DMC clk provider 4676f0aab9dc clk: samsung: exynos4: add support for MOUT_HDMI and MOUT_MIXER clocks
| | * | | dt-bindings: clk: samsung: Document the DMC domain of Exynos3250 CMUKrzysztof Kozlowski2014-09-221-1/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Document the new compatible for clock in DMC (Dynamic Memory Controller) domain of Exynos3250 Clock Management Unit (CMU). Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
| * | | | Merge tag 'sunxi-clocks-for-3.18' of ↵Mike Turquette2014-09-271-0/+4
| |\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into clk-next Allwinner Clocks Additions for 3.18 The most important part of this serie is the addition of the phase API to handle the MMC clocks in the Allwinner SoCs. Apart from that, the A23 gained a new mbus driver, and there's a fix for a incorrect divider table on the APB0 clock.
| | * | | | clk: sunxi: Add sun8i MBUS clock supportChen-Yu Tsai2014-09-271-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The MBUS clock on sun8i is slightly different from the old mod0 clocks. The divider is 3 bits wider, while also needing a divider table for the higher 4 values, which all set the same divider. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| | * | | | clk: sunxi: mod0: Introduce MMC proper phase handlingMaxime Ripard2014-09-271-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The MMC clock we thought we had until now are actually not one but three different clocks. The main one is unchanged, and will have three outputs: - The clock fed into the MMC - a sample and output clocks, to deal with when should we output/sample data to/from the MMC bus The phase control we had are actually controlling the two latter clocks, but the main MMC one is unchanged. We can adjust the phase with a 3 bits value, from 0 to 7, 0 meaning a 180 phase shift, and the other values being the number of periods from the MMC parent clock to outphase the clock of. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com>
| | * | | | clk: sunxi: Introduce mbus compatibleMaxime Ripard2014-09-271-0/+1
| | | |/ / | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Even though the mbus clock is a regular module clock, given its nature, it needs to be enabled all the time. Introduce a new compatible, to differentiate it from the other module clocks. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com>
| * | | | clk: add gpio gated clockJyri Sarha2014-09-261-0/+21
| | |/ / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The added gpio-gate-clock is a basic clock that can be enabled and disabled trough a gpio output. The DT binding document for the clock is also added. For EPROBE_DEFER handling the registering of the clock has to be delayed until of_clk_get() call time. Signed-off-by: Jyri Sarha <jsarha@ti.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
| * | | clk: max77802: Add DT binding documentationJavier Martinez Canillas2014-09-091-0/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add Device Tree binding documentation for the clocks outputs in the Maxim 77802 Power Management IC. Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Signed-off-by: Mike Turquette <mturquette@linaro.org>
| * | | clk: max77686: Improve Maxim 77686 PMIC clocks bindingJavier Martinez Canillas2014-09-091-4/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Like most clock drivers, the Maxim 77686 PMIC clock binding follows the convention that the "#clock-cells" property is used to specify the number of cells in a clock provider. But the binding document is not clear enough that it shall be set to 1 since the PMIC support multiple clocks outputs. Also, explain that the clocks identifiers are defined in a header file that can be included by Device Tree source with client nodes to avoid using magic numbers. Finally, add "clock-output-names" as an optional property since now is supported by the clock driver. Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Reviewed-by: Doug Anderson <dianders@chromium.org> Reviewed-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
| * | | ARM: shmobile: r8a7794: document CPG clock supportUlrich Hecht2014-09-021-0/+1
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
| * | | ARM: shmobile: r8a7794: document MSTP clock supportUlrich Hecht2014-09-021-0/+1
| |/ / | | | | | | | | | | | | Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
* | | Merge tag 'soc-for-linus' of ↵Linus Torvalds2014-10-082-0/+16
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC platform changes from Arnd Bergmann: "New and updated SoC support. Among the things new for this release are: - at91: Added support for the new SAMA5D4 SoC, following the earlier SAMA5D3 - bcm: Added support for BCM63XX family of DSL SoCs - hisi: Added support for HiP04 server-class SoC - meson: Initial support for the Amlogic Meson6 (aka 8726MX) platform - shmobile: added support for new r8a7794 (R-Car E2) automotive SoC Noteworthy changes to existing SoC support are: - imx: convert i.MX1 to device tree - omap: lots of power management work - omap: base support to enable moving to standard UART driver - shmobile: lots of progress for multiplatform support, still ongoing" * tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (171 commits) ARM: hisi: depend on ARCH_MULTI_V7 CNS3xxx: Fix debug UART. ARM: at91: fix nommu build regression ARM: meson: add basic support for MesonX SoCs ARM: meson: debug: add debug UART for earlyprintk support irq: Export handle_fasteoi_irq ARM: mediatek: Add earlyprintk support for mt6589 ARM: hisi: Fix platmcpm compilation when ARMv6 is selected ARM: debug: fix alphanumerical order on debug uarts ARM: at91: document Atmel SMART compatibles ARM: at91: add sama5d4 support to sama5_defconfig ARM: at91: dt: add device tree file for SAMA5D4ek board ARM: at91: dt: add device tree file for SAMA5D4 SoC ARM: at91: SAMA5D4 SoC detection code and low level routines ARM: at91: introduce basic SAMA5D4 support clk: at91: add a driver for the h32mx clock ARM: pxa3xx: provide specific platform_devices for all ssp ports ARM: pxa: ssp: provide platform_device_id for PXA3xx ARM: OMAP4+: Remove static iotable mappings for SRAM ARM: OMAP4+: Move SRAM data to DT ...
| * \ \ Merge tag 'at91-soc2' of git://github.com/at91linux/linux-at91 into next/socArnd Bergmann2014-09-261-0/+14
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull "Second SoC batch for 3.18" from Nicolas Ferre: - introduction of the new SAMA5D4 SoC and associated Evaluation Kit - low level soc detection and early printk code - taking advantage of this, documentation of all AT91 SoC DT strings Signed-off-by: Arnd Bergmann <arnd@arndb.de> * tag 'at91-soc2' of git://github.com/at91linux/linux-at91: ARM: at91: document Atmel SMART compatibles ARM: at91: add sama5d4 support to sama5_defconfig ARM: at91: dt: add device tree file for SAMA5D4ek board ARM: at91: dt: add device tree file for SAMA5D4 SoC ARM: at91: SAMA5D4 SoC detection code and low level routines ARM: at91: introduce basic SAMA5D4 support clk: at91: add a driver for the h32mx clock
| | * | | clk: at91: add a driver for the h32mx clockAlexandre Belloni2014-09-221-0/+14
| | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Newer SoCs have two different AHB interconnect. The AHB 32 bits Matrix interconnect (h32mx) has a clock that can be setup at the half of the h64mx clock (which is mck). The h32mx clock can not exceed 90 MHz. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| * | | clk: shmobile: Add r8a7740, sh73a0 SoCs to MSTP bindingsUlrich Hecht2014-09-101-0/+2
| |/ / | | | | | | | | | | | | | | | Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | | Merge branch 'for-linus' of ↵Linus Torvalds2014-10-071-1/+1
|\ \ \ | |/ / |/| / | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial Pull "trivial tree" updates from Jiri Kosina: "Usual pile from trivial tree everyone is so eagerly waiting for" * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial: (39 commits) Remove MN10300_PROC_MN2WS0038 mei: fix comments treewide: Fix typos in Kconfig kprobes: update jprobe_example.c for do_fork() change Documentation: change "&" to "and" in Documentation/applying-patches.txt Documentation: remove obsolete pcmcia-cs from Changes Documentation: update links in Changes Documentation: Docbook: Fix generated DocBook/kernel-api.xml score: Remove GENERIC_HAS_IOMAP gpio: fix 'CONFIG_GPIO_IRQCHIP' comments tty: doc: Fix grammar in serial/tty dma-debug: modify check_for_stack output treewide: fix errors in printk genirq: fix reference in devm_request_threaded_irq comment treewide: fix synchronize_rcu() in comments checkstack.pl: port to AArch64 doc: queue-sysfs: minor fixes init/do_mounts: better syntax description MIPS: fix comment spelling powerpc/simpleboot: fix comment ...
| * Documentation: treewide: fix typos and grammarHayato Suzuki2014-08-261-1/+1
| | | | | | | | | | | | | | | | Correct spelling typo in treewide. Signed-off-by: Hayato Suzuki <hytszk@gmail.com> Acked-by: Randy Dunlap <rdunlap@infradead.org> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
* | Merge tag 'soc-for-3.17' of ↵Linus Torvalds2014-08-088-330/+211
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC platform changes from Olof Johansson: "This is the bulk of new SoC enablement and other platform changes for 3.17: - Samsung S5PV210 has been converted to DT and multiplatform - Clock drivers and bindings for some of the lower-end i.MX 1/2 platforms - Kirkwood, one of the popular Marvell platforms, is folded into the mvebu platform code, removing mach-kirkwood - Hwmod data for TI AM43xx and DRA7 platforms - More additions of Renesas shmobile platform support - Removal of plat-samsung contents that can be removed with S5PV210 being multiplatform/DT-enabled and the other two old platforms being removed New platforms (most with only basic support right now): - Hisilicon X5HD2 settop box chipset is introduced - Mediatek MT6589 (mobile chipset) is introduced - Broadcom BCM7xxx settop box chipset is introduced + as usual a lot other pieces all over the platform code" * tag 'soc-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (240 commits) ARM: hisi: remove smp from machine descriptor power: reset: move hisilicon reboot code ARM: dts: Add hix5hd2-dkb dts file. ARM: debug: Rename Hi3716 to HIX5HD2 ARM: hisi: enable hix5hd2 SoC ARM: hisi: add ARCH_HISI MAINTAINERS: add entry for Broadcom ARM STB architecture ARM: brcmstb: select GISB arbiter and interrupt drivers ARM: brcmstb: add infrastructure for ARM-based Broadcom STB SoCs ARM: configs: enable SMP in bcm_defconfig ARM: add SMP support for Broadcom mobile SoCs Documentation: arm: misc updates to Marvell EBU SoC status Documentation: arm: add URLs to public datasheets for the Marvell Armada XP SoC ARM: mvebu: fix build without platforms selected ARM: mvebu: add cpuidle support for Armada 38x ARM: mvebu: add cpuidle support for Armada 370 cpuidle: mvebu: add Armada 38x support cpuidle: mvebu: add Armada 370 support cpuidle: mvebu: rename the driver from armada-370-xp to mvebu-v7 ARM: mvebu: export the SCU address ...
| * Merge branch 'clk-rockchip' of ↵Arnd Bergmann2014-07-283-0/+125
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.linaro.org/people/mike.turquette/linux into next/soc This is a dependency for the rk3288 DT updates, the branch should first get merged through Mike's clk git. * 'clk-rockchip' of git://git.linaro.org/people/mike.turquette/linux: ARM: rockchip: Select ARCH_HAS_RESET_CONTROLLER clk: rockchip: add clock controller for rk3288 dt-bindings: add documentation for rk3288 cru clk: rockchip: add clock driver for rk3188 and rk3066 clocks dt-bindings: add documentation for rk3188 clock and reset unit clk: rockchip: add reset controller clk: rockchip: add clock type for pll clocks and pll used on rk3066 clk: rockchip: add basic infrastructure for clock branches clk: composite: improve rate_hw sanity check logic clk: composite: allow read-only clocks clk: composite: support determine_rate using rate_ops->round_rate + mux_ops->set_parent Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * \ Merge tag 'mvebu-soc-3.17-4' of git://git.infradead.org/linux-mvebu into ↵Arnd Bergmann2014-07-261-2/+3
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | next/soc Merge "mvebu SoC changes for v3.17 (round 4)" from Jason Cooper: - Armada XP - Fix return value check in pmsu code - Document URLs for new public datasheets (Thanks, Marvell & free-electrons!) - Armada 370/38x - Add cpuidle support - mvebu - Fix build when no platforms are selected - Update EBU SoC status in docs * tag 'mvebu-soc-3.17-4' of git://git.infradead.org/linux-mvebu: (21 commits) Documentation: arm: misc updates to Marvell EBU SoC status Documentation: arm: add URLs to public datasheets for the Marvell Armada XP SoC ARM: mvebu: fix build without platforms selected ARM: mvebu: add cpuidle support for Armada 38x ARM: mvebu: add cpuidle support for Armada 370 cpuidle: mvebu: add Armada 38x support cpuidle: mvebu: add Armada 370 support cpuidle: mvebu: rename the driver from armada-370-xp to mvebu-v7 ARM: mvebu: export the SCU address ARM: mvebu: make the snoop disabling optional in mvebu_v7_pmsu_idle_prepare() ARM: mvebu: use a local variable to store the resume address ARM: mvebu: make the cpuidle initialization more generic ARM: mvebu: rename the armada_370_xp symbols to mvebu_v7 in pmsu.c ARM: mvebu: use the common function for Armada 375 SMP workaround ARM: mvebu: add a common function for the boot address work around ARM: mvebu: sort the #include of pmsu.c in alphabetic order ARM: mvebu: split again armada_370_xp_pmsu_idle_enter() in PMSU code ARM: mvebu: fix return value check in armada_xp_pmsu_cpufreq_init() clk: mvebu: extend clk-cpu for dynamic frequency scaling ARM: mvebu: extend PMSU code to support dynamic frequency scaling ... Conflicts: arch/arm/mach-mvebu/Kconfig drivers/cpuidle/cpuidle-armada-370-xp.c Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| | * | clk: mvebu: extend clk-cpu for dynamic frequency scalingThomas Petazzoni2014-07-161-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit extends the existing clk-cpu driver used on Marvell Armada XP platforms to support the dynamic frequency scaling of the CPU clock. Non-dynamic frequency change was already supported (and used before secondary CPUs are started), but the dynamic frequency change requires a completely different procedure. In order to achieve this, the clk_cpu_set_rate() function is reworked to handle two separate cases: - The case where the clock is enabled, which is the new dynamic frequency change code, implemented in clk_cpu_on_set_rate(). This part will be used for cpufreq activities. - The case where the clock is disabled, which is the existing frequency change code, moved in clk_cpu_off_set_rate(). This part is already used to set the clock frequency of the secondary CPUs before starting them. In order to implement the dynamic frequency change function, we need to access the PMU DFS registers, which are outside the currently mapped "Clock Complex" registers, so a new area of registers is now mapped. This affects the Device Tree binding, but we are careful to do it in a backward-compatible way (by allowing the second pair of registers to be non-existent, and in this case, ensuring clk_cpu_on_set_rate() returns an error). Note that technically speaking, the clk_cpu_on_set_rate() does not do the entire procedure needed to change the frequency dynamically, as it involves touching a number of PMSU registers. This is done through a clock notifier registered by the PMSU driver in followup commits. Cc: <devicetree@vger.kernel.org> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Link: https://lkml.kernel.org/r/1404920715-19834-4-git-send-email-thomas.petazzoni@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| * | | Merge tag 's5pv210-dt' of ↵Arnd Bergmann2014-07-262-0/+131
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/soc Merge "Samsung S5PV210 DT support for v3.17" from Kukjin Kim: - support common clock framework for s5pv210 clock - add generic PHY driver on s5pv210 to support it via DT - add dt support for s5pv210-goni, smdkc110, smdkv210 and torbreck boards - remove board files from mach-s5pv210 and unused codes - enable multiplatform for s5pv210 * tag 's5pv210-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: clk: samsung: s5pv210: Remove legacy board support ARM: SAMSUNG: Remove remaining legacy code gpio: samsung: Remove legacy support of S5PV210 ARM: S5PV210: Enable multi-platform build support cpufreq: s5pv210: Make the driver multiplatform aware ARM: S5PV210: Register cpufreq platform device ARM: S5PV210: move debug-macro.S into the common space ARM: S5PV210: Untie PM support from legacy code ARM: S5PV210: Remove support for board files ARM: dts: Add Device tree for s5pc110/s5pv210 boards ARM: dts: Add Device tree for s5pv210 SoC ARM: S5PV210: Add board file for boot using Device Tree phy: Add support for S5PV210 to the Exynos USB 2.0 PHY driver clk: samsung: Add S5PV210 Audio Subsystem clock driver ARM: SAMSUNG: Remove legacy clock code serial: samsung: Remove support for legacy clock code cpufreq: s3c24xx: Remove some dead code ARM: S5PV210: Migrate clock handling to Common Clock Framework clk: samsung: Add clock driver for S5PV210 and compatible SoCs Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| | * | | clk: samsung: Add S5PV210 Audio Subsystem clock driverTomasz Figa2014-07-191-0/+53
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds a driver for clock controller being a part of Audio Subsystem present on S5PV210 and compatible SoCs. It is used to provide clocks for other IP blocks of this subsystem. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | * | | clk: samsung: Add clock driver for S5PV210 and compatible SoCsMateusz Krawczuk2014-07-191-0/+78
| | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds new, Common Clock Framework-based clock driver for Samsung S5PV210 and compatible SoCs. The driver is just added, without enabling it yet. Signed-off-by: Mateusz Krawczuk <m.krawczuk@partner.samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> [t.figa: Added support for other SoC variants and clock output. Fixed remaining minor issues.] Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * | | Merge tag 'imx-soc-3.17' of ↵Olof Johansson2014-07-194-326/+75
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/soc Merge "ARM: imx: SoC changes for 3.17" from Shawn Guo: The i.MX SoC changes for 3.17: - Add devicetree support for i.MX1 and i.MX21 clock driver - Use CLOCKSOURCE_OF_DECLARE() to initialize timer for DT targets - Use of_clk_init() to initialize i.MX25 and i.MX27 clock driver in device tree boot - Remove i.MX1 camera support - Remove i.MX27 IP Camera and Lite-Kit board support - Add suspend and cpuidle support for i.mx6sx - Clean up unused clk_register_clkdev() lookups - Update imx-weim bus driver to support populating devices on a simple bus - Switch i.MX27 and i.MX6QDL clock driver to use macro for clock IDs - Make i.MX51 a DT only platform and clean up the non-DT support code - Support disabling supervisor protect via DT - Random defconfig updates * tag 'imx-soc-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (69 commits) ARM: imx: clk-vf610: fix FlexCAN clock gating ARM: i.MX: Use CLOCKSOURCE_OF_DECLARE() for DT targets ARM: i.MX53: globally disable supervisor protect ARM: i.MX: allow disabling supervisor protect via DT ARM: i.MX27 clk: Add 26 MHz oscillator circuit clock gate ARM: i.MX27 clk: Remove unused definitions ARM: i.MX27 clk: Introduce DT include for clock provider ARM: i.MX: Remove Freescale Logic Product Development i.MX27 Lite-Kit board support ARM: i.MX: Remove excess symbols ARCH_MX1, ARCH_MX25 and MACH_MX27 ARM: i.MX: Remove i.MX1 camera support ARM: imx: use PTR_ERR_OR_ZERO bus: imx-weim: populate devices on a simple bus ARM: imx: build cpu_is_imx6sl function conditionally ARM: imx: imx6sx uses imx6q cpuidle code ARM: imx: drop PL310 errata 588369 and 727915 ARM: imx_v6_v7_defconfig: add FSL_EDMA and PRINTK_TIME ARM: imx: clk-imx6sx: register SSI/SSI_IPG as shared gate clocks ARM: imx_v6_v7_defconfig: Enable flexcan driver for can support ARM: imx_v6_v7_defconfig: Enable STMPE gpio support ARM: imx: mark .dt_compat as const ... Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | | ARM: i.MX27 clk: Introduce DT include for clock providerAlexander Shiyan2014-07-181-111/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use clock defines in order to make devicetrees more human readable. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
| | * | | ARM: i.MX21 clk: Add devicetree supportAlexander Shiyan2014-07-181-0/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds devicetree support CCM module for i.MX21 CPUs. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
| | * | | ARM: imx6qdl: switch to use macro for clock IDShawn Guo2014-07-181-215/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of using enum for clock ID, let's switch imx6qdl clock driver to use macro. In this case, device tree can reuse these macros to improve readability. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
| | * | | ARM: i.MX1 clk: Add devicetree supportAlexander Shiyan2014-07-181-0/+26
| | |/ / | | | | | | | | | | | | | | | | | | | | | | | | This patch adds devicetree support CCM module for i.MX1 (MC9328MX1) CPUs. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
| * | | dt/bindings: add compatible string for versatile osc clockRob Herring2014-06-241-2/+2
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Rob Herring <robh@kernel.org> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Kumar Gala <galak@codeaurora.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Linus Walleij <linus.walleij@linaro.org>
* | | clk: clps711x: Add DT bindings documentationAlexander Shiyan2014-07-281-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds DT binding documentation for the Cirrus Logic CLPS711X-based CPUs clock subsystem. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Mike Turquette <mturquette@linaro.org>
* | | clk: st: Adds Flexgen clock bindingGabriel FERNANDEZ2014-07-282-0/+124
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A Flexgen structure is composed by: - a clock cross bar (represented by a mux element) - a pre and final dividers (represented by a divider and gate elements) Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org> Acked-by: Peter Griffin <peter.griffin@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
* | | clk: st: Update ST clock binding documentationGabriel FERNANDEZ2014-07-287-68/+94
| | | | | | | | | | | | | | | | | | | | | | | | | | | Naming convention was changed in dts file but the clock binding documentation hasn't been updated. Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org> Acked-by: Peter Griffin <peter.griffin@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
* | | Merge tag 'sunxi-clocks-for-3.17' of ↵Mike Turquette2014-07-251-0/+7
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into clk-next-sunxi Allwinner clocks additions for 3.17 This pull request adds support for the clocks found in the newly supported Allwinner A23 clocks.
| * | | clk: sunxi: sun6i-a31-apb0-gates: Add A23 APB0 supportChen-Yu Tsai2014-07-151-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds "allwinner,sun8i-a23-apb0-gates-clk", a A23 specific compatible to the sun6i-a31-apb0-gates clock driver, along with the gate bitmap. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| * | | clk: sunxi: Add A23 APB0 divider clock supportChen-Yu Tsai2014-07-071-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The A23 has an almost identical PRCM clock tree. The difference in the APB0 clock is the smallest divisor is 1, instead of 2. This patch adds a separate sun8i-a23-apb0-clk driver to support it. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| * | | clk: sunxi: Add A23 clocks supportChen-Yu Tsai2014-07-041-0/+5
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The clock control unit on the A23 is similar to the one found on the A31. The AHB1, APB1, APB2 gates on the A23 are almost identical to the ones on the A31, but some outputs are missing. The main CPU PLL (PLL1) however is like that on older Allwinner SoCs, such as the A10 or A20, but the N factor starts from 1 instead of 0. This patch adds support for PLL1 and all the basic clock muxes and gates. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* | | Merge tag 'qcom-clocks-for-3.17' of ↵Mike Turquette2014-07-252-0/+4
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom into clk-next-msm qcom clock changes for 3.17 These patches add support for a handful of Qualcomm's SoC clock controllers: APQ8084 gcc and mmcc, IPQ8064 gcc, and APQ8064. There's also a small collection of bug fixes that aren't critical -rc worthy regressions because the consumer drivers aren't present or using the buggy clocks and one optimization for HDMI.
| * | | clk: qcom: Add support for APQ8064 multimedia clocksStephen Boyd2014-07-151-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The APQ8064 multimedia clock controller is fairly similar to the 8960 multimedia clock controller, except that gfx2d0/1 has been removed and the gfx3d frequency is slightly faster when using the newly introduced PLL15. We also add vcap clocks and a couple new TV clocks. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
| * | | clk: qcom: Add support for IPQ8064's global clock controller (GCC)Kumar Gala2014-07-151-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a driver for the global clock controller found on IPQ8064 based platforms. This should allow most non-multimedia device drivers to probe and control their clocks. This is currently missing clocks for USB HSIC and networking devices. Signed-off-by: Kumar Gala <galak@codeaurora.org> Signed-off-by: Andy Gross <agross@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
| * | | clk: qcom: Add APQ8084 Multimedia Clock Controller (MMCC) supportGeorgi Djakov2014-07-151-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the multimedia clock controller found on the APQ8084 based platforms. This will allow the multimedia device drivers to control their clocks. Signed-off-by: Georgi Djakov <gdjakov@mm-sol.com> [sboyd: Rework parent mapping to avoid conflicts] Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
| * | | clk: qcom: Add APQ8084 Global Clock Controller documentationGeorgi Djakov2014-07-111-0/+1
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | Add the compatible string for the APQ8084 global clock controller to the clock binding documentation. Signed-off-by: Georgi Djakov <gdjakov@mm-sol.com> Reviewed-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* | | clk: Support for clock parents and rates assigned from device treeSylwester Nawrocki2014-07-251-0/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds helper functions to configure clock parents and rates as specified through 'assigned-clock-parents', 'assigned-clock-rates' DT properties for a clock provider or clock consumer device. The helpers are now being called by the bus code for the platform, I2C and SPI busses, before the driver probing and also in the clock core after registration of a clock provider. Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Acked-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
* | | Merge branch 'clk-rockchip' into clk-nextMike Turquette2014-07-233-0/+125
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| * | dt-bindings: add documentation for rk3288 cruHeiko Stübner2014-07-131-0/+61
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds the dt-binding documentation for the clock and reset unit found on Rockchip rk3288 SoCs. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-By: Max Schwarz <max.schwarz@online.de> Tested-By: Max Schwarz <max.schwarz@online.de> Signed-off-by: Mike Turquette <mturquette@linaro.org>
| * | dt-bindings: add documentation for rk3188 clock and reset unitHeiko Stübner2014-07-132-0/+64
| |/ | | | | | | | | | | | | | | | | | | | | | | | | This add bindings documentation for the clock and reset unit found on rk3188 and rk3066 SoCs from Rockchip. Also deprecate the old gate clock binding, as these shouldn't be used in the future. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-By: Max Schwarz <max.schwarz@online.de> Tested-By: Max Schwarz <max.schwarz@online.de> Signed-off-by: Mike Turquette <mturquette@linaro.org>
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