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* clk: renesas: rcar-gen2: Document R8A7792 supportSergei Shtylyov2016-06-211-0/+1
| | | | | | | | | Renesas R8A7792 SoC is a member of the R-Car gen2 family and so has CPG... Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Acked-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
* clk: shmobile: rcar-gen2: Add CPG/MSTP Clock Domain supportGeert Uytterhoeven2015-08-121-2/+24
| | | | | | | | | | | | | | | | Add Clock Domain support to the R-Car Gen2 Clock Pulse Generator (CPG) driver using the generic PM Domain. This allows to power-manage the module clocks of SoC devices that are part of the CPG/MSTP Clock Domain using Runtime PM, or for system suspend/resume. SoC devices that are part of the CPG/MSTP Clock Domain and can be power-managed through an MSTP clock should be tagged in DT with a proper "power-domains" property. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Stephen Boyd <sboyd@codeaurora.org> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* clk: shmobile: rcar-gen2: Document mandatory compatible fallbackGeert Uytterhoeven2015-06-011-1/+1
| | | | | | | | The generic R-Car Gen2 CPG compatible value is mandatory, as the driver uses only this value for matching. Document that this is a fallback that must be present. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
* clk: shmobile: Add R-Car Gen2 ADSP clock supportSergei Shtylyov2015-01-081-2/+3
| | | | | | | | | | | | | Add the ADSP clock support to the R-Car generation 2 CPG driver. This clock gets derived from PLL1. The layout of the ADSPCKCR register is similar to those of the clocks supported by the 'clk-div6' driver but the divider encoding is non-linear, so can't be supported by that driver... Based on the original patch by Konstantin Kozhevnikov <konstantin.kozhevnikov@cogentembedded.com>. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
* clk: shmobile: Add R-Car Gen2 RCAN clock supportSergei Shtylyov2015-01-081-4/+6
| | | | | | | | | | Add the RCAN clock support to the R-Car generation 2 CPG driver. This clock gets derived from the USB_EXTAL clock, dividing it by 6. The layout of the RCANCKCR register is similar to those of the clocks supported by the 'clk-div6' driver but has no divider field, and so can't be supported by that driver... Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
* clk: shmobile: r8a7793: document CPG clock supportYoshihiro Kaneko2015-01-081-0/+1
| | | | | | Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com> Acked-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
* ARM: shmobile: r8a7794: document CPG clock supportUlrich Hecht2014-09-021-0/+1
| | | | | Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
* clk: shmobile: Add R-Car Gen2 clocks supportLaurent Pinchart2013-12-121-0/+32
The R-Car Gen2 SoCs (R8A7790 and R8A7791) have several clocks that are too custom to be supported in a generic driver. Those clocks can be divided in two categories: - Fixed rate clocks with multiplier and divisor set according to boot mode configuration - Custom divider clocks with SoC-specific divider values This driver supports both. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Kumar Gala <galak@codeaurora.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
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