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-rw-r--r--drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c1
-rw-r--r--drivers/gpu/drm/amd/powerplay/inc/hwmgr.h8
2 files changed, 9 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c
index 2d72e06845b7..82427fb454d2 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c
@@ -67,6 +67,7 @@ int hwmgr_init(struct amd_pp_init *pp_init, struct pp_instance *handle)
hwmgr->chip_id = pp_init->chip_id;
hwmgr->usec_timeout = AMD_MAX_USEC_TIMEOUT;
hwmgr->power_source = PP_PowerSource_AC;
+ hwmgr->pp_table_version = PP_TABLE_V1;
hwmgr_init_default_caps(hwmgr);
hwmgr_set_user_specify_caps(hwmgr);
diff --git a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
index 7caf8d071ce7..e98748344801 100644
--- a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
+++ b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
@@ -599,6 +599,13 @@ enum PP_VCE_LEVEL {
};
+enum PP_TABLE_VERSION {
+ PP_TABLE_V0 = 0,
+ PP_TABLE_V1,
+ PP_TABLE_V2,
+ PP_TABLE_MAX
+};
+
/**
* The main hardware manager structure.
*/
@@ -606,6 +613,7 @@ struct pp_hwmgr {
uint32_t chip_family;
uint32_t chip_id;
+ uint32_t pp_table_version;
void *device;
struct pp_smumgr *smumgr;
const void *soft_pp_table;
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