diff options
Diffstat (limited to 'drivers/staging/media/atomisp/pci/atomisp2/atomisp_cmd.c')
| -rw-r--r-- | drivers/staging/media/atomisp/pci/atomisp2/atomisp_cmd.c | 21 |
1 files changed, 11 insertions, 10 deletions
diff --git a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_cmd.c b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_cmd.c index f48bf451c1f5..b0c647f4d250 100644 --- a/drivers/staging/media/atomisp/pci/atomisp2/atomisp_cmd.c +++ b/drivers/staging/media/atomisp/pci/atomisp2/atomisp_cmd.c @@ -27,7 +27,8 @@ #include <linux/kfifo.h> #include <linux/pm_runtime.h> #include <linux/timer.h> -#include <asm/intel-mid.h> + +#include <asm/iosf_mbi.h> #include <media/v4l2-event.h> #include <media/videobuf-vmalloc.h> @@ -143,36 +144,36 @@ static int write_target_freq_to_hw(struct atomisp_device *isp, unsigned int ratio, timeout, guar_ratio; u32 isp_sspm1 = 0; int i; + if (!isp->hpll_freq) { dev_err(isp->dev, "failed to get hpll_freq. no change to freq\n"); return -EINVAL; } - isp_sspm1 = intel_mid_msgbus_read32(PUNIT_PORT, ISPSSPM1); + iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, ISPSSPM1, &isp_sspm1); if (isp_sspm1 & ISP_FREQ_VALID_MASK) { dev_dbg(isp->dev, "clearing ISPSSPM1 valid bit.\n"); - intel_mid_msgbus_write32(PUNIT_PORT, ISPSSPM1, + iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE, ISPSSPM1, isp_sspm1 & ~(1 << ISP_FREQ_VALID_OFFSET)); } ratio = (2 * isp->hpll_freq + new_freq / 2) / new_freq - 1; guar_ratio = (2 * isp->hpll_freq + 200 / 2) / 200 - 1; - isp_sspm1 = intel_mid_msgbus_read32(PUNIT_PORT, ISPSSPM1); + iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, ISPSSPM1, &isp_sspm1); isp_sspm1 &= ~(0x1F << ISP_REQ_FREQ_OFFSET); for (i = 0; i < ISP_DFS_TRY_TIMES; i++) { - intel_mid_msgbus_write32(PUNIT_PORT, ISPSSPM1, + iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE, ISPSSPM1, isp_sspm1 | ratio << ISP_REQ_FREQ_OFFSET | 1 << ISP_FREQ_VALID_OFFSET | guar_ratio << ISP_REQ_GUAR_FREQ_OFFSET); - isp_sspm1 = intel_mid_msgbus_read32(PUNIT_PORT, ISPSSPM1); - + iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, ISPSSPM1, &isp_sspm1); timeout = 20; while ((isp_sspm1 & ISP_FREQ_VALID_MASK) && timeout) { - isp_sspm1 = intel_mid_msgbus_read32(PUNIT_PORT, ISPSSPM1); + iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, ISPSSPM1, &isp_sspm1); dev_dbg(isp->dev, "waiting for ISPSSPM1 valid bit to be 0.\n"); udelay(100); timeout--; @@ -187,10 +188,10 @@ static int write_target_freq_to_hw(struct atomisp_device *isp, return -EINVAL; } - isp_sspm1 = intel_mid_msgbus_read32(PUNIT_PORT, ISPSSPM1); + iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, ISPSSPM1, &isp_sspm1); timeout = 10; while (((isp_sspm1 >> ISP_FREQ_STAT_OFFSET) != ratio) && timeout) { - isp_sspm1 = intel_mid_msgbus_read32(PUNIT_PORT, ISPSSPM1); + iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, ISPSSPM1, &isp_sspm1); dev_dbg(isp->dev, "waiting for ISPSSPM1 status bit to be 0x%x.\n", new_freq); udelay(100); |
