From e929912354d61206c2dbfe43a3d1db46072056fe Mon Sep 17 00:00:00 2001 From: Dan Crowell Date: Tue, 30 Apr 2019 13:06:07 -0500 Subject: Add Axone to RISK_LEVEL logic Axone reuses the RISK_LEVEL settings for Nimbus DD2.3 so changes are made to reflect that. This is primarily a documentation exercise but there is logic now to normalize the RISK_LEVEl up to 4,5 versus 0,1 just to stay sane and reduce the test matrix. Change-Id: I5410d1bf7b12fc7f771e2c9826fcd086b2520091 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/76757 Reviewed-by: Matt Derksen Tested-by: Jenkins Server Tested-by: Jenkins OP Build CI Tested-by: FSP CI Jenkins Reviewed-by: Matthew Raybuck Reviewed-by: Jayashankar Padath Tested-by: Jenkins OP HW Reviewed-by: Daniel M. Crowell --- src/include/usr/targeting/common/util.H | 9 +++++++++ src/usr/hdat/hdatiplparms.C | 20 +++++++++++--------- src/usr/hwas/common/hwas.C | 33 +++++++++++++++++++++++++++++++++ 3 files changed, 53 insertions(+), 9 deletions(-) (limited to 'src') diff --git a/src/include/usr/targeting/common/util.H b/src/include/usr/targeting/common/util.H index 6f0fcb307..ba41445c1 100644 --- a/src/include/usr/targeting/common/util.H +++ b/src/include/usr/targeting/common/util.H @@ -102,6 +102,15 @@ namespace UTIL P9N23_P9C13_NATIVE_MODE_MINIMUM = 0x04, P9N23_P9C13_NATIVE_SMF_RUGBY_FAVOR_SECURITY = 0x04, P9N23_P9C13_NATIVE_SMF_RUGBY_FAVOR_PERFORMANCE = 0x05, + + // Axone modes (same as DD2.3 native mode) + P9A_RUGBY_FAVOR_SECURITY = 0x04, + P9A_RUGBY_FAVOR_PERFORMANCE = 0x05, + // The _LOWER numbered values are equivalent to the higher + // values but they exist to maintain compatibility with + // Nimbus DD2.3 settings. + P9A_RUGBY_FAVOR_SECURITY_LOWER = 0x00, + P9A_RUGBY_FAVOR_PERFORMANCE_LOWER = 0x01, } Risk_level; } diff --git a/src/usr/hdat/hdatiplparms.C b/src/usr/hdat/hdatiplparms.C index 1f4e3f066..c0b24e49d 100755 --- a/src/usr/hdat/hdatiplparms.C +++ b/src/usr/hdat/hdatiplparms.C @@ -564,10 +564,7 @@ static void hdatGetFeatureFlagInfo( l_ddLevel = l_pvr.getDDLevel(); // Default to Nimbus DD2.3 - uint8_t l_ddLvlIdx = 2; - l_featFlagArr = hdatIplpFeatureFlagSettingsArray[l_riskLvl][l_ddLvlIdx]; - l_featFlagArrSize = - sizeof(hdatIplpFeatureFlagSettingsArray[l_riskLvl][l_ddLvlIdx]); + uint8_t l_ddLvlIdx = HDAT_NIMBUS_DD_23_IDX; // Set the value based on DD level and risk level if (l_pvr.chipType == PVR_t::NIMBUS_CHIP) @@ -586,12 +583,17 @@ static void hdatGetFeatureFlagInfo( { l_ddLvlIdx = HDAT_NIMBUS_DD_23_IDX; } - - l_featFlagArr = hdatIplpFeatureFlagSettingsArray[l_riskLvl][l_ddLvlIdx]; - l_featFlagArrSize = - sizeof(hdatIplpFeatureFlagSettingsArray[l_riskLvl][l_ddLvlIdx]); } - + else if (l_pvr.chipFamily == PVR_t::P9_AXONE) + { + // Axone follows the Nimbus DD2.3 settings + l_ddLvlIdx = HDAT_NIMBUS_DD_23_IDX; + } + + l_featFlagArr = hdatIplpFeatureFlagSettingsArray[l_riskLvl][l_ddLvlIdx]; + l_featFlagArrSize = + sizeof(hdatIplpFeatureFlagSettingsArray[l_riskLvl][l_ddLvlIdx]); + HDAT_DBG("Feature flag array size:0x%x, Model:0x%x, DD Level:0x%x " "Risk Level:0x%x", l_featFlagArrSize, l_pvr.chipType, l_ddLevel, l_riskLvl); diff --git a/src/usr/hwas/common/hwas.C b/src/usr/hwas/common/hwas.C index 432d2d4f0..f0ce3ed04 100644 --- a/src/usr/hwas/common/hwas.C +++ b/src/usr/hwas/common/hwas.C @@ -4068,6 +4068,33 @@ errlHndl_t updateProcCompatibilityRiskLevel() return l_err; } +/** + * @brief Normalize the RISK_LEVEL for Axone to use the upper range + */ +void normalizeRiskLevelForAxone( void ) +{ + // Axone follows Nimbus DD2.3 settings except it can use + // the low or high numbers. Let's normalize it to the + // high range to make things less confusing. + Target* pSys; + targetService().getTopLevelTarget(pSys); + auto l_risk = pSys->getAttr(); + if( TARGETING::UTIL::P9A_RUGBY_FAVOR_SECURITY_LOWER == l_risk ) + { + l_risk = TARGETING::UTIL::P9A_RUGBY_FAVOR_SECURITY; + } + else if( TARGETING::UTIL::P9A_RUGBY_FAVOR_PERFORMANCE_LOWER == l_risk ) + { + l_risk = TARGETING::UTIL::P9A_RUGBY_FAVOR_PERFORMANCE; + } + else + { + // Nothing to change, just leave + return; + } + pSys->setAttr(l_risk); +} + errlHndl_t validateProcessorEcLevels() { HWAS_INF("validateProcessorEcLevels entry"); @@ -4113,6 +4140,12 @@ errlHndl_t validateProcessorEcLevels() break; } } + else if(TARGETING::MODEL_AXONE == l_model) + { + // Axone follows Nimbus DD2.3 settings except it can use + // the low or high numbers, going to force one way. + normalizeRiskLevelForAxone(); + } //Loop through all functional procs and create error logs //for any processors whose EC does not match the master -- cgit v1.2.3