From 2619526afc04e9fe58c680ba67b93bd2d916283a Mon Sep 17 00:00:00 2001 From: Chris Steffen Date: Tue, 9 Jul 2019 15:28:40 -0400 Subject: P9A Tx Fifo Init + Init Settings Update - Added Tx Fifo Init Function to Dccal - Forced rx_dc_enable_cm_coarse_en = 0 - Updated P9A Filt Pll Attribute to select BG = 0 Change-Id: I7090856ba48886fb278e65814249a0166b7fe098 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/80218 Tested-by: FSP CI Jenkins Tested-by: Jenkins Server Tested-by: PPE CI Tested-by: Hostboot CI Tested-by: HWSV CI Reviewed-by: Megan P. Nguyen Reviewed-by: Christian R. Geddes Reviewed-by: Jennifer A Stofer Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/80251 Tested-by: Jenkins OP Build CI Tested-by: Jenkins OP HW Reviewed-by: Christian R Geddes --- .../p9/procedures/hwp/initfiles/p9a_omic_io_scom.C | 8 ++++ .../chips/p9/procedures/hwp/io/p9a_io_omi_dccal.C | 43 ++++++++++++++++++++++ .../xml/attribute_info/chip_ec_attributes.xml | 7 ---- 3 files changed, 51 insertions(+), 7 deletions(-) (limited to 'src') diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9a_omic_io_scom.C b/src/import/chips/p9/procedures/hwp/initfiles/p9a_omic_io_scom.C index 3603135c4..6cf208fa3 100644 --- a/src/import/chips/p9/procedures/hwp/initfiles/p9a_omic_io_scom.C +++ b/src/import/chips/p9/procedures/hwp/initfiles/p9a_omic_io_scom.C @@ -250,6 +250,14 @@ fapi2::ReturnCode p9a_omic_io_scom(const fapi2::Target& (l_MCP_OMI0_IOO_CPLT_RX0_RXCTL_CTL_REGS_RX_CTL_REGS_RX_RC_ENABLE_AUTO_RECAL_OFF ); FAPI_TRY(fapi2::putScom(TGT0, 0x800970000701103full, l_scom_buffer)); } + { + FAPI_TRY(fapi2::getScom( TGT0, 0x800978000701103full, l_scom_buffer )); + + constexpr auto l_MCP_OMI0_IOO_CPLT_RX0_RXCTL_CTL_REGS_RX_CTL_REGS_RX_DC_ENABLE_CM_COARSE_CAL_OFF = 0x0; + l_scom_buffer.insert<48, 1, 63, uint64_t> + (l_MCP_OMI0_IOO_CPLT_RX0_RXCTL_CTL_REGS_RX_CTL_REGS_RX_DC_ENABLE_CM_COARSE_CAL_OFF ); + FAPI_TRY(fapi2::putScom(TGT0, 0x800978000701103full, l_scom_buffer)); + } { FAPI_TRY(fapi2::getScom( TGT0, 0x800988000701103full, l_scom_buffer )); diff --git a/src/import/chips/p9/procedures/hwp/io/p9a_io_omi_dccal.C b/src/import/chips/p9/procedures/hwp/io/p9a_io_omi_dccal.C index 10748a148..dff06ace3 100644 --- a/src/import/chips/p9/procedures/hwp/io/p9a_io_omi_dccal.C +++ b/src/import/chips/p9/procedures/hwp/io/p9a_io_omi_dccal.C @@ -722,6 +722,46 @@ fapi_try_exit: return fapi2::current_err; } +/** + * @brief Init PHY Tx FIFO Logic + * @param[in] i_tgt FAPI2 Target + * @param[in] i_lave_vector Lanve Vector + * @retval ReturnCode + */ +fapi2::ReturnCode p9_omi_tx_fifo_init(const OMIC_TGT i_tgt, const uint32_t i_lane_vector) +{ + FAPI_IMP("p9_omi_tx_fifo_init: I/O OMI Entering"); + const uint8_t GRP0 = 0; + const uint8_t LANES = 24; + fapi2::buffer l_data = 0; + + // Power up Per-Lane Registers + for(uint8_t l_lane = 0; l_lane < LANES; ++l_lane) + { + if(((0x1 << l_lane) & i_lane_vector) != 0) + { + // - Clear TX_UNLOAD_CLK_DISABLE + FAPI_TRY(io::read(OPT_TX_MODE2_PL, i_tgt, GRP0, l_lane, l_data)); + io::set(OPT_TX_UNLOAD_CLK_DISABLE, 0, l_data); + FAPI_TRY(io::write(OPT_TX_MODE2_PL, i_tgt, GRP0, l_lane, l_data)); + + // - Set TX_FIFO_INIT + l_data.flush<0>(); + io::set(OPT_TX_FIFO_INIT, 1, l_data); + FAPI_TRY(io::write(OPT_TX_CNTL1G_PL, i_tgt, GRP0, l_lane, l_data)); + + // - Set TX_UNLOAD_CLK_DISABLE + FAPI_TRY(io::read(OPT_TX_MODE2_PL, i_tgt, GRP0, l_lane, l_data)); + io::set(OPT_TX_UNLOAD_CLK_DISABLE, 1, l_data ); + FAPI_TRY(io::write(OPT_TX_MODE2_PL, i_tgt, GRP0, l_lane, l_data)); + } + } + +fapi_try_exit: + FAPI_IMP("p9_omi_tx_fifo_init: I/O OMI Exiting"); + return fapi2::current_err; +} + } // end namespace P9A_IO_OMI_DCCAL using namespace P9A_IO_OMI_DCCAL; @@ -784,6 +824,9 @@ fapi2::ReturnCode p9a_io_omi_dccal(const OMIC_TGT i_tgt, const uint32_t i_lane_v FAPI_TRY(set_omi_flywheel_off(i_tgt, i_lane_vector, 0)); FAPI_TRY(set_omi_pr_edge_track_cntl(i_tgt, i_lane_vector, 0)); + // Run Tx FIFO Init + FAPI_TRY(p9_omi_tx_fifo_init(i_tgt, i_lane_vector)); + fapi_try_exit: FAPI_IMP("p9_io_omi_dccal: I/O OMI Exiting"); return fapi2::current_err; diff --git a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml index 51a045dba..fe79c1d12 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml @@ -1265,13 +1265,6 @@ GREATER_THAN_OR_EQUAL - - ENUM_ATTR_NAME_AXONE - - 0x10 - GREATER_THAN_OR_EQUAL - - -- cgit v1.2.3