From 6b508aaf86e1d397155ada70bd1678cf5efde9aa Mon Sep 17 00:00:00 2001 From: Dan Crowell Date: Wed, 10 May 2017 15:55:40 -0500 Subject: Map BAR attributes based on data from Bootloader If the master processor has no memory behind it the entire memory map must be modified. Each processor has its own statically defined map that covers both memory and MMIOs. If the master has no memory, its memory map is swapped with another processor. Each processor gets a new effective fabric id that is then used to compute all of the BAR values for those processors. The SBE boots with a certain memory map programmed into the master processor. That value is then passed up through the bootloader into Hostboot. This value is compared to the BAR values that Hostboot assumes it is using. Based on that comparison, various attributes are computed to match the effective fabric positions. Change-Id: I2b0d1959c303df8c9c28c8f0a5b5be1e77aa154f RTC: 173528 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40359 Tested-by: Daniel M. Crowell Reviewed-by: Martin Gloff Reviewed-by: Christian R. Geddes Tested-by: Jenkins Server Tested-by: FSP CI Jenkins Reviewed-by: William G. Hoffa --- src/usr/lpc/lpcdd.C | 12 +- src/usr/targeting/common/genHwsvMrwXml.pl | 19 --- src/usr/targeting/common/processMrw.pl | 21 ++- .../targeting/common/xmltohb/attribute_types.xml | 43 +------ .../common/xmltohb/simics_NIMBUS.system.xml | 18 +-- src/usr/targeting/common/xmltohb/target_types.xml | 6 +- src/usr/targeting/targetservicestart.C | 142 +++++++++++++++++++++ src/usr/xscom/xscom.H | 9 +- 8 files changed, 187 insertions(+), 83 deletions(-) (limited to 'src/usr') diff --git a/src/usr/lpc/lpcdd.C b/src/usr/lpc/lpcdd.C index c84253563..fd1fa54e1 100644 --- a/src/usr/lpc/lpcdd.C +++ b/src/usr/lpc/lpcdd.C @@ -47,7 +47,7 @@ #include #include #include - +#include trace_desc_t* g_trac_lpc; TRAC_INIT( & g_trac_lpc, LPC_COMP_NAME, 2*KILOBYTE, TRACE::BUFFER_SLOW); @@ -380,6 +380,16 @@ void block_lpc_ops( bool i_block ) Singleton::instance().lock(i_block); } +/** + * @brief Return the value of the LPC BAR that the driver is using + */ +uint64_t get_lpc_bar( void ) +{ + //@todo-RTC:173521-Return live value + return MMIO_GROUP0_CHIP0_LPC_BASE_ADDR; +} + + }; //namespace LPC /////////////////////////////////////////////////////////////////////////////// diff --git a/src/usr/targeting/common/genHwsvMrwXml.pl b/src/usr/targeting/common/genHwsvMrwXml.pl index 55cb75bc3..dfc247ea3 100755 --- a/src/usr/targeting/common/genHwsvMrwXml.pl +++ b/src/usr/targeting/common/genHwsvMrwXml.pl @@ -3085,13 +3085,6 @@ sub generate_sys "; } - #adding XSCOM_BASE_ADDRESS to the system target for HDAT - print " - XSCOM_BASE_ADDRESS - 0x000603FC00000000 - -"; - if( $haveFSPs == 0 ) { generate_apss_adc_config() @@ -3929,12 +3922,6 @@ sub generate_proc 0x0006013100000000 + $nodeSize*$lognode + $chipSize*$logid ); printf( " \n" ); - #LPC Bus address - printf( " LPC_BUS_ADDR\n" ); - printf( " 0x%016X\n", - 0x0006030000000000 + $nodeSize*$lognode + $chipSize*$logid ); - printf( " \n" ); - #Nvidia Link - NPU Priviledged address printf( " NVIDIA_NPU_PRIVILEGED_ADDR\n" ); printf( " 0x%016X\n", @@ -3983,12 +3970,6 @@ sub generate_proc 0x00060302031D0000 + $nodeSize*$lognode + $chipSize*$logid ); printf( " \n" ); - #XSCOM address - printf( " XSCOM_BASE_ADDRESS\n" ); - printf( " 0x%016X\n", - 0x000603FC00000000 + $nodeSize*$lognode + $chipSize*$logid ); - printf( " \n" ); - print " \n\n"; # end PHYP Memory Map diff --git a/src/usr/targeting/common/processMrw.pl b/src/usr/targeting/common/processMrw.pl index 56cfe4572..7cd36a09e 100644 --- a/src/usr/targeting/common/processMrw.pl +++ b/src/usr/targeting/common/processMrw.pl @@ -177,10 +177,13 @@ sub processSystem $targetObj->{NUM_PROCS_PER_NODE}); parseBitwise($targetObj,$target,"CDM_POLICIES"); - my ($num,$base,$group_offset,$proc_offset,$offset) = split(/,/, - $targetObj->getAttribute($target,"XSCOM_BASE_ADDRESS")); - - $targetObj->setAttribute($target, "XSCOM_BASE_ADDRESS", $base); + #@fixme-RTC:174616-Remove deprecated support + if (!$targetObj->isBadAttribute($target,"XSCOM_BASE_ADDRESS") ) + { + my ($num,$base,$group_offset,$proc_offset,$offset) = split(/,/, + $targetObj->getAttribute($target,"XSCOM_BASE_ADDRESS")); + $targetObj->setAttribute($target, "XSCOM_BASE_ADDRESS", $base); + } # TODO RTC:170860 - Remove this after dimm connector defines VDDR_ID my $system_name = $targetObj->getAttribute($target,"SYSTEM_NAME"); @@ -751,14 +754,12 @@ sub setupBars "INTP_BASE_ADDR", "VAS_HYPERVISOR_WINDOW_CONTEXT_ADDR", "VAS_USER_WINDOW_CONTEXT_ADDR", - "LPC_BUS_ADDR", "NVIDIA_NPU_PRIVILEGED_ADDR", "NVIDIA_NPU_USER_REG_ADDR", "NVIDIA_PHY0_REG_ADDR", "NVIDIA_PHY1_REG_ADDR", "PSI_HB_ESB_ADDR", "XIVE_CONTROLLER_BAR_ADDR", - "XSCOM_BASE_ADDRESS", "NX_RNG_ADDR"); # Attribute only valid in naples-based systems @@ -766,6 +767,14 @@ sub setupBars push(@bars,"NPU_MMIO_BAR_BASE_ADDR"); } + #@fixme-RTC:174616-Remove deprecated support + if (!$targetObj->isBadAttribute($target,"LPC_BUS_ADDR") ) { + push(@bars,"LPC_BUS_ADDR"); + } + if (!$targetObj->isBadAttribute($target,"XSCOM_BASE_ADDRESS") ) { + push(@bars,"XSCOM_BASE_ADDRESS"); + } + foreach my $bar (@bars) { my ($num,$base,$group_offset,$proc_offset,$offset) = split(/,/, diff --git a/src/usr/targeting/common/xmltohb/attribute_types.xml b/src/usr/targeting/common/xmltohb/attribute_types.xml index 8d8b743d0..2acf9856c 100644 --- a/src/usr/targeting/common/xmltohb/attribute_types.xml +++ b/src/usr/targeting/common/xmltohb/attribute_types.xml @@ -3390,13 +3390,14 @@ XSCOM_BASE_ADDRESS - System XSCOM base address + XSCOM base address - non-volatile + volatile + @@ -18893,12 +18894,13 @@ Measured in GB LPC_BUS_ADDR - LPC Bus address - MMIO consumed by PHYP + LPC Bus address - non-volatile + volatile + @@ -21790,21 +21792,6 @@ Measured in GB - - ADU_XSCOM_BAR_BASE_ADDR - Defines XSCOM base address on each processor level. - address provided by the MRW - - - - - ATTR_ADU_XSCOM_BAR_BASE_ADDR - DIRECT - - volatile-zeroed - - - PARENT_PERVASIVE @@ -30237,23 +30224,6 @@ Measured in GB - - LPC_BASE_ADDR - - Defines LPC base address on each processor level. - - - - - - non-volatile - - - ATTR_LPC_BASE_ADDR - DIRECT - - - PROC_FSP_BAR_ENABLE @@ -30781,6 +30751,7 @@ Measured in GB ATTR_PROC_LPC_BAR_BASE_ADDR_OFFSET DIRECT + diff --git a/src/usr/targeting/common/xmltohb/simics_NIMBUS.system.xml b/src/usr/targeting/common/xmltohb/simics_NIMBUS.system.xml index ca63e2b18..485881f1f 100644 --- a/src/usr/targeting/common/xmltohb/simics_NIMBUS.system.xml +++ b/src/usr/targeting/common/xmltohb/simics_NIMBUS.system.xml @@ -44,7 +44,7 @@ * Each Nimbus has 2 OBUS (OB0 and OB3) * Each OBUS has 3 OBUS_BRICK * Each Nimbus has 21 PPE units (including the SBE): - * 1 SBE, 1 Powerbus/Fabric PPE, 4 GPEs, 12 CMEs, and 3 IO PPEs. * + * 1 SBE, 1 Powerbus/Fabric PPE, 4 GPEs, 12 CMEs, and 3 IO PPEs. * Each chiplet existing in a Nimbus has 1 equivalent PERV unit * Each Nimbus has 2 CAPP units * Each Nimbus has 1 SBE unit @@ -119,9 +119,14 @@ PAYLOAD_KIND NONE - XSCOM_BASE_ADDRESS + + XSCOM_BASE_ADDRESS 0x000603FC00000000 + + LPC_BUS_ADDR + 0x0006030000000000 + TPM_REQUIRED 1 @@ -450,9 +455,6 @@ PROC_MASTER_TYPE ACTING_MASTER - XSCOM_BASE_ADDRESS - 0x000603FC00000000 - I2C_BUS_SPEED_ARRAY @@ -5592,9 +5594,6 @@ VAS_USER_WINDOW_CONTEXT_ADDR 0x0006053100000000 - LPC_BUS_ADDR - 0x0006070000000000 - NVIDIA_NPU_PRIVILEGED_ADDR 0x0006070200000000 @@ -5619,9 +5618,6 @@ NX_RNG_ADDR 0x00060702031D0000 - XSCOM_BASE_ADDRESS - 0x000607FC00000000 - diff --git a/src/usr/targeting/common/xmltohb/target_types.xml b/src/usr/targeting/common/xmltohb/target_types.xml index 3bdf8f1af..1c02faadb 100755 --- a/src/usr/targeting/common/xmltohb/target_types.xml +++ b/src/usr/targeting/common/xmltohb/target_types.xml @@ -311,7 +311,6 @@ TLB_RESERVE_SIZE TIME_BASE CPU_ATTR - ADU_XSCOM_BAR_BASE_ADDR PROC_OCC_SANDBOX_SIZE PROC_FABRIC_SYSTEM_MASTER_CHIP PROC_FABRIC_GROUP_MASTER_CHIP @@ -592,7 +591,7 @@ AFFINITY_PATH affinity:sys-0 - XSCOM_BASE_ADDRESS + XSCOM_BASE_ADDRESS0x000603FC00000000 IS_SIMULATION 0 @@ -799,6 +798,7 @@ MSS_MRW_RESET_DELAY_BEFORE_CAL MSS_MRW_DRAM_2N_MODE MRW_HW_MIRRORING_ENABLE + LPC_BUS_ADDR0x0006030000000000 SBE_UPDATE_DISABLE @@ -1066,6 +1066,7 @@ PROC_PCIE_PHB_ACTIVE PROC_DCM_INSTALLED XSCOM_BASE_ADDRESS + PROC_LPC_BAR_BASE_ADDR_OFFSET PSTATEGPE_BOOT_COPIER_IVPR_OFFSET STOPGPE_BOOT_COPIER_IVPR_OFFSET EQ_GARD @@ -1259,7 +1260,6 @@ 8 - LPC_BASE_ADDR BOOT_FREQ_MHZ diff --git a/src/usr/targeting/targetservicestart.C b/src/usr/targeting/targetservicestart.C index 969a2a7ab..1faae4cee 100755 --- a/src/usr/targeting/targetservicestart.C +++ b/src/usr/targeting/targetservicestart.C @@ -58,6 +58,10 @@ #include #include #include +#include +#include +#include +#include #ifdef CONFIG_DRTM #include @@ -94,6 +98,12 @@ static void initializeAttributes(TargetService& i_targetService, */ static void checkProcessorTargeting(TargetService& i_targetService); +/** + * @brief Compute any values that might change based on a remap of memory + * @param[in] Pointer to targeting service + */ +static void adjustMemoryMap(TargetService& i_targetService); + /** * @brief Entry point for initialization service to initialize the targeting * code @@ -381,6 +391,9 @@ static void initializeAttributes(TargetService& i_targetService, else { l_pTopLevel->setAttr(0); + + // Compute any values that might change based on a remap of memory + adjustMemoryMap(i_targetService); } } else // top level is NULL - never expected @@ -392,6 +405,135 @@ static void initializeAttributes(TargetService& i_targetService, #undef TARG_FN } +/** + * @brief Utility macro to swap attributes + * @param[in] _attr Attribute ID + * @param[in] _master Master proc target + * @param[in] _victim Victim proc target + * @param[in] _cache Cache of victime attributes + */ +#define SWAP_ATTRIBUTE( _attr, _master, _victim, _cache ) \ +{ \ + _attr##_type l_masterVal = _master->getAttr<_attr>(); \ + _victim->setAttr<_attr>(l_masterVal); \ + TARG_INF( "%.8X>" #_attr "=%.16llX", get_huid(_victim), l_masterVal ); \ + _master->setAttr<_attr>(_cache[_attr]); \ + TARG_INF( "%.8X>" #_attr "=%.16llX", get_huid(_master), _cache[_attr] ); \ +} + +// Compute any values that might change based on a remap of memory +static void adjustMemoryMap( TargetService& i_targetService ) +{ + // Grab the value of the BARs that SBE booted with + uint64_t l_curXscomBAR = g_BlToHbDataManager.getXscomBAR(); + uint64_t l_curLpcBAR = g_BlToHbDataManager.getLpcBAR(); + TARG_INF( "adjustMemoryMap> xscom=%X, lpc=%X", l_curXscomBAR, l_curLpcBAR ); + + // Get the master proc + Target* l_pMasterProcChip = nullptr; + i_targetService.masterProcChipTargetHandle(l_pMasterProcChip); + assert(l_pMasterProcChip,"No Master Proc"); + + // Save off the base (group0-chip0) value for the BARs + Target* l_pTopLevel = nullptr; + i_targetService.getTopLevelTarget(l_pTopLevel); + ATTR_XSCOM_BASE_ADDRESS_type l_xscomBase = + l_pTopLevel->getAttr(); + ATTR_LPC_BUS_ADDR_type l_lpcBase = + l_pTopLevel->getAttr(); + + // Loop through all the procs to recompute all the BARs + // also find the victim to swap with + Target* l_swapVictim = nullptr; + std::map l_swapAttrs; + + TARGETING::TargetHandleList l_funcProcs; + getAllChips(l_funcProcs, TYPE_PROC, false ); + for( auto & l_procChip : l_funcProcs ) + { + TARG_INF( "Proc=%.8X", get_huid(l_procChip) ); + // Set effective fabric ids back to default values + ATTR_FABRIC_GROUP_ID_type l_groupId = + l_procChip->getAttr(); + l_procChip->setAttr(l_groupId); + + ATTR_FABRIC_CHIP_ID_type l_chipId = + l_procChip->getAttr(); + l_procChip->setAttr(l_chipId); + + // Compute default xscom BAR + ATTR_XSCOM_BASE_ADDRESS_type l_xscomBAR = + computeMemoryMapOffset( l_xscomBase, l_groupId, l_chipId ); + TARG_INF( " XSCOM=%.16llX", l_xscomBAR ); + l_procChip->setAttr(l_xscomBAR); + + // See if this chip's space now belongs to the master + if( l_xscomBAR == l_curXscomBAR ) + { + l_swapVictim = l_procChip; + TARG_INF( "Master Proc %.8X is using XSCOM BAR from %.8X, BAR=%.16llX", get_huid(l_pMasterProcChip), get_huid(l_swapVictim), l_curXscomBAR ); + l_swapAttrs[ATTR_PROC_EFF_FABRIC_GROUP_ID] = l_groupId; + l_swapAttrs[ATTR_PROC_EFF_FABRIC_CHIP_ID] = l_chipId; + l_swapAttrs[ATTR_XSCOM_BASE_ADDRESS] = l_xscomBAR; + } + + // Compute default LPC BAR + ATTR_LPC_BUS_ADDR_type l_lpcBAR = + computeMemoryMapOffset( l_lpcBase, l_groupId, l_chipId ); + TARG_INF( " LPC=%.16llX", l_lpcBAR ); + l_procChip->setAttr(l_lpcBAR); + if( l_swapVictim == l_procChip ) + { + l_swapAttrs[ATTR_LPC_BUS_ADDR] = l_lpcBAR; + } + + // Paranoid double-check that LPC matches XSCOM... + if( ((l_lpcBAR == l_curLpcBAR) && (l_swapVictim != l_procChip)) + || + ((l_lpcBAR != l_curLpcBAR) && (l_swapVictim == l_procChip)) ) + { + TARG_ERR("BARs do not match : LPC=%.16llX, XSCOM=%.16llX", + l_curLpcBAR, l_curXscomBAR ); + TARG_ASSERT(false,"Mismatch between LPC and XSCOM BARs"); + } + + // Set the rest of the BARs... + } + + // We must have found a match somewhere + TARG_ASSERT( l_swapVictim != nullptr, "No swap match found" ); + + // Now swap the BARs between the master and the victim if needed + if( l_swapVictim != l_pMasterProcChip ) + { + // Walk through all of the attributes we cached above + SWAP_ATTRIBUTE( ATTR_PROC_EFF_FABRIC_GROUP_ID, l_pMasterProcChip, + l_swapVictim, l_swapAttrs ); + SWAP_ATTRIBUTE( ATTR_PROC_EFF_FABRIC_CHIP_ID, l_pMasterProcChip, + l_swapVictim, l_swapAttrs ); + SWAP_ATTRIBUTE( ATTR_XSCOM_BASE_ADDRESS, l_pMasterProcChip, + l_swapVictim, l_swapAttrs ); + SWAP_ATTRIBUTE( ATTR_LPC_BUS_ADDR, l_pMasterProcChip, + l_swapVictim, l_swapAttrs ); + // Handle the rest of the BARs... + } + + + // Cross-check that what we ended up setting in the attributes + // matches the non-TARGETING values that the XSCOM and LPC + // drivers computed + if( l_pMasterProcChip->getAttr() + != LPC::get_lpc_bar() ) + { + TARG_ERR( "LPC attribute=%.16llX, live=%.16llX", + l_pMasterProcChip->getAttr(), + LPC::get_lpc_bar() ); + TARG_ASSERT( true, "LPC BARs are inconsistent" ); + } + //@todo-RTC:173519-Add xscom cross-check +} + + #undef TARG_CLASS #undef TARG_NAMESPACE diff --git a/src/usr/xscom/xscom.H b/src/usr/xscom/xscom.H index 9472f39d9..b1ceaab6a 100644 --- a/src/usr/xscom/xscom.H +++ b/src/usr/xscom/xscom.H @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2011,2016 */ +/* Contributors Listed Below - COPYRIGHT 2011,2017 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -31,18 +31,13 @@ #include #include +#include /** * @brief The (fixed) base address value for master proc */ constexpr uint64_t MASTER_PROC_XSCOM_BASE_ADDR = 0x000603FC00000000; -/** - * @brief Static offsets into other chips - */ -constexpr uint64_t MMIO_OFFSET_PER_CHIP = (4*TERABYTE); -constexpr uint64_t MMIO_OFFSET_PER_GROUP = (32*TERABYTE); - /** * @brief Type definition for XSCom address and Base */ -- cgit v1.2.3