From 3b05c7a782f6b61c7ba1bddc5f0d4f000f9e06c0 Mon Sep 17 00:00:00 2001 From: Matt Derksen Date: Fri, 14 Jun 2019 16:25:13 -0500 Subject: Enable fapi2MmioAccessTest for axone Use IB_RSP_ADDR memory spot to run some valid mmio operations. Also make sure a user's invalid input does not switch the scom switch to i2c operations. Change-Id: I68da42b2fc817f7bf4b99bb9c53cdf862136c7aa RTC:201738 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/79195 Tested-by: Jenkins Server Reviewed-by: Christian R. Geddes Tested-by: Jenkins OP Build CI Tested-by: Jenkins OP HW Tested-by: FSP CI Jenkins Reviewed-by: Roland Veloz Reviewed-by: Daniel M. Crowell --- src/usr/fapi2/test/fapi2MmioAccessTest.H | 83 ++++++++++++++++++++++++++++++-- src/usr/fapi2/test/fapi2Test.mk | 2 + src/usr/fapi2/test/p9_mmiotests.C | 31 +++++++----- src/usr/mmio/mmio.C | 12 +++-- 4 files changed, 109 insertions(+), 19 deletions(-) (limited to 'src/usr') diff --git a/src/usr/fapi2/test/fapi2MmioAccessTest.H b/src/usr/fapi2/test/fapi2MmioAccessTest.H index 3ba0f31c0..7290364ba 100644 --- a/src/usr/fapi2/test/fapi2MmioAccessTest.H +++ b/src/usr/fapi2/test/fapi2MmioAccessTest.H @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2018 */ +/* Contributors Listed Below - COPYRIGHT 2018,2019 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -39,6 +39,7 @@ #include #include #include +#include using namespace fapi2; @@ -110,10 +111,22 @@ void test_fapi2MmioInvalidSizes() // Get a list of all of the OCMB chips TARGETING::getAllChips(l_ocmbTargetList, TARGETING::TYPE_OCMB_CHIP, true); + if (!iv_serializeTestMutex) + { + TS_FAIL("test_fapi2MmioInvalidSizes(): unable to get test mutex"); + return; + } + mutex_lock(iv_serializeTestMutex); + for (auto & l_ocmb: l_ocmbTargetList) { Target fapi2_ocmbTarget( l_ocmb ); - + auto first_ocmb_info = l_ocmb->getAttr(); + if (!first_ocmb_info.useInbandScom) + { + TS_FAIL("test_fapi2MmioInvalidSizes() - scom access is not using inband"); + continue; + } numTests++; FAPI_INVOKE_HWP(l_errl, p9_mmiotest_indivisible_by_section_size, fapi2_ocmbTarget); if(l_errl != nullptr) @@ -126,6 +139,12 @@ void test_fapi2MmioInvalidSizes() TS_FAIL("No error from p9_mmiotest_indivisible_by_section_size !!"); numFails++; } + auto second_ocmb_info = l_ocmb->getAttr(); + if (!second_ocmb_info.useInbandScom) + { + TS_FAIL("p9_mmiotest_indivisible_by_section_size turned off mmio operations"); + l_ocmb->setAttr(first_ocmb_info); + } numTests++; FAPI_INVOKE_HWP(l_errl, p9_mmiotest_invalid_section_size, fapi2_ocmbTarget); @@ -139,7 +158,14 @@ void test_fapi2MmioInvalidSizes() TS_FAIL("No error from p9_mmiotest_invalid_section_size !!"); numFails++; } + auto third_ocmb_info = l_ocmb->getAttr(); + if (!third_ocmb_info.useInbandScom) + { + TS_FAIL("p9_mmiotest_invalid_section_size turned off mmio operations"); + l_ocmb->setAttr(first_ocmb_info); + } } + mutex_unlock(iv_serializeTestMutex); FAPI_INF("test_fapi2MmioInvalidSizes Test Complete. %d/%d fails", numFails, numTests); } @@ -152,7 +178,6 @@ void test_fapi2MmioAccess() int numTests = 0; int numFails = 0; -#ifndef CONFIG_AXONE_BRING_UP errlHndl_t l_errl = nullptr; // Create a vector of TARGETING::Target pointers @@ -161,6 +186,12 @@ void test_fapi2MmioAccess() // Get a list of all of the OCMB chips TARGETING::getAllChips(l_chipList, TARGETING::TYPE_OCMB_CHIP, true); + if (!iv_serializeTestMutex) + { + TS_FAIL("test_fapi2MmioAccess(): unable to get test mutex"); + return; + } + mutex_lock(iv_serializeTestMutex); for (auto & l_ocmb: l_chipList) { Target l_fapi2_target( l_ocmb ); @@ -213,11 +244,55 @@ void test_fapi2MmioAccess() l_errl = nullptr; } } -#endif + mutex_unlock(iv_serializeTestMutex); FAPI_INF("fapi2MmioAccessTest Test Complete. %d/%d fails", numFails, numTests); } +/** + * @brief Constructor + */ +Fapi2MmioAccessTest() : CxxTest::TestSuite() +{ + mss_module_loaded = false; + + // All modules are loaded by runtime, + // so testcase loading of modules is not required +#ifndef __HOSTBOOT_RUNTIME + errlHndl_t err = nullptr; + err = exptest::loadModule(mss_module_loaded, exptest::MSS_LIBRARY_NAME); + if(err) + { + TS_FAIL("Fapi2MmioAccessTest() - Constuctor: failed to load MSS module"); + errlCommit( err, TARG_COMP_ID ); + } +#endif + iv_serializeTestMutex = exptest::getTestMutex(); +}; + +/** + * @brief Deconstructor + */ +~Fapi2MmioAccessTest() +{ + errlHndl_t err = nullptr; + if (mss_module_loaded) + { + err = exptest::unloadModule(exptest::MSS_LIBRARY_NAME); + if(err) + { + TS_FAIL("~Fapi2MmioAccessTest() - Destructor: failed to unload MSS module"); + errlCommit( err, TARG_COMP_ID ); + } + } +} + + +private: + // keep track if this test loaded mss_module + bool mss_module_loaded; + // This is used for tests that need to not run operations at the same time + TARGETING::HB_MUTEX_SERIALIZE_TEST_LOCK_ATTR iv_serializeTestMutex; }; diff --git a/src/usr/fapi2/test/fapi2Test.mk b/src/usr/fapi2/test/fapi2Test.mk index f7dc4d002..074e4e45d 100644 --- a/src/usr/fapi2/test/fapi2Test.mk +++ b/src/usr/fapi2/test/fapi2Test.mk @@ -72,6 +72,8 @@ else ## All hostboot IPL time tests TESTS += ${shell ls ${ROOTPATH}/src/usr/fapi2/test/*Test.H | \ sort | xargs} +EXTRAINCDIR += ${ROOTPATH}/src/usr/expaccess/ + OBJS += p9_i2ctests.o OBJS += p9_mmiotests.o diff --git a/src/usr/fapi2/test/p9_mmiotests.C b/src/usr/fapi2/test/p9_mmiotests.C index 264e88117..6a6d42bbf 100644 --- a/src/usr/fapi2/test/p9_mmiotests.C +++ b/src/usr/fapi2/test/p9_mmiotests.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2018 */ +/* Contributors Listed Below - COPYRIGHT 2018,2019 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -37,6 +37,13 @@ #include +// Write/Read from the inband response address (shouldn't hurt anything) +//Constants from #include +static const uint64_t EXPLR_IB_MMIO_OFFSET = 0x0000000100000000ull; // 4GB +static const uint64_t EXPLR_IB_SRAM_BASE = 0x01000000; // MSCCRNGE 01000000 020FFFFF +static const uint64_t EXPLR_IB_RSP_SRAM_ADDR = EXPLR_IB_SRAM_BASE | 0x03FF00; +static const uint64_t EXPLR_IB_RSP_ADDR = EXPLR_IB_MMIO_OFFSET | EXPLR_IB_RSP_SRAM_ADDR; + fapi2::ReturnCode p9_mmiotest_getmmio_invalid_target( fapi2::Target& i_target) { @@ -48,7 +55,7 @@ fapi2::ReturnCode p9_mmiotest_getmmio_invalid_target( FAPI_INF("Do getMMIO on a proc target for 8 bytes"); FAPI_TRY(fapi2::getMMIO(i_target, - 0x1000, // mmio address relative to target + EXPLR_IB_RSP_ADDR, // mmio address relative to target 8, // mmio transaction size l_mmiodata)); fapi_try_exit: @@ -75,7 +82,7 @@ fapi2::ReturnCode p9_mmiotest_putmmio_invalid_target( FAPI_INF( "Do putMMIO on proc target" ); FAPI_TRY(fapi2::putMMIO(i_target, - 0x1000, + EXPLR_IB_RSP_ADDR, 4, l_mmiodata)); @@ -100,7 +107,7 @@ fapi2::ReturnCode p9_mmiotest_indivisible_by_section_size( FAPI_INF("Do getMMIO on a target for 10 bytes"); FAPI_TRY(fapi2::getMMIO(i_target, - 0x1000, // mmio address relative to target + EXPLR_IB_RSP_ADDR, // mmio address relative to target 8, // mmio transaction size l_mmiodata)); fapi_try_exit: @@ -123,7 +130,7 @@ fapi2::ReturnCode p9_mmiotest_invalid_section_size( FAPI_INF("Do getMMIO on a target for 12 bytes"); FAPI_TRY(fapi2::getMMIO(i_target, - 0x1000, // mmio address relative to target + EXPLR_IB_RSP_ADDR, // mmio address relative to target 12, // mmio transaction size l_mmiodata)); fapi_try_exit: @@ -149,7 +156,7 @@ fapi2::ReturnCode p9_mmiotest_getmmio_pass( FAPI_INF("Do single-read transaction getMMIO on an OCMB target"); FAPI_TRY(fapi2::getMMIO(i_target, - 0x1000, + EXPLR_IB_RSP_ADDR, l_mmiodataSize, l_mmiodata) ); @@ -157,7 +164,7 @@ fapi2::ReturnCode p9_mmiotest_getmmio_pass( l_mmiodata.resize(l_mmiodataSize*2); // do a double mmio transaction FAPI_INF("Do double-read transaction getMMIO on an OCMB target"); FAPI_TRY(fapi2::getMMIO(i_target, - 0x1000, + EXPLR_IB_RSP_ADDR, l_mmiodataSize, l_mmiodata) ); @@ -183,7 +190,7 @@ fapi2::ReturnCode p9_mmiotest_double_read_pass( FAPI_INF("Do first getMMIO on an ocmb target"); FAPI_TRY(fapi2::getMMIO(i_target, - 0x1000, + EXPLR_IB_RSP_ADDR, l_mmioTransactionSize, l_1st_read) ); @@ -195,7 +202,7 @@ fapi2::ReturnCode p9_mmiotest_double_read_pass( FAPI_INF("Do second getMMIO on an ocmb target"); FAPI_TRY(fapi2::getMMIO(i_target, - 0x1000, + EXPLR_IB_RSP_ADDR, l_mmioTransactionSize, l_2nd_read) ); @@ -237,7 +244,7 @@ fapi2::ReturnCode p9_mmiotest_putmmio_pass( FAPI_INF("Do putMMIO on OCMB target"); FAPI_TRY(fapi2::putMMIO(i_target, - 0x1000, + EXPLR_IB_RSP_ADDR, 4, l_mmiodata)); fapi_try_exit: @@ -266,14 +273,14 @@ fapi2::ReturnCode p9_mmiotest_write_read_pass( // Write out a known value (name of this test) FAPI_INF("Calling putMMIO on the target (size: %d)", l_data_size); - FAPI_TRY(fapi2::putMMIO(i_target, 0x1000, + FAPI_TRY(fapi2::putMMIO(i_target, EXPLR_IB_RSP_ADDR, l_mmioTransactionSize, l_mmio_data)); // now read it out and verify it was written correctly FAPI_INF("Now read the just written data"); l_read_mmio_data.resize(l_data_size); FAPI_TRY(fapi2::getMMIO(i_target, - 0x1000, + EXPLR_IB_RSP_ADDR, l_mmioTransactionSize, l_read_mmio_data)); diff --git a/src/usr/mmio/mmio.C b/src/usr/mmio/mmio.C index d464f4e45..4a5d714ab 100644 --- a/src/usr/mmio/mmio.C +++ b/src/usr/mmio/mmio.C @@ -869,6 +869,7 @@ errlHndl_t ocmbMmioPerformOp(DeviceFW::OperationType i_opType, errlHndl_t l_err = nullptr; uint64_t l_offset = va_arg(i_args, uint64_t); uint64_t l_accessLimit = va_arg(i_args, uint64_t); + bool invalidParmError = false; TRACDCOMP(g_trac_mmio, ENTER_MRK"ocmbMmioPerformOp"); TRACDCOMP(g_trac_mmio, INFO_MRK"op=%d, target=0x%.8X", @@ -894,6 +895,7 @@ errlHndl_t ocmbMmioPerformOp(DeviceFW::OperationType i_opType, l_accessLimit); if(l_err) { + invalidParmError = true; break; } @@ -1216,9 +1218,13 @@ errlHndl_t ocmbMmioPerformOp(DeviceFW::OperationType i_opType, if (l_err) { - // Switch over to using I2C to prevent further MMIO access - // to this OCMB (error regs cannot be cleared on Explorer). - disableInbandScomsOcmb(i_ocmbTarget); + // Only disable if HW error, not for user parameter failures + if (!invalidParmError) + { + // Switch over to using I2C to prevent further MMIO access + // to this OCMB (error regs cannot be cleared on Explorer). + disableInbandScomsOcmb(i_ocmbTarget); + } l_err->collectTrace(MMIO_COMP_NAME); } -- cgit v1.2.1