From 3bfa2578d39f21a38a7d206d7b2c004a6e47b4c5 Mon Sep 17 00:00:00 2001 From: Mike Baiocchi Date: Thu, 31 Oct 2013 08:28:19 -0500 Subject: Restart IPL after SBE Update Along with some SBE Update improvements, this commit adds additional code to re-IPL the system after an SBE Update has taken place. NOTE: Full SBE Update code path to be enabled with RTC 89503. Change-Id: I6beaee026d3fc6aaa76bfc7ca387d6765754f0c3 RTC: 47033 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/6986 Tested-by: Jenkins Server Reviewed-by: ADAM R. MUHLE Reviewed-by: Daniel M. Crowell Reviewed-by: A. Patrick Williams III --- src/usr/i2c/eepromdd.C | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'src/usr/i2c') diff --git a/src/usr/i2c/eepromdd.C b/src/usr/i2c/eepromdd.C index 8ea9b94c1..56885d874 100755 --- a/src/usr/i2c/eepromdd.C +++ b/src/usr/i2c/eepromdd.C @@ -41,6 +41,7 @@ #include #include #include +#include #include #include #include "eepromdd.H" @@ -466,6 +467,10 @@ errlHndl_t eepromWrite ( TARGETING::Target * i_target, break; } + // Wait 5ms for EEPROM o write data to its internal memory + nanosleep(0,5 * NS_PER_MSEC); // 5 msec + + // Update how much data was written total_bytes_written += loop_data_length; @@ -484,7 +489,6 @@ errlHndl_t eepromWrite ( TARGETING::Target * i_target, break; } - TRACSCOMP( g_trac_eepromr, "EEPROM WRITE END : Chip: %02d : Offset %.2X : Len %d", i_i2cInfo.chip, i_i2cInfo.offset, io_buflen ); -- cgit v1.2.1