From 759896fd7cfacf2a9ae5c18e3635d70cb3977be1 Mon Sep 17 00:00:00 2001 From: Nick Bofferding Date: Tue, 28 Oct 2014 09:33:06 -0500 Subject: Propagate processor PHB PCIE lane EQ to device tree Change-Id: I562a9f34f9a999d7a89327dc9383c05b6101eb8a RTC: 117343 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/14212 Tested-by: Jenkins Server Reviewed-by: STEPHEN M. CPREK Reviewed-by: A. Patrick Williams III --- src/usr/devtree/bld_devtree.C | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) (limited to 'src/usr/devtree/bld_devtree.C') diff --git a/src/usr/devtree/bld_devtree.C b/src/usr/devtree/bld_devtree.C index 182df741d..d2cba08eb 100644 --- a/src/usr/devtree/bld_devtree.C +++ b/src/usr/devtree/bld_devtree.C @@ -202,10 +202,10 @@ void bld_xscom_node(devTree * i_dt, dtOffset_t & i_parentNode, /*PCIE*/ uint8_t l_phbActive = - i_pProc->getAttr(); - //TARGETING::ATTR_PROC_PCIE_LANE_EQUALIZATION_type l_laneEq = - // l_pProc->getAttr(); - uint32_t l_laneEq[] = {0,0,0,0}; + i_pProc->getAttr(); + TARGETING::ATTR_PROC_PCIE_LANE_EQUALIZATION_type l_laneEq = {{0}}; + assert(i_pProc->tryGetAttr( + l_laneEq)); TRACFCOMP( g_trac_devtree, "Chip %X PHB Active mask %X", i_chipid, l_phbActive); @@ -232,7 +232,9 @@ void bld_xscom_node(devTree * i_dt, dtOffset_t & i_parentNode, i_dt->addPropertyCells32(pcieNode, "reg", pcie_prop, 6); i_dt->addPropertyCell32(pcieNode, "ibm,phb-index", l_phb); i_dt->addProperty(pcieNode, "ibm,use-ab-detect"); - i_dt->addPropertyCell32(pcieNode, "ibm,lane-eq", l_laneEq[l_phb]); + i_dt->addPropertyCells32(pcieNode, "ibm,lane-eq", + reinterpret_cast(l_laneEq[l_phb]), + (sizeof(l_laneEq[l_phb])/sizeof(uint32_t))); } } -- cgit v1.2.3