From 49d81ec6a770e74cd2a41acb15bcc4efc3434261 Mon Sep 17 00:00:00 2001 From: Luis Fernandez Date: Fri, 26 Apr 2019 13:23:19 -0500 Subject: General Improvement: Get HB standalone + op-build working with GCC8 Fix issue where when compiling with GCC 8, illegal instruction of value 0x0 is placed instead of the expected "blr" instrusction. Change-Id: I2ff28d5549689d541ea24d102230cbfc22cbbbff RTC: 163075 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/76650 Tested-by: Jenkins Server Reviewed-by: Nicholas E. Bofferding Tested-by: Jenkins OP Build CI Tested-by: FSP CI Jenkins Tested-by: Jenkins OP HW Reviewed-by: Zachary Clark Reviewed-by: Daniel M. Crowell --- src/include/arch/ppc.H | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) (limited to 'src/include') diff --git a/src/include/arch/ppc.H b/src/include/arch/ppc.H index 4d1762db7..81c49eb4f 100644 --- a/src/include/arch/ppc.H +++ b/src/include/arch/ppc.H @@ -457,10 +457,12 @@ inline void MAGIC_INSTRUCTION(int _n) { register int n = _n; isync(); - asm volatile("rlwimi %0,%0,0,%1,%2" \ - :: "i" (((n) >> 8) & 0x1f), \ - "i" (((n) >> 4) & 0xf), \ - "i" ((((n) >> 0) & 0xf) | 16)); \ + long register r3 asm("r3"); + asm volatile("rlwimi %1,%1,0,%2,%3" \ + : "=r"(r3) : "i" (((n) >> 8) & 0x1f), \ + "i" (((n) >> 4) & 0xf), \ + "i" ((((n) >> 0) & 0xf) | 16), \ + "r"(r3)); \ } // Simics components that we can raise log levels for -- cgit v1.2.3