From cec9b06e89d027d084bac7876604efbcb7d297eb Mon Sep 17 00:00:00 2001 From: crgeddes Date: Thu, 8 Dec 2016 12:45:36 -0600 Subject: Add intrastructure for sending psuQuiesce cmd to SBE The SBE provides an interfaces for the HOST to issue a psu cmd that will quiesce the SBE. This commit adds the ability for HB code to call one function and notify the SBE to quiesce Change-Id: Icb153875b797f107891b05fd26dccbc413fd8f93 RTC:158899 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/33610 Tested-by: Jenkins Server Tested-by: Jenkins OP Build CI Tested-by: FSP CI Jenkins Reviewed-by: Martin Gloff Reviewed-by: William G. Hoffa Reviewed-by: Daniel M. Crowell --- src/include/usr/sbeio/sbe_psudd.H | 33 +++++++++++++++++++++++++++++++++ src/include/usr/sbeio/sbeioif.H | 8 ++++++++ 2 files changed, 41 insertions(+) (limited to 'src/include/usr/sbeio') diff --git a/src/include/usr/sbeio/sbe_psudd.H b/src/include/usr/sbeio/sbe_psudd.H index eb0869396..f6e73cf3a 100644 --- a/src/include/usr/sbeio/sbe_psudd.H +++ b/src/include/usr/sbeio/sbe_psudd.H @@ -99,6 +99,7 @@ class SbePsu //BYTE 7 options enum psuGenericMessageCommands { + SBE_PSU_GENERIC_MSG_QUIESCE = 0x05, SBE_CMD_CONTROL_SYSTEM_CONFIG = 0x06 }; @@ -164,6 +165,25 @@ class SbePsu SBE_SYSTEM_CONFIG_RSP_USED_REGS = 0x01, }; + /** + * @brief non reserved word enums + * + * Shows which of the request and response msg registers are + * not reserved. Reserved registers do not need to be written + * or read. + * + * This is a 4 bit field: + * 0x1 - Reg 0 is non-reserved (read or write this reg) + * 0x2 - Reg 1 is non-reserved (read or write this reg) + * 0x4 - Reg 2 is non-reserved (read or write this reg) + * 0x8 - Reg 3 is non-reserved (read or write this reg) + */ + enum psuQuiesceNonReservedMsgs + { + SBE_QUIESCE_REQ_USED_REGS = 0x01, + SBE_QUIESCE_RSP_USED_REGS = 0x01, + }; + /** * @brief Struct for PSU command message format * @@ -252,6 +272,19 @@ class SbePsu uint64_t cd3_PutRing_ReservedMbxReg3; //Mbx Reg 3 } PACKED; + struct //psuQuiesce + { + uint16_t cd4_PsuQuiesce_Reserved; + uint16_t cd4_PsuQuiesce_ControlFlags; + uint16_t cd4_PsuQuiesce_SeqID; + uint8_t cd4_PsuQuiesce_CommandClass; + uint8_t cd4_PsuQuiesce_Command; + uint64_t cd4_PsuQuiesce_MbxReg1reserved; + uint64_t cd4_PsuQuiesce_MbxReg2reserved; + uint64_t cd4_PsuQuiesce_MbxReg3reserved; + } PACKED; + + psuCommand(uint16_t i_controlFlags, //Mbx Reg 0 input uint8_t i_commandClass, //Mbx Reg 0 input uint8_t i_command) : //Mbx Reg 0 input diff --git a/src/include/usr/sbeio/sbeioif.H b/src/include/usr/sbeio/sbeioif.H index d55e28885..9f3bf9c3d 100644 --- a/src/include/usr/sbeio/sbeioif.H +++ b/src/include/usr/sbeio/sbeioif.H @@ -61,6 +61,14 @@ namespace SBEIO */ errlHndl_t sendSystemConfig(const uint64_t i_systemConfig ); + /** + * @brief Sends a PSU chipOp to quiesce the SBE + * + * @return errlHndl_t Error log handle on failure. + * + */ + errlHndl_t sendPsuQueisceSbeCmd (); + /** * @brief Get SCOM via SBE FIFO * -- cgit v1.2.3