From 41daed137d2f31ba125a1ada241755e42f36868c Mon Sep 17 00:00:00 2001 From: Dan Crowell Date: Thu, 31 May 2018 17:03:24 -0500 Subject: Write Hostboot HRMOR into core scratch reg 1 Hostboot code will write the current HRMOR value into core scratch reg 1 (scom=xx010A87, spr=0x08) at initial boot. This data is ORed into the memory size data that was already present. The bootloader code will do the same. Also updated the debug tools to key off of this data if it is available to avoid any HRMOR hardcoding. The purpose of this change is to provide a method for the FSP code to handle various memory remapping scenarios that are currently in plan without needing any explicit communication from Hostboot. Change-Id: Ia3c81980ebd780ae182956cddae785dd408fbed9 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59699 Reviewed-by: Prachi Gupta Tested-by: Jenkins Server Tested-by: FSP CI Jenkins Tested-by: Jenkins OP Build CI Tested-by: Jenkins OP HW Reviewed-by: William G. Hoffa --- src/bootloader/bootloader.C | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-) (limited to 'src/bootloader') diff --git a/src/bootloader/bootloader.C b/src/bootloader/bootloader.C index eed79770d..b9b14c8b2 100644 --- a/src/bootloader/bootloader.C +++ b/src/bootloader/bootloader.C @@ -49,6 +49,7 @@ #include #include +#include extern char bootloader_end_address; @@ -405,7 +406,19 @@ namespace Bootloader{ uint64_t hostboot_string = 0x626F6F746C6F6164; writeScratchReg(MMIO_SCRATCH_HOSTBOOT_ACTIVE, hostboot_string); - // @TODO RTC:138268 Support multiple sides of PNOR in bootloader + //Set core scratch 1 to the eventual HRMOR of Hostboot + // and 4MB of space. The HRMOR spoofing is required in + // order for FSP code to be able to find the TI area without + // having to know exactly where we are in the boot flow. + // See _updates_and_setup in bl_start.S for where we put + // our TI area below our actual HRMOR. The 4MB size will + // allow a dump to grab all of our working data along with + // our actual image. + KernelMemState::MemState_t l_memstate; + l_memstate.location = KernelMemState::MEM_CONTAINED_L3; + l_memstate.hrmor = getHRMOR() - HBB_RUNNING_ADDR; + l_memstate.size = KernelMemState::HALF_CACHE; + writeScratchReg(MMIO_SCRATCH_MEMORY_STATE, l_memstate.fullData); // Copy SBE BL shared data into BL HB shared data const auto l_blConfigData = reinterpret_cast( -- cgit v1.2.3