From 7c4068b510e172eb973b8e460ee432e7e8bc8275 Mon Sep 17 00:00:00 2001 From: Mark Pizzutillo Date: Thu, 21 Feb 2019 11:08:00 -0500 Subject: Added code for exp_getecid and unit tests Change-Id: Id0a8fcf7c28d67c1bcb4ba98ff7af6d94dfa6364 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/74784 Tested-by: FSP CI Jenkins Tested-by: Jenkins Server Tested-by: HWSV CI Reviewed-by: STEPHEN GLANCY Tested-by: Hostboot CI Reviewed-by: Louis Stermole Reviewed-by: Jennifer A. Stofer Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/75353 Tested-by: Jenkins OP Build CI Tested-by: Jenkins OP HW Reviewed-by: Christian R. Geddes --- .../common/include/explorer_scom_addresses.H | 57 +++++++- .../common/include/explorer_scom_addresses_fld.H | 4 +- .../explorer/procedures/hwp/memory/exp_getecid.C | 78 ++++++++++ .../explorer/procedures/hwp/memory/exp_getecid.H | 32 +++++ .../explorer/procedures/hwp/memory/exp_omi_setup.C | 4 +- .../memory/lib/exp_attribute_accessors_manual.H | 18 ++- .../procedures/hwp/memory/lib/exp_getecid_utils.C | 158 +++++++++++++++++++++ .../procedures/hwp/memory/lib/exp_getecid_utils.H | 61 ++++++++ .../procedures/hwp/memory/lib/omi/exp_omi_utils.H | 41 ++---- .../procedures/hwp/memory/lib/shared/exp_consts.H | 15 +- .../xml/attribute_info/exp_attributes.xml | 15 +- .../xml/attribute_info/pervasive_attributes.xml | 12 +- src/usr/isteps/istep12/makefile | 2 + 13 files changed, 449 insertions(+), 48 deletions(-) diff --git a/src/import/chips/ocmb/explorer/common/include/explorer_scom_addresses.H b/src/import/chips/ocmb/explorer/common/include/explorer_scom_addresses.H index 24f03a25f..010b81049 100644 --- a/src/import/chips/ocmb/explorer/common/include/explorer_scom_addresses.H +++ b/src/import/chips/ocmb/explorer/common/include/explorer_scom_addresses.H @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2018 */ +/* Contributors Listed Below - COPYRIGHT 2018,2019 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -1504,4 +1504,59 @@ static const uint64_t EXPLR_WDF_WMSK static const uint64_t EXPLR_WDF_WSPAR = 0x08012008ull; + +static const uint32_t EXPLR_EFUSE_IMAGE_OUT_0 = 0x20B080ull; + + +static const uint32_t EXPLR_EFUSE_IMAGE_OUT_1 = 0x20B084ull; + + +static const uint32_t EXPLR_EFUSE_IMAGE_OUT_2 = 0x20B088ull; + + +static const uint32_t EXPLR_EFUSE_IMAGE_OUT_3 = 0x20B08Cull; + + +static const uint32_t EXPLR_EFUSE_PE_DATA_0 = 0x20B090ull; + + +static const uint32_t EXPLR_EFUSE_PE_DATA_1 = 0x20B094ull; + + +static const uint32_t EXPLR_EFUSE_PE_DATA_2 = 0x20B098ull; + + +static const uint32_t EXPLR_EFUSE_PE_DATA_3 = 0x20B09Cull; + + +static const uint32_t EXPLR_EFUSE_PE_DATA_4 = 0x20B0A0ull; + + +static const uint32_t EXPLR_EFUSE_PE_DATA_5 = 0x20B0A4ull; + + +static const uint32_t EXPLR_EFUSE_PE_DATA_6 = 0x20B0A8ull; + + +static const uint32_t EXPLR_EFUSE_PE_DATA_8 = 0x20B0ACull; + + +static const uint32_t EXPLR_EFUSE_PE_DATA_9 = 0x20B0B0ull; + + +static const uint32_t EXPLR_EFUSE_PE_DATA_10 = 0x20B0B4ull; + + +static const uint32_t EXPLR_EFUSE_PE_DATA_11 = 0x20B0B8ull; + + +static const uint32_t EXPLR_EFUSE_PE_DATA_12 = 0x20B0BCull; + + +static const uint32_t EXPLR_EFUSE_PE_DATA_13 = 0x20B0C0ull; + + +static const uint32_t EXPLR_EFUSE_PE_DATA_14 = 0x20B0C4ull; + + #endif diff --git a/src/import/chips/ocmb/explorer/common/include/explorer_scom_addresses_fld.H b/src/import/chips/ocmb/explorer/common/include/explorer_scom_addresses_fld.H index 4a55c4d71..5b93db5fb 100644 --- a/src/import/chips/ocmb/explorer/common/include/explorer_scom_addresses_fld.H +++ b/src/import/chips/ocmb/explorer/common/include/explorer_scom_addresses_fld.H @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2018 */ +/* Contributors Listed Below - COPYRIGHT 2018,2019 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -6950,4 +6950,6 @@ static const uint8_t EXPLR_WDF_WSPAR_CFG_STEERING_R3_LEFT_LEN = static const uint8_t EXPLR_WDF_WSPAR_CFG_STEERING_R3_RIGHT = 35 ; static const uint8_t EXPLR_WDF_WSPAR_CFG_STEERING_R3_RIGHT_LEN = 5 ; +static const uint8_t EXPLR_EFUSE_IMAGE_OUT_0_ENTERPRISE_MODE_DIS = 10 ; + #endif diff --git a/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_getecid.C b/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_getecid.C index 7ab4e58ba..ad20d2e0c 100644 --- a/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_getecid.C +++ b/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_getecid.C @@ -22,3 +22,81 @@ /* permissions and limitations under the License. */ /* */ /* IBM_PROLOG_END_TAG */ + +/// @file exp_getecid.C +/// @brief Gets ECID from explorer fuse registers +/// +/// *HWP HWP Owner: Mark Pizzutillo +/// *HWP HWP Backup: Andre Marin +/// *HWP Team: Memory +/// *HWP Level: 2 +/// *HWP Consumed by: HB + +#include +#include +#include +#include +#include +#include +#include + +extern "C" +{ + /// + /// @brief getecid procedure for explorer chip + /// @param[in] i_target Explorer OCMB chip + /// @return fapi2:ReturnCode FAPI2_RC_SUCCESS if success, else error code. + /// @note Sets ocmb_ecid, enterprise, half-dimm mode attributes. exp_omi_setup configures the chip with these attributes + /// + fapi2::ReturnCode exp_getecid(const fapi2::Target& i_target) + { + // Using FUSE enterprise_dis bit, determine whether enterprise is disabled, otherwise + // we will enable it. Override to disable it is done in omi_setup. Half_dimm_mode we + // will also disable by default, as it is not a feature of P systems + { + uint8_t l_enterprise_mode = fapi2::ENUM_ATTR_MSS_OCMB_ENTERPRISE_MODE_NON_ENTERPRISE; // 0 + uint8_t l_half_dimm_mode = fapi2::ENUM_ATTR_MSS_OCMB_HALF_DIMM_MODE_FULL_DIMM; // 0 + + FAPI_TRY(mss::exp::ecid::get_enterprise_and_half_dimm_from_fuse( + i_target, l_enterprise_mode, l_half_dimm_mode), + "exp_getecid: getting enterprise and half_dimm from fuse failed on %s", + mss::c_str(i_target)); + + // Set attributes + FAPI_TRY(mss::attr::set_ocmb_enterprise_mode(i_target, l_enterprise_mode), + "exp_getecid: Could not set ATTR_MSS_OCMB_ENTERPRISE_MODE"); + + FAPI_TRY(mss::attr::set_ocmb_half_dimm_mode(i_target, l_half_dimm_mode), + "exp_getecid: Could not set ATTR_MSS_OCMB_HALF_DIMM_MODE"); + } + + // + // Populate OCMB_ECID attribute with: + // EFUSE_IMAGE_OUT[261:64] – Serial number (Wafer ID, number and XY coordinates) + // EFUSE_IMAGE_OUT[263:262] – PSRO + // Each register in the FUSE is 32 bits in size, but only the lower 16 bits are used, Here, we piece together + // each set of lower 16 bits and insert these into the ECID register + // + // TK - Once ATTR_ECID is made large enough, we probably will not need ATTR_OCMB_ECID + // We can remove the call to it below and remove the attribute itself. + // + { + // ECID obtained from register contents + uint16_t l_ecid[mss::exp::ecid_consts::FUSE_ARRAY_SIZE] = {0}; + + FAPI_TRY(mss::exp::ecid::read_from_fuse(i_target, l_ecid), + "exp_getecid: Could not read ecid from FUSE on %s", mss::c_str(i_target)); + + // TK - Remove once ATTR_ECID is made large enough + FAPI_TRY(mss::attr::set_ocmb_ecid(i_target, l_ecid), + "exp_getecid: Could not set ATTR_MSS_OCMB_ECID on %s", mss::c_str(i_target)); + + FAPI_TRY(mss::exp::ecid::set_attr(i_target, l_ecid), + "exp_getecid: Could not set ATTR_ECID on %s", mss::c_str(i_target)); + } + + fapi_try_exit: + return fapi2::current_err; + } + +} // extern "C" diff --git a/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_getecid.H b/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_getecid.H index d749971b0..2ab79973f 100644 --- a/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_getecid.H +++ b/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_getecid.H @@ -22,3 +22,35 @@ /* permissions and limitations under the License. */ /* */ /* IBM_PROLOG_END_TAG */ + +/// +/// @file exp_getecid.H +/// @brief Contains the explorer ECID setup +/// +// *HWP HWP Owner: Mark Pizzutillo +// *HWP HWP Backup: Stephen Glancy +// *HWP Team: Memory +// *HWP Level: 2 +// *HWP Consumed by: Memory + +#ifndef __EXP_GETECID_H_ +#define __EXP_GETECID_H_ + +#include + +typedef fapi2::ReturnCode (*exp_getecid_FP_t) (const fapi2::Target&); + +extern "C" +{ + +/// +/// @brief getecid procedure for explorer chip +/// @param[in] i_target Explorer OCMB chip +/// @return fapi2:ReturnCode FAPI2_RC_SUCCESS if success, else error code. +/// @note Sets ocmb_ecid, enterprise, half-dimm mode attributes. exp_omi_setup configures the chip with these attributes +/// + fapi2::ReturnCode exp_getecid(const fapi2::Target& i_target); + +} // extern "C" + +#endif diff --git a/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_omi_setup.C b/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_omi_setup.C index 2b0413606..e17271c93 100644 --- a/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_omi_setup.C +++ b/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_omi_setup.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2018 */ +/* Contributors Listed Below - COPYRIGHT 2018,2019 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -53,7 +53,7 @@ extern "C" bool l_is_enterprise = false; bool l_is_half_dimm = false; - // Gets the configuration information + // Gets the configuration information from attributes FAPI_TRY(mss::enterprise_mode(i_target, l_is_enterprise)); FAPI_TRY(mss::half_dimm_mode(i_target, l_is_half_dimm)); diff --git a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/exp_attribute_accessors_manual.H b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/exp_attribute_accessors_manual.H index ea713830b..04434c84c 100644 --- a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/exp_attribute_accessors_manual.H +++ b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/exp_attribute_accessors_manual.H @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2018 */ +/* Contributors Listed Below - COPYRIGHT 2018,2019 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -39,6 +39,8 @@ #define EXP_ATTR_ACCESS_MANUAL_H_ #include +#include + #include #include @@ -51,7 +53,8 @@ namespace mss /// @param[out] o_is_enterprise_mode true if the part is in enterprise mode /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK /// -inline fapi2::ReturnCode enterprise_mode( const fapi2::Target& i_target, +inline fapi2::ReturnCode enterprise_mode( const fapi2::Target& + i_target, bool& o_is_enterprise_mode ) { // Constexprs for beautification @@ -63,8 +66,8 @@ inline fapi2::ReturnCode enterprise_mode( const fapi2::Target& i_target, +inline fapi2::ReturnCode half_dimm_mode( const fapi2::Target& + i_target, bool& o_is_half_dimm_mode ) { // Variables @@ -109,7 +113,7 @@ inline fapi2::ReturnCode half_dimm_mode( const fapi2::Target +/// *HWP HWP Backup: Andre Marin +/// *HWP Team: Memory +/// *HWP Level: 2 +/// *HWP Consumed by: HB + +#include +#include +#include +#include +#include +#include +#include + + +namespace mss +{ +namespace exp +{ +namespace ecid +{ + +/// +/// @brief Determines enterprise and half dimm states from explorer FUSE +/// @param[in] i_target the controller +/// @param[out] o_enterprise_mode state +/// @param[out] o_half_dimm_mode state +/// @return FAPI2_RC_SUCCESS iff ok +/// +fapi2::ReturnCode get_enterprise_and_half_dimm_from_fuse( + const fapi2::Target& i_target, + uint8_t& o_enterprise_mode, + uint8_t& o_half_dimm_mode) +{ + fapi2::buffer l_reg_resp_buffer; + FAPI_TRY(fapi2::getScom( i_target, static_cast(EXPLR_EFUSE_IMAGE_OUT_0), l_reg_resp_buffer ), + "exp_getecid: could not read explorer fuse register 0x%08x", EXPLR_EFUSE_IMAGE_OUT_0); + + // Default to disabled + o_enterprise_mode = fapi2::ENUM_ATTR_MSS_OCMB_ENTERPRISE_MODE_NON_ENTERPRISE; // 0 + + // If we support enterprise mode, enable it until otherwise overridden in OMI_SETUP + if(!l_reg_resp_buffer.getBit < EXPLR_EFUSE_IMAGE_OUT_0_ENTERPRISE_MODE_DIS + + mss::exp::ecid_consts::REG_BIT_OFFSET > ()) + { + o_enterprise_mode = fapi2::ENUM_ATTR_MSS_OCMB_ENTERPRISE_MODE_ENTERPRISE; // 1, enabled + } + + // half_dimm_mode will remain disabled for P systems + o_half_dimm_mode = fapi2::ENUM_ATTR_MSS_OCMB_HALF_DIMM_MODE_FULL_DIMM; // 0, disabled + +fapi_try_exit: + return fapi2::current_err; +} + +/// +/// @brief Reads ECID into output array from fuse +/// @param[in] i_target the controller +/// @param[out] o_array ECID contents +/// @return FAPI2_RC_SUCCESS iff ok +/// +fapi2::ReturnCode read_from_fuse( + const fapi2::Target& i_target, + uint16_t (&o_ecid_array)[mss::exp::ecid_consts::FUSE_ARRAY_SIZE]) +{ + + // FUSE registers mapping to the above bit-structure + static constexpr uint64_t l_ecid_regs[mss::exp::ecid_consts::FUSE_ARRAY_SIZE] = + { + EXPLR_EFUSE_PE_DATA_0, + EXPLR_EFUSE_PE_DATA_1, + EXPLR_EFUSE_PE_DATA_2, + EXPLR_EFUSE_PE_DATA_3, + EXPLR_EFUSE_PE_DATA_4, + EXPLR_EFUSE_PE_DATA_5, + EXPLR_EFUSE_PE_DATA_6, // PE_DATA_7 does not exist + EXPLR_EFUSE_PE_DATA_8, + EXPLR_EFUSE_PE_DATA_9, + EXPLR_EFUSE_PE_DATA_10, + EXPLR_EFUSE_PE_DATA_11, + EXPLR_EFUSE_PE_DATA_12, + EXPLR_EFUSE_PE_DATA_13, + EXPLR_EFUSE_PE_DATA_14 + }; + + fapi2::buffer l_efuse_contents; + static constexpr uint32_t START_BIT = 48; // Last 16 bits + + for (uint16_t l_pe_reg = 0; l_pe_reg < mss::exp::ecid_consts::FUSE_ARRAY_SIZE; ++l_pe_reg) + { + l_efuse_contents.flush<0>(); + + // Assuming this will fall back to I2C. + FAPI_TRY(fapi2::getScom( i_target, l_ecid_regs[l_pe_reg], l_efuse_contents ), + "exp_getecid: could not read explorer fuse register 0x%08x", l_ecid_regs[l_pe_reg]); + + // Each EFUSE register in question looks like this according to the spec: + // + // BIT FUNCTION + // 31:16 Unused + // 15:0 EFUSE_IMAGE_OUT [HIGH:LOW] + // + // So, we are expecting the data in question to be in the right-most 16 bits. + l_efuse_contents.extract(o_ecid_array[l_pe_reg]); + } + +fapi_try_exit: + return fapi2::current_err; +} + +/// +/// @brief Stores ECID in ATTR_ECID +/// @param[in] i_target the controller +/// @param[in] i_ecid 16-bit array of ECID contents +/// @return FAPI2_RC_SUCCESS iff ok +/// +fapi2::ReturnCode set_attr( + const fapi2::Target& i_target, + const uint16_t i_ecid[mss::exp::ecid_consts::FUSE_ARRAY_SIZE]) +{ + + // + // TK - ATTR_ECID is only two 64-bit integers, but our OCMB ECID is larger. + // Per Dan Crowell, there are plans in the future to make ATTR_ECID larger + // This will need to be updated once that is changed. Currently, this is + // only storing the first 128 bits of the ECID. + // + // TK - Once the above is implemented, we no longer need ATTR_OCMB_ECID (see exp_getecid.C) + // + + // ATTR_ECID is an array of 2 64-bit integers + uint64_t l_attr_ecid[mss::exp::ecid_consts::ATTR_ECID_SIZE] = {0}; + + fapi2::buffer l_constructed_ecid; + + // Build 64 bit ECID from right to left (from lowest to highest) + // Places l_ecid[0] in 48:64, l_ecid[1] in 32:48, etc. + mss::right_aligned_insert(l_constructed_ecid, i_ecid[3], i_ecid[2], i_ecid[1], i_ecid[0]); + l_attr_ecid[0] = l_constructed_ecid; + l_constructed_ecid.flush<0>(); + + // Places l_ecid[4] in 48:64, l_ecid[5] in 32:48, etc. + mss::right_aligned_insert(l_constructed_ecid, i_ecid[7], i_ecid[6], i_ecid[5], i_ecid[4]); + l_attr_ecid[1] = l_constructed_ecid; + + FAPI_TRY(FAPI_ATTR_SET(fapi2::ATTR_ECID, i_target, l_attr_ecid), + "exp_getecid: Could not set ATTR_ECID on %s", mss::c_str(i_target) ); + +fapi_try_exit: + return fapi2::current_err; +} +} // ecid +} // exp +} // mss diff --git a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/exp_getecid_utils.H b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/exp_getecid_utils.H index 0b4e34293..cb8600c04 100644 --- a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/exp_getecid_utils.H +++ b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/exp_getecid_utils.H @@ -22,3 +22,64 @@ /* permissions and limitations under the License. */ /* */ /* IBM_PROLOG_END_TAG */ + +/// +/// @file exp_getecid_utils.H +/// @brief Utils to set ECID attributes according to FUSE registers +/// +// *HWP HWP Owner: Mark Pizzutillo +// *HWP HWP Backup: Andre Marin +// *HWP Team: Memory +// *HWP Level: 2 +// *HWP Consumed by: FSP:HB + +#ifndef __MSS_EXP_GETECID_UTILS__ +#define __MSS_EXP_GETECID_UTILS__ + +#include +#include + +namespace mss +{ +namespace exp +{ +namespace ecid +{ + +/// +/// @brief Determines enterprise and half dimm states from explorer FUSE +/// @param[in] i_target the controller +/// @param[out] o_enterprise_mode state +/// @param[out] o_half_dimm_mode state +/// @return FAPI2_RC_SUCCESS iff ok +/// +fapi2::ReturnCode get_enterprise_and_half_dimm_from_fuse( + const fapi2::Target& i_target, + uint8_t& o_enterprise_mode, + uint8_t& o_half_dimm_mode); + +/// +/// @brief Reads ECID into output array from fuse +/// @param[in] i_target the controller +/// @param[out] o_array ECID contents +/// @return FAPI2_RC_SUCCESS iff ok +/// +fapi2::ReturnCode read_from_fuse( + const fapi2::Target& i_target, + uint16_t (&o_ecid_array)[mss::exp::ecid_consts::FUSE_ARRAY_SIZE]); + +/// +/// @brief Stores ECID in ATTR_ECID +/// @param[in] i_target the controller +/// @param[in] i_ecid 16-bit array of ECID contents +/// @return FAPI2_RC_SUCCESS iff ok +/// +fapi2::ReturnCode set_attr( + const fapi2::Target& i_target, + const uint16_t i_ecid[mss::exp::ecid_consts::FUSE_ARRAY_SIZE]); + +} +}// exp +}// mss + +#endif diff --git a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/omi/exp_omi_utils.H b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/omi/exp_omi_utils.H index 318de6bf2..1faf02014 100644 --- a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/omi/exp_omi_utils.H +++ b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/omi/exp_omi_utils.H @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2018 */ +/* Contributors Listed Below - COPYRIGHT 2018,2019 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -36,6 +36,8 @@ #define EXP_OMI_UTILS_H_ #include +#include +#include #include namespace mss @@ -45,29 +47,6 @@ namespace exp namespace omi { -/// -/// @brief Constants used for the OMI register fields -/// -// TODO:RTC196850 Update Explorer code to use actual register addresses/names -enum fields -{ - // Bit we set to put ourselves into enterprise mode - ENTERPRISE_SET_BIT = 0, - HALF_DIMM_MODE = 1, - // How the HW is actually configured in enterprise mode - ENTERPRISE_BIT_CONFIG = 2, -}; - -/// -/// @brief Constants used for the OMI registers -/// -// TODO:RTC196850 Update Explorer code to use actual register addresses/names -enum registers -{ - // Bit we set to put ourselves into enterprise mode - MENTERP = 0x080108e4, -}; - /////////////////////////////////////////////////////////////////////////////////// /// Bit Field Operations /////////////////////////////////////////////////////////////////////////////////// @@ -79,7 +58,7 @@ enum registers /// inline bool get_enterprise_set_bit( const fapi2::buffer& i_data ) { - return i_data.getBit(); + return i_data.getBit(); } /// @@ -89,7 +68,7 @@ inline bool get_enterprise_set_bit( const fapi2::buffer& i_data ) /// inline void set_enterprise_set_bit( fapi2::buffer& io_data, const bool i_is_enterprise ) { - io_data.writeBit(i_is_enterprise); + io_data.writeBit(i_is_enterprise); } /// @@ -99,7 +78,7 @@ inline void set_enterprise_set_bit( fapi2::buffer& io_data, const bool /// inline bool get_half_dimm_mode( const fapi2::buffer& i_data ) { - return i_data.getBit(); + return i_data.getBit(); } /// @@ -109,7 +88,7 @@ inline bool get_half_dimm_mode( const fapi2::buffer& i_data ) /// inline void set_half_dimm_mode( fapi2::buffer& io_data, const bool i_is_half_dimm_mode ) { - io_data.writeBit(i_is_half_dimm_mode); + io_data.writeBit(i_is_half_dimm_mode); } // Note: ENTERPRISE_BIT_CONFIG is a Read only bit, so no setting it @@ -121,7 +100,7 @@ inline void set_half_dimm_mode( fapi2::buffer& io_data, const bool i_i /// inline bool get_enterprise_config( const fapi2::buffer& i_data ) { - return i_data.getBit(); + return i_data.getBit(); } /// @@ -163,7 +142,7 @@ fapi_try_exit: inline fapi2::ReturnCode read_enterprise_config( const fapi2::Target& i_target, fapi2::buffer& o_data ) { - return fapi2::getScom(i_target, registers::MENTERP, o_data); + return fapi2::getScom(i_target, EXPLR_MMIO_MENTERP, o_data); } /// @@ -175,7 +154,7 @@ inline fapi2::ReturnCode read_enterprise_config( const fapi2::Target& i_target, const fapi2::buffer& i_data ) { - return fapi2::putScom(i_target, registers::MENTERP, i_data); + return fapi2::putScom(i_target, EXPLR_MMIO_MENTERP, i_data); } namespace train diff --git a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/shared/exp_consts.H b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/shared/exp_consts.H index 0855fc102..3e514ff99 100644 --- a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/shared/exp_consts.H +++ b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/shared/exp_consts.H @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2018 */ +/* Contributors Listed Below - COPYRIGHT 2018,2019 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -104,6 +104,19 @@ enum ffdc_codes SET_SPD_CL_SUPPORTED = 0x1051, }; +/// +/// @brief constants for getecid procedure +/// +enum ecid_consts +{ + FUSE_ARRAY_SIZE = 14, + DATA_IN_SIZE = 16, + // TK - Will need to be changed once ATTR_ECID is made larger + ATTR_ECID_SIZE = 2, + // 32 bit registers with getScom/putScom use the right-most 32 bits + REG_BIT_OFFSET = 32, +}; + namespace i2c { diff --git a/src/import/chips/ocmb/explorer/procedures/xml/attribute_info/exp_attributes.xml b/src/import/chips/ocmb/explorer/procedures/xml/attribute_info/exp_attributes.xml index bbadf19b1..e19cfe5be 100644 --- a/src/import/chips/ocmb/explorer/procedures/xml/attribute_info/exp_attributes.xml +++ b/src/import/chips/ocmb/explorer/procedures/xml/attribute_info/exp_attributes.xml @@ -5,7 +5,7 @@ - + @@ -294,4 +294,17 @@ + + ATTR_MSS_OCMB_ECID + TARGET_TYPE_OCMB_CHIP + + ECID of the chip as determined by the IPL getecid procedure. + + + uint16 + 14 + + ocmb_ecid + + diff --git a/src/import/chips/p9/procedures/xml/attribute_info/pervasive_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/pervasive_attributes.xml index 969e9bee0..92286ce9a 100755 --- a/src/import/chips/p9/procedures/xml/attribute_info/pervasive_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/pervasive_attributes.xml @@ -5,7 +5,7 @@ - + @@ -311,9 +311,13 @@ ATTR_ECID - TARGET_TYPE_PROC_CHIP,TARGET_TYPE_MEMBUF_CHIP - Bits 0 to 63 of the ECID in array entry 0 and bits 64 to 127 in ECID array entry 1 - Populated by HWP called during IPL. + TARGET_TYPE_PROC_CHIP, TARGET_TYPE_MEMBUF_CHIP, TARGET_TYPE_OCMB_CHIP + Populated by HWP called during IPL. + PROC, MEMBUF: Bits 0 to 63 of the ECID in array entry 0 and bits 64 to 127 in ECID array entry 1 + OCMB: Explorer: Data Inserted HIGH:LOW, ex. ATTR_ECID[0] = [PE_DATA_3:PE_DATA_2:PE_DATA_1:PE_DATA_0] + OCMB: Gemini: 64-bit ECID inserted in ATTR_ECID[0] + TK/FIXME/TODO: This needs to be made larger to support the entire Explorer ECID. + uint64 diff --git a/src/usr/isteps/istep12/makefile b/src/usr/isteps/istep12/makefile index 9cfbde1fa..3047e041c 100644 --- a/src/usr/isteps/istep12/makefile +++ b/src/usr/isteps/istep12/makefile @@ -32,6 +32,7 @@ P9_INITFILE_PATH = $(P9_PROCEDURES_PATH)/hwp/initfiles P9A_MSS_HWP_PATH = ${ROOTPATH}/src/import/chips/p9a/procedures/hwp/memory/ EXPLORER_HWP_PATH = ${ROOTPATH}/src/import/chips/ocmb/explorer/procedures/hwp/memory/ +EXPLORER_INC_PATH = ${ROOTPATH}/src/import/chips/ocmb/explorer/common/include/ EXPLORER_OMI_HWP_PATH = ${EXPLORER_HWP_PATH}/lib/omi CENT_PROC_PATH = ${ROOTPATH}/src/import/chips/centaur/procedures @@ -60,6 +61,7 @@ EXTRAINCDIR += $(CENT_INITFILE_PATH) EXTRAINCDIR += $(CENT_IO_HWP_PATH) EXTRAINCDIR += ${P9A_MSS_HWP_PATH} EXTRAINCDIR += ${EXPLORER_HWP_PATH} +EXTRAINCDIR += ${EXPLORER_INC_PATH} VPATH += $(P9_NEST_HWP_PATH) VPATH += $(P9_PERV_HWP_PATH) -- cgit v1.2.1