From 2fc4ac005e5f231de8ef685810487b3273cba44d Mon Sep 17 00:00:00 2001 From: Sakethan R Kotta Date: Thu, 31 Aug 2017 09:49:52 -0500 Subject: HWPs for istep12 Change-Id: Ic51e6e69b5f900d4062ca8d4b5034ffab7e0d395 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/45486 Tested-by: Jenkins Server Reviewed-by: Prachi Gupta Tested-by: Jenkins OP Build CI Tested-by: Jenkins OP HW Tested-by: FSP CI Jenkins Reviewed-by: Corey V. Swenson Reviewed-by: Thomas R. Sand Reviewed-by: Daniel M. Crowell --- src/build/citest/etc/workarounds.postsimsetup | 1 + src/include/usr/fapi2/target.H | 4 +- src/usr/isteps/istep12/call_cen_dmi_scominit.C | 65 ++++++- src/usr/isteps/istep12/call_cen_set_inband_addr.C | 68 ++++++- src/usr/isteps/istep12/call_dmi_attr_update.C | 88 ++++++++- src/usr/isteps/istep12/call_dmi_erepair.C | 216 +++++++++++++++++++++- src/usr/isteps/istep12/call_dmi_io_dccal.C | 100 +++++++++- src/usr/isteps/istep12/call_dmi_io_run_training.C | 68 ++++++- src/usr/isteps/istep12/call_dmi_post_trainadv.C | 90 ++++++++- src/usr/isteps/istep12/call_dmi_pre_trainadv.C | 90 ++++++++- src/usr/isteps/istep12/call_mss_getecid.C | 94 ++++++---- src/usr/isteps/istep12/call_proc_cen_framelock.C | 97 +++++++++- src/usr/isteps/istep12/call_proc_dmi_scominit.C | 66 ++++++- src/usr/isteps/istep12/makefile | 60 ++++++ src/usr/scom/scomtrans.C | 10 + 15 files changed, 1042 insertions(+), 75 deletions(-) diff --git a/src/build/citest/etc/workarounds.postsimsetup b/src/build/citest/etc/workarounds.postsimsetup index 643da6c27..cced00087 100755 --- a/src/build/citest/etc/workarounds.postsimsetup +++ b/src/build/citest/etc/workarounds.postsimsetup @@ -50,3 +50,4 @@ mk -a echo "Copying centaur and p9c action files" sbex -t 1032952 +sbex -t 1033805 diff --git a/src/include/usr/fapi2/target.H b/src/include/usr/fapi2/target.H index 63024468e..a77182281 100644 --- a/src/include/usr/fapi2/target.H +++ b/src/include/usr/fapi2/target.H @@ -755,8 +755,10 @@ inline std::vector > // Cumulus Memory // valid children for MC // MC -> MI + // MC -> DMI static_assert(!((T_SELF == fapi2::TARGET_TYPE_MC) && - (K_CHILD != fapi2::TARGET_TYPE_MI)), + (K_CHILD != fapi2::TARGET_TYPE_MI) && + (K_CHILD != fapi2::TARGET_TYPE_DMI)), "improper child of fapi2::TARGET_TYPE_MC"); // valid children for MI diff --git a/src/usr/isteps/istep12/call_cen_dmi_scominit.C b/src/usr/isteps/istep12/call_cen_dmi_scominit.C index 061b83461..576d4ed23 100644 --- a/src/usr/isteps/istep12/call_cen_dmi_scominit.C +++ b/src/usr/isteps/istep12/call_cen_dmi_scominit.C @@ -22,17 +22,30 @@ /* permissions and limitations under the License. */ /* */ /* IBM_PROLOG_END_TAG */ -#include +#include -#include +#include +#include +#include #include #include +#include + // targeting support. #include #include +//Fapi Support +#include +#include +#include +#include + +// HWP +#include + using namespace ISTEP; using namespace ISTEP_ERROR; using namespace ERRORLOG; @@ -44,6 +57,54 @@ namespace ISTEP_12 void* call_cen_dmi_scominit (void *io_pArgs) { IStepError l_StepError; + errlHndl_t l_err = NULL; + + TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_cen_dmi_scominit entry" ); + + TARGETING::TargetHandleList l_membufTargetList; + getAllChips(l_membufTargetList, TYPE_MEMBUF); + + TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, "call_cen_dmi_scominit: %d membufs found", + l_membufTargetList.size()); + + for (const auto & l_membuf_target : l_membufTargetList) + { + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "p9_io_cen_scominit HWP target HUID %.8x", + TARGETING::get_huid(l_membuf_target)); + + // call the HWP with each target + fapi2::Target l_fapi_membuf_target + (l_membuf_target); + + FAPI_INVOKE_HWP(l_err, p9_io_cen_scominit, l_fapi_membuf_target); + + // process return code. + if ( l_err ) + { + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "ERROR 0x%.8X: p9_io_cen_scominit HWP on target HUID %.8x", + l_err->reasonCode(), TARGETING::get_huid(l_membuf_target) ); + + // capture the target data in the elog + ErrlUserDetailsTarget(l_membuf_target).addToLog( l_err ); + + // Create IStep error log and cross reference to error that occurred + l_StepError.addErrorDetails( l_err ); + + // Commit Error + errlCommit( l_err, ISTEP_COMP_ID ); + } + else + { + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "SUCCESS : p9_io_cen_scominit HWP"); + } + + } + + + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_cen_dmi_scominit exit" ); // end task, returning any errorlogs to IStepDisp return l_StepError.getErrorHandle(); diff --git a/src/usr/isteps/istep12/call_cen_set_inband_addr.C b/src/usr/isteps/istep12/call_cen_set_inband_addr.C index 58bc37cd0..ed6751087 100644 --- a/src/usr/isteps/istep12/call_cen_set_inband_addr.C +++ b/src/usr/isteps/istep12/call_cen_set_inband_addr.C @@ -22,17 +22,30 @@ /* permissions and limitations under the License. */ /* */ /* IBM_PROLOG_END_TAG */ -#include +#include -#include +#include +#include +#include #include #include +#include + // targeting support. #include #include +//Fapi Support +#include +#include +#include +#include + +//HWP +#include + using namespace ISTEP; using namespace ISTEP_ERROR; using namespace ERRORLOG; @@ -44,9 +57,58 @@ namespace ISTEP_12 void* call_cen_set_inband_addr (void *io_pArgs) { IStepError l_StepError; - + errlHndl_t l_err = NULL; + + TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_cen_set_inband_addr entry" ); + + TARGETING::TargetHandleList l_procTargetList; + getAllChips(l_procTargetList, TYPE_PROC); + + TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, "call_cen_set_inband_addr: %d proc chips found", + l_procTargetList.size()); + + for (const auto & l_proc_target : l_procTargetList) + { + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "p9c_set_inband_addr HWP target HUID %.8x", + TARGETING::get_huid(l_proc_target)); + + // call the HWP with each target + fapi2::Target l_fapi_proc_target + (l_proc_target); + + FAPI_INVOKE_HWP(l_err, p9c_set_inband_addr, l_fapi_proc_target); + + // process return code. + if ( l_err ) + { + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "ERROR 0x%.8X: p9c_set_inband_addr HWP on target HUID %.8x", + l_err->reasonCode(), TARGETING::get_huid(l_proc_target) ); + + // capture the target data in the elog + ErrlUserDetailsTarget(l_proc_target).addToLog( l_err ); + + // Create IStep error log and cross reference to error that occurred + l_StepError.addErrorDetails( l_err ); + + // Commit Error + errlCommit( l_err, ISTEP_COMP_ID ); + } + else + { + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "SUCCESS : p9c_set_inband_addr HWP"); + } + + } + + + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_cen_set_inband_addr exit" ); + // end task, returning any errorlogs to IStepDisp return l_StepError.getErrorHandle(); + } }; diff --git a/src/usr/isteps/istep12/call_dmi_attr_update.C b/src/usr/isteps/istep12/call_dmi_attr_update.C index 732b65747..3dde5a7dd 100644 --- a/src/usr/isteps/istep12/call_dmi_attr_update.C +++ b/src/usr/isteps/istep12/call_dmi_attr_update.C @@ -22,17 +22,30 @@ /* permissions and limitations under the License. */ /* */ /* IBM_PROLOG_END_TAG */ -#include +#include -#include +#include +#include +#include #include #include +#include + // targeting support. #include #include +//Fapi Support +#include +#include +#include +#include + +//HWP +#include + using namespace ISTEP; using namespace ISTEP_ERROR; using namespace ERRORLOG; @@ -44,7 +57,76 @@ namespace ISTEP_12 void* call_dmi_attr_update (void *io_pArgs) { IStepError l_StepError; - + errlHndl_t l_err = NULL; + + TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_dmi_attr_update entry" ); + + TARGETING::TargetHandleList l_dmiTargetList; + getAllChiplets(l_dmiTargetList, TYPE_DMI); + + TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, "call_dmi_attr_update: %d DMIs found", + l_dmiTargetList.size()); + + for (const auto & l_dmi_target : l_dmiTargetList) + { + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "p9_io_dmi_attr_update HWP target HUID %.8x", + TARGETING::get_huid(l_dmi_target)); + + //get the membuf associated with this DMI. + TARGETING::TargetHandleList l_pChildMembufList; + getChildAffinityTargetsByState(l_pChildMembufList, + l_dmi_target, + CLASS_CHIP, + TYPE_MEMBUF, + UTIL_FILTER_PRESENT); + // call the HWP p9_io_dmi_attr_update only if membuf connected. + //we can't expect more than one membufs connected to a DMI + if (l_pChildMembufList.size() == 1) + { + // call the HWP with each DMI target + fapi2::Target l_fapi_dmi_target + (l_dmi_target); + + fapi2::Target l_fapi_membuf_target + (l_pChildMembufList[0]); + + FAPI_INVOKE_HWP(l_err, p9_io_dmi_attr_update, l_fapi_dmi_target, l_fapi_membuf_target ); + + // process return code. + if ( l_err ) + { + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "ERROR 0x%.8X: p9_io_dmi_attr_update HWP on target HUID %.8x", + l_err->reasonCode(), TARGETING::get_huid(l_dmi_target) ); + + // capture the target data in the elog + ErrlUserDetailsTarget(l_dmi_target).addToLog( l_err ); + + // Create IStep error log and cross reference to error that occurred + l_StepError.addErrorDetails( l_err ); + + // Commit Error + errlCommit( l_err, ISTEP_COMP_ID ); + } + else + { + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "SUCCESS : p9_io_dmi_attr_update HWP"); + } + } + else //No associated membuf + { + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "p9_io_dmi_attr_update HWP skipped, no associated membufs %d" + ,l_pChildMembufList.size()); + } + + } + + + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_dmi_attr_update exit" ); + // end task, returning any errorlogs to IStepDisp return l_StepError.getErrorHandle(); } diff --git a/src/usr/isteps/istep12/call_dmi_erepair.C b/src/usr/isteps/istep12/call_dmi_erepair.C index a556237d3..3ec6f5bfe 100644 --- a/src/usr/isteps/istep12/call_dmi_erepair.C +++ b/src/usr/isteps/istep12/call_dmi_erepair.C @@ -22,17 +22,33 @@ /* permissions and limitations under the License. */ /* */ /* IBM_PROLOG_END_TAG */ -#include +#include -#include +#include +#include +#include #include #include +#include + // targeting support. #include #include +//Fapi Support +#include +#include +#include +#include + +//HWP +#include +#include + +//#include TODO RTC 179584 + using namespace ISTEP; using namespace ISTEP_ERROR; using namespace ERRORLOG; @@ -44,7 +60,201 @@ namespace ISTEP_12 void* call_dmi_erepair (void *io_pArgs) { IStepError l_StepError; - + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_dmi_erepair entry" ); + + errlHndl_t l_errPtr = NULL; + fapi2::ReturnCode l_rc; + std::vector l_endp1_txFaillanes; + std::vector l_endp1_rxFaillanes; + std::vector l_endp2_txFaillanes; + std::vector l_endp2_rxFaillanes; + uint32_t l_count = 0; + + TargetHandleList l_dmiTargetList; + TargetHandleList l_memTargetList; + TargetHandleList::iterator l_mem_iter; + + // find all DMI chiplets of all procs + getAllChiplets(l_dmiTargetList, TYPE_DMI); + + for (TargetHandleList::const_iterator + l_dmi_iter = l_dmiTargetList.begin(); + l_dmi_iter != l_dmiTargetList.end(); + ++l_dmi_iter) + { + // make a local copy of the DMI target + TARGETING::Target *l_dmi_target = *l_dmi_iter; + ATTR_CHIP_UNIT_type l_dmiNum = l_dmi_target->getAttr(); + + // find all the Centaurs that are associated with this DMI + getChildAffinityTargets(l_memTargetList, l_dmi_target, + CLASS_CHIP, TYPE_MEMBUF); + + if(l_memTargetList.size() != 1) + { + continue; + } + + // There will always be 1 Centaur associated with a DMI + l_mem_iter = l_memTargetList.begin(); + + // make a local copy of the MEMBUF target + TARGETING::Target *l_mem_target = *l_mem_iter; + ATTR_POSITION_type l_memNum = l_mem_target->getAttr(); + + // struct containing custom parameters that is fed to HWP + // call the HWP with each target(if parallel, spin off a task) + const fapi2::Target< fapi2::TARGET_TYPE_DMI > l_fapi_endp1_target + (l_dmi_target); + + const fapi2::Target< fapi2::TARGET_TYPE_MEMBUF_CHIP > l_fapi_endp2_target + (l_mem_target); + + // Get the repair lanes from the VPD + l_endp1_txFaillanes.clear(); + l_endp1_rxFaillanes.clear(); + l_endp2_txFaillanes.clear(); + l_endp2_rxFaillanes.clear(); + + //TODO-RTC:179584 - Enable this section + #if 0 + l_rc = erepairGetRestoreLanes(l_fapi_endp1_target, + l_endp1_txFaillanes, + l_endp1_rxFaillanes, + l_fapi_endp2_target, + l_endp2_txFaillanes, + l_endp2_rxFaillanes); + + if(l_rc) + { + TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, "Unable to" + " retrieve DMI eRepair data from the VPD"); + TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, + "target HUID %.8X", TARGETING::get_huid(l_mem_target)); + + // Convert fapi returnCode to Error handle + l_errPtr = fapiRcToErrl(l_rc); + + // capture the target data in the elog + ErrlUserDetailsTarget(l_dmi_target).addToLog(l_errPtr); + ErrlUserDetailsTarget(l_mem_target).addToLog(l_errPtr); + + // Create IStep error log and cross reference error that occurred + l_StepError.addErrorDetails( l_errPtr); + + // Commit Error + errlCommit(l_errPtr, HWPF_COMP_ID); + break; + } + + #endif + + if(l_endp1_txFaillanes.size() || l_endp1_rxFaillanes.size()) + { + // call the p9_io_dmi_restore_erepair HWP to restore eRepair + // lanes of DMI + + TRACDCOMP(ISTEPS_TRACE::g_trac_isteps_trace, + "p9_io_dmi_restore_erepair HWP" + " ( dmi 0x%x, mem 0x%x ) : ", + l_dmiNum, + l_memNum ); + + FAPI_INVOKE_HWP(l_errPtr, + p9_io_dmi_restore_erepair, + l_fapi_endp1_target, + l_endp1_txFaillanes, + l_endp1_rxFaillanes); + if(l_errPtr) + { + TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, + "ERROR 0x%.8X : p9_io_dmi_restore_erepair HWP" + "( dmi 0x%x, mem 0x%x ) ", + l_errPtr->reasonCode(), + l_dmiNum, + l_memNum); + + // capture the target data in the elog + ErrlUserDetailsTarget(l_dmi_target).addToLog(l_errPtr); + + // Create IStep error log and cross ref error that occurred + l_StepError.addErrorDetails( l_errPtr); + + // Commit Error + errlCommit(l_errPtr, HWPF_COMP_ID); + break; + } + + for(l_count = 0; l_count < l_endp1_txFaillanes.size(); l_count++) + { + TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,"Successfully" + " restored Tx lane %d, of DMI-Bus, of DMI", + l_endp1_txFaillanes[l_count]); + } + + for(l_count = 0; l_count < l_endp1_rxFaillanes.size(); l_count++) + { + TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,"Successfully" + " restored Rx lane %d, of DMI-Bus, of DMI", + l_endp1_rxFaillanes[l_count]); + } + } // end of if(l_endp1_txFaillanes.size() || l_endp1_rxFaillanes.size()) + + if(l_endp2_txFaillanes.size() || l_endp2_rxFaillanes.size()) + { + // call the p9_io_cen_restore_erepair HWP to restore eRepair + // lanes of membuf + + TRACDCOMP(ISTEPS_TRACE::g_trac_isteps_trace, + "p9_io_cen_restore_erepair HWP" + " ( dmi 0x%x, mem 0x%x ) : ", + l_dmiNum, + l_memNum ); + FAPI_INVOKE_HWP(l_errPtr, + p9_io_cen_restore_erepair, + l_fapi_endp2_target, + l_endp2_txFaillanes, + l_endp2_rxFaillanes); + if (l_errPtr) + { + TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, + "ERROR 0x%.8X : p9_io_cen_restore_erepair HWP" + "( dmi 0x%x, mem 0x%x ) ", + l_errPtr->reasonCode(), + l_dmiNum, + l_memNum); + + // capture the target data in the elog + ErrlUserDetailsTarget(l_mem_target).addToLog(l_errPtr); + + // Create IStep error log and cross ref error that occurred + l_StepError.addErrorDetails( l_errPtr); + + // Commit Error + errlCommit(l_errPtr, HWPF_COMP_ID); + break; + } + + for(l_count = 0; l_count < l_endp2_txFaillanes.size(); l_count++) + { + TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,"Successfully" + " restored Tx lane %d, of DMI-Bus, of membuf", + l_endp2_txFaillanes[l_count]); + } + + for(l_count = 0; l_count < l_endp2_rxFaillanes.size(); l_count++) + { + TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,"Successfully" + " restored Rx lane %d, of DMI-Bus, of membuf", + l_endp2_rxFaillanes[l_count]); + } + } // end of if(l_endp2_txFaillanes.size() || l_endp2_rxFaillanes.size()) + } // end for l_dmi_target + + + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_dmi_erepair exit" ); + + // end task, returning any errorlogs to IStepDisp return l_StepError.getErrorHandle(); } diff --git a/src/usr/isteps/istep12/call_dmi_io_dccal.C b/src/usr/isteps/istep12/call_dmi_io_dccal.C index fb32d0a2c..d6130eb45 100644 --- a/src/usr/isteps/istep12/call_dmi_io_dccal.C +++ b/src/usr/isteps/istep12/call_dmi_io_dccal.C @@ -22,17 +22,31 @@ /* permissions and limitations under the License. */ /* */ /* IBM_PROLOG_END_TAG */ -#include +#include -#include +#include +#include +#include #include #include +#include + // targeting support. #include #include +//Fapi Support +#include +#include +#include +#include + +// HWP +#include +#include + using namespace ISTEP; using namespace ISTEP_ERROR; using namespace ERRORLOG; @@ -44,7 +58,87 @@ namespace ISTEP_12 void* call_dmi_io_dccal (void *io_pArgs) { IStepError l_StepError; - + errlHndl_t l_err = NULL; + + TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_dmi_io_dccal entry" ); + + TARGETING::TargetHandleList l_procTargetList; + getAllChips(l_procTargetList, TYPE_PROC); + + TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, "call_dmi_io_dccal: %d proc chips found", + l_procTargetList.size()); + + for (const auto & l_proc_target : l_procTargetList) + { + // a. p9_io_dmi_dccal.C (DMI target) + + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "p9_io_dmi_dccal HWP target HUID %.8x", + TARGETING::get_huid(l_proc_target)); + + // call the HWP with each target + fapi2::Target l_fapi_proc_target + (l_proc_target); + + FAPI_INVOKE_HWP(l_err, p9_io_dmi_dccal, l_fapi_proc_target); + + // process return code. + if ( l_err ) + { + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "ERROR 0x%.8X: p9_io_dmi_dccal HWP on target HUID %.8x", + l_err->reasonCode(), TARGETING::get_huid(l_proc_target) ); + + // capture the target data in the elog + ErrlUserDetailsTarget(l_proc_target).addToLog( l_err ); + + // Create IStep error log and cross reference to error that occurred + l_StepError.addErrorDetails( l_err ); + + // Commit Error + errlCommit( l_err, ISTEP_COMP_ID ); + } + else + { + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "SUCCESS : p9_io_dmi_dccal HWP"); + } + + // b. p9_io_cen_dccal.C (Centaur target) + + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "p9_io_cen_dccal HWP target HUID %.8x", + TARGETING::get_huid(l_proc_target)); + + FAPI_INVOKE_HWP(l_err, p9_io_cen_dccal, l_fapi_proc_target); + + // process return code. + if ( l_err ) + { + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "ERROR 0x%.8X: p9_io_cen_dccal HWP on target HUID %.8x", + l_err->reasonCode(), TARGETING::get_huid(l_proc_target) ); + + // capture the target data in the elog + ErrlUserDetailsTarget(l_proc_target).addToLog( l_err ); + + // Create IStep error log and cross reference to error that occurred + l_StepError.addErrorDetails( l_err ); + + // Commit Error + errlCommit( l_err, ISTEP_COMP_ID ); + } + else + { + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "SUCCESS : p9_io_cen_dccal HWP"); + } + + } + + + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_dmi_io_dccal exit" ); + // end task, returning any errorlogs to IStepDisp return l_StepError.getErrorHandle(); } diff --git a/src/usr/isteps/istep12/call_dmi_io_run_training.C b/src/usr/isteps/istep12/call_dmi_io_run_training.C index 045532a13..0c3d1a2dd 100644 --- a/src/usr/isteps/istep12/call_dmi_io_run_training.C +++ b/src/usr/isteps/istep12/call_dmi_io_run_training.C @@ -22,17 +22,30 @@ /* permissions and limitations under the License. */ /* */ /* IBM_PROLOG_END_TAG */ -#include +#include -#include +#include +#include +#include #include #include +#include + // targeting support. #include #include +//Fapi Support +#include +#include +#include +#include + +//HWP +#include + using namespace ISTEP; using namespace ISTEP_ERROR; using namespace ERRORLOG; @@ -44,9 +57,58 @@ namespace ISTEP_12 void* call_dmi_io_run_training (void *io_pArgs) { IStepError l_StepError; - + errlHndl_t l_err = NULL; + + TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_dmi_io_run_training entry" ); + + TARGETING::TargetHandleList l_procTargetList; + getAllChips(l_procTargetList, TYPE_PROC); + + TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, "call_dmi_io_run_training: %d proc chips found", + l_procTargetList.size()); + + for (const auto & l_proc_target : l_procTargetList) + { + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "p9_io_dmi_linktrain HWP target HUID %.8x", + TARGETING::get_huid(l_proc_target)); + + // call the HWP with each target + fapi2::Target l_fapi_proc_target + (l_proc_target); + + FAPI_INVOKE_HWP(l_err, p9_io_dmi_linktrain, l_fapi_proc_target); + + // process return code. + if ( l_err ) + { + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "ERROR 0x%.8X: p9_io_dmi_linktrain HWP on target HUID %.8x", + l_err->reasonCode(), TARGETING::get_huid(l_proc_target) ); + + // capture the target data in the elog + ErrlUserDetailsTarget(l_proc_target).addToLog( l_err ); + + // Create IStep error log and cross reference to error that occurred + l_StepError.addErrorDetails( l_err ); + + // Commit Error + errlCommit( l_err, ISTEP_COMP_ID ); + } + else + { + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "SUCCESS : p9_io_dmi_linktrain HWP"); + } + + } + + + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_dmi_io_run_training exit" ); + // end task, returning any errorlogs to IStepDisp return l_StepError.getErrorHandle(); + } }; diff --git a/src/usr/isteps/istep12/call_dmi_post_trainadv.C b/src/usr/isteps/istep12/call_dmi_post_trainadv.C index bca3f2e66..d99278b20 100644 --- a/src/usr/isteps/istep12/call_dmi_post_trainadv.C +++ b/src/usr/isteps/istep12/call_dmi_post_trainadv.C @@ -22,17 +22,30 @@ /* permissions and limitations under the License. */ /* */ /* IBM_PROLOG_END_TAG */ -#include +#include -#include +#include +#include +#include #include #include +#include + // targeting support. #include #include +//Fapi Support +#include +#include +#include +#include + +//HWP +#include + using namespace ISTEP; using namespace ISTEP_ERROR; using namespace ERRORLOG; @@ -44,8 +57,77 @@ namespace ISTEP_12 void* call_dmi_post_trainadv (void *io_pArgs) { IStepError l_StepError; - - // end task, returning any errorlogs to IStepDisp + errlHndl_t l_err = NULL; + + TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_dmi_post_trainadv entry" ); + + TARGETING::TargetHandleList l_dmiTargetList; + getAllChiplets(l_dmiTargetList, TYPE_DMI); + + TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, "call_dmi_post_trainadv: %d DMIs found", + l_dmiTargetList.size()); + + for (const auto & l_dmi_target : l_dmiTargetList) + { + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "p9_io_dmi_post_trainadv HWP target HUID %.8x", + TARGETING::get_huid(l_dmi_target)); + + //get the membuf associated with this DMI. + TARGETING::TargetHandleList l_pChildMembufList; + getChildAffinityTargetsByState(l_pChildMembufList, + l_dmi_target, + CLASS_CHIP, + TYPE_MEMBUF, + UTIL_FILTER_PRESENT); + // call the HWP p9_io_dmi_post_trainadv only if membuf connected. + //we can't expect more than one membufs connected to a DMI + if (l_pChildMembufList.size() == 1) + { + // call the HWP with each DMI target + fapi2::Target l_fapi_dmi_target + (l_dmi_target); + + fapi2::Target l_fapi_membuf_target + (l_pChildMembufList[0]); + + FAPI_INVOKE_HWP(l_err, p9_io_dmi_post_trainadv, l_fapi_dmi_target, l_fapi_membuf_target ); + + // process return code. + if ( l_err ) + { + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "ERROR 0x%.8X: p9_io_dmi_post_trainadv HWP on target HUID %.8x", + l_err->reasonCode(), TARGETING::get_huid(l_dmi_target) ); + + // capture the target data in the elog + ErrlUserDetailsTarget(l_dmi_target).addToLog( l_err ); + + // Create IStep error log and cross reference to error that occurred + l_StepError.addErrorDetails( l_err ); + + // Commit Error + errlCommit( l_err, ISTEP_COMP_ID ); + } + else + { + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "SUCCESS : p9_io_dmi_post_trainadv HWP"); + } + } + else //No associated membuf + { + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "p9_io_dmi_post_trainadv HWP skipped, no associated membufs %d" + ,l_pChildMembufList.size()); + } + + } + + + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_dmi_post_trainadv exit" ); + + // end task, returning any errorlogs to IStepDisp return l_StepError.getErrorHandle(); } diff --git a/src/usr/isteps/istep12/call_dmi_pre_trainadv.C b/src/usr/isteps/istep12/call_dmi_pre_trainadv.C index 7daa7e9be..a83fe46f5 100644 --- a/src/usr/isteps/istep12/call_dmi_pre_trainadv.C +++ b/src/usr/isteps/istep12/call_dmi_pre_trainadv.C @@ -22,17 +22,30 @@ /* permissions and limitations under the License. */ /* */ /* IBM_PROLOG_END_TAG */ -#include +#include -#include +#include +#include +#include #include #include +#include + // targeting support. #include #include +//Fapi Support +#include +#include +#include +#include + +//HWP +#include + using namespace ISTEP; using namespace ISTEP_ERROR; using namespace ERRORLOG; @@ -44,8 +57,77 @@ namespace ISTEP_12 void* call_dmi_pre_trainadv (void *io_pArgs) { IStepError l_StepError; - - // end task, returning any errorlogs to IStepDisp + errlHndl_t l_err = NULL; + + TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_dmi_pre_trainadv entry" ); + + TARGETING::TargetHandleList l_dmiTargetList; + getAllChiplets(l_dmiTargetList, TYPE_DMI); + + TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, "call_dmi_pre_trainadv: %d DMIs found", + l_dmiTargetList.size()); + + for (const auto & l_dmi_target : l_dmiTargetList) + { + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "p9_io_dmi_pre_trainadv HWP target HUID %.8x", + TARGETING::get_huid(l_dmi_target)); + + //get the membuf associated with this DMI. + TARGETING::TargetHandleList l_pChildMembufList; + getChildAffinityTargetsByState(l_pChildMembufList, + l_dmi_target, + CLASS_CHIP, + TYPE_MEMBUF, + UTIL_FILTER_PRESENT); + // call the HWP p9_io_dmi_pre_trainadv only if membuf connected. + //we can't expect more than one membufs connected to a DMI + if (l_pChildMembufList.size() == 1) + { + // call the HWP with each DMI target + fapi2::Target l_fapi_dmi_target + (l_dmi_target); + + fapi2::Target l_fapi_membuf_target + (l_pChildMembufList[0]); + + FAPI_INVOKE_HWP(l_err, p9_io_dmi_pre_trainadv, l_fapi_dmi_target, l_fapi_membuf_target ); + + // process return code. + if ( l_err ) + { + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "ERROR 0x%.8X: p9_io_dmi_pre_trainadv HWP on target HUID %.8x", + l_err->reasonCode(), TARGETING::get_huid(l_dmi_target) ); + + // capture the target data in the elog + ErrlUserDetailsTarget(l_dmi_target).addToLog( l_err ); + + // Create IStep error log and cross reference to error that occurred + l_StepError.addErrorDetails( l_err ); + + // Commit Error + errlCommit( l_err, ISTEP_COMP_ID ); + } + else + { + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "SUCCESS : p9_io_dmi_pre_trainadv HWP"); + } + } + else //No associated membuf + { + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "p9_io_dmi_pre_trainadv HWP skipped, no associated membufs %d" + ,l_pChildMembufList.size()); + } + + } + + + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_dmi_pre_trainadv exit" ); + + // end task, returning any errorlogs to IStepDisp return l_StepError.getErrorHandle(); } diff --git a/src/usr/isteps/istep12/call_mss_getecid.C b/src/usr/isteps/istep12/call_mss_getecid.C index 02cd08b27..644661946 100644 --- a/src/usr/isteps/istep12/call_mss_getecid.C +++ b/src/usr/isteps/istep12/call_mss_getecid.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2015,2016 */ +/* Contributors Listed Below - COPYRIGHT 2015,2017 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -22,17 +22,32 @@ /* permissions and limitations under the License. */ /* */ /* IBM_PROLOG_END_TAG */ -#include +#include -#include +#include +#include +#include #include #include +#include + +#include + // targeting support. #include #include +//Fapi Support +#include +#include +#include +#include + +//HWP +#include + using namespace ISTEP; using namespace ISTEP_ERROR; using namespace ERRORLOG; @@ -44,8 +59,7 @@ namespace ISTEP_12 void* call_mss_getecid (void *io_pArgs) { IStepError l_StepError; - /* - //@TODO RTC:144076-Centaur L1 HWP support + errlHndl_t l_err = NULL; uint8_t l_ddr_port_status = 0; uint8_t l_cache_enable = 0; @@ -73,24 +87,24 @@ void* call_mss_getecid (void *io_pArgs) // Dump current run on target TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, - "Running mss_get_cen_ecid HWP on " + "Running p9c_mss_get_cen_ecid HWP on " "target HUID %.8X", TARGETING::get_huid(l_pCentaur)); - // Cast to a FAPI type of target. - const fapi::Target l_fapi_centaur( TARGET_TYPE_MEMBUF_CHIP, - (const_cast(l_pCentaur)) ); + // call the HWP with each target + fapi2::Target l_fapi_centaur + (l_pCentaur); - // call the HWP with each fapi::Target + // call the HWP with each fapi2::Target // Note: This HWP does not actually return the entire ECID data. It // updates the attribute ATTR_MSS_ECID and returns the DDR port status // which is a portion of the ECID data. - FAPI_INVOKE_HWP(l_err, mss_get_cen_ecid, + FAPI_INVOKE_HWP(l_err, p9c_mss_get_cen_ecid, l_fapi_centaur, l_ddr_port_status, l_cache_enable, l_centaur_sub_revision, l_ecidUser); if (l_err) { TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, - "ERROR 0x%.8X: mss_get_cen_ecid HWP returns error", + "ERROR 0x%.8X: p9c_mss_get_cen_ecid HWP returns error", l_err->reasonCode()); // capture the target data in the elog @@ -167,56 +181,59 @@ void* call_mss_getecid (void *io_pArgs) } // mss_get_cen_ecid returns if the L4 cache is enabled. This can be - // - fapi::ENUM_ATTR_MSS_CACHE_ENABLE_OFF - // - fapi::ENUM_ATTR_MSS_CACHE_ENABLE_ON - // - fapi::ENUM_ATTR_MSS_CACHE_ENABLE_HALF_A - // - fapi::ENUM_ATTR_MSS_CACHE_ENABLE_HALF_B - // - fapi::ENUM_ATTR_MSS_CACHE_ENABLE_UNK_OFF - // - fapi::ENUM_ATTR_MSS_CACHE_ENABLE_UNK_ON - // - fapi::ENUM_ATTR_MSS_CACHE_ENABLE_UNK_HALF_A - // - fapi::ENUM_ATTR_MSS_CACHE_ENABLE_UNK_HALF_B + // - fapi2::ENUM_ATTR_CEN_MSS_CACHE_ENABLE_OFF + // - fapi2::ENUM_ATTR_CEN_MSS_CACHE_ENABLE_ON + // - fapi2::ENUM_ATTR_CEN_MSS_CACHE_ENABLE_HALF_A + // - fapi2::ENUM_ATTR_CEN_MSS_CACHE_ENABLE_HALF_B + // - fapi2::ENUM_ATTR_CEN_MSS_CACHE_ENABLE_UNK_OFF + // - fapi2::ENUM_ATTR_CEN_MSS_CACHE_ENABLE_UNK_ON + // - fapi2::ENUM_ATTR_CEN_MSS_CACHE_ENABLE_UNK_HALF_A + // - fapi2::ENUM_ATTR_CEN_MSS_CACHE_ENABLE_UNK_HALF_B // The UNK values are for DD1.* Centaur chips where the fuses were // not blown correctly so the cache may not be in the correct state. // // Firmware does not normally support HALF enabled - // If ON then ATTR_MSS_CACHE_ENABLE is set to ON - // Else ATTR_MSS_CACHE_ENABLE is set to OFF and the L4 Target is + // If ON then ATTR_CEN_MSS_CACHE_ENABLE is set to ON + // Else ATTR_CEN_MSS_CACHE_ENABLE is set to OFF and the L4 Target is // deconfigured // - // However, an engineer can override ATTR_MSS_CACHE_ENABLE. If they + // However, an engineer can override ATTR_CEN_MSS_CACHE_ENABLE. If they // override it to HALF_A or HALF_B then - // - ATTR_MSS_CACHE_ENABLE is set to HALF_X + // - ATTR_CEN_MSS_CACHE_ENABLE is set to HALF_X // - The L4 Target is not deconfigured - if (l_cache_enable != fapi::ENUM_ATTR_MSS_CACHE_ENABLE_ON) + if (l_cache_enable != fapi2::ENUM_ATTR_CEN_MSS_CACHE_ENABLE_ON) { TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, "call_mss_getecid: mss_get_cen_ecid returned L4 not-on (0x%02x)", l_cache_enable); - l_cache_enable = fapi::ENUM_ATTR_MSS_CACHE_ENABLE_OFF; + l_cache_enable = fapi2::ENUM_ATTR_CEN_MSS_CACHE_ENABLE_OFF; } - // Set the ATTR_MSS_CACHE_ENABLE attribute - l_pCentaur->setAttr( - l_cache_enable); + // ATTR_CEN_MSS_CACHE_ENABLE is not set as writeable in src/import/chips/centaur/procedures/xml/attribute_info/memory_attributes.xml + // Should we remove below code? + // Set the ATTR_CEN_MSS_CACHE_ENABLE attribute + //l_pCentaur->setAttr( + // l_cache_enable); - // Read the ATTR_MSS_CACHE_ENABLE back to pick up any override + // Read the ATTR_CEN_MSS_CACHE_ENABLE back to pick up any override uint8_t l_cache_enable_attr = - l_pCentaur->getAttr(); + l_pCentaur->getAttr(); if (l_cache_enable != l_cache_enable_attr) { TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, - "call_mss_getecid: ATTR_MSS_CACHE_ENABLE override (0x%02x)", + "call_mss_getecid: ATTR_CEN_MSS_CACHE_ENABLE override (0x%02x)", l_cache_enable_attr); } + // At this point HALF_A/HALF_B are only possible due to override if ((l_cache_enable_attr != - fapi::ENUM_ATTR_MSS_CACHE_ENABLE_ON) && + fapi2::ENUM_ATTR_CEN_MSS_CACHE_ENABLE_ON) && (l_cache_enable_attr != - fapi::ENUM_ATTR_MSS_CACHE_ENABLE_HALF_A) && + fapi2::ENUM_ATTR_CEN_MSS_CACHE_ENABLE_HALF_A) && (l_cache_enable_attr != - fapi::ENUM_ATTR_MSS_CACHE_ENABLE_HALF_B)) + fapi2::ENUM_ATTR_CEN_MSS_CACHE_ENABLE_HALF_B)) { // Deconfigure the L4 Cache Targets (there should be 1) TargetHandleList l_list; @@ -265,13 +282,8 @@ void* call_mss_getecid (void *io_pArgs) "SUCCESS : mss_get_cen_ecid HWP( )" ); } - #ifdef CONFIG_BMC_IPMI - // Gather + Send the IPMI Fru Inventory data to the BMC - IPMIFRUINV::setData(true); - #endif - TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_mss_getecid exit" ); -*/ + // end task, returning any errorlogs to IStepDisp return l_StepError.getErrorHandle(); } diff --git a/src/usr/isteps/istep12/call_proc_cen_framelock.C b/src/usr/isteps/istep12/call_proc_cen_framelock.C index 84ebe392b..644f2be0d 100644 --- a/src/usr/isteps/istep12/call_proc_cen_framelock.C +++ b/src/usr/isteps/istep12/call_proc_cen_framelock.C @@ -22,17 +22,30 @@ /* permissions and limitations under the License. */ /* */ /* IBM_PROLOG_END_TAG */ -#include +#include -#include +#include +#include +#include #include #include +#include + // targeting support. #include #include +//Fapi Support +#include +#include +#include +#include + +// HWP +#include + using namespace ISTEP; using namespace ISTEP_ERROR; using namespace ERRORLOG; @@ -44,9 +57,83 @@ namespace ISTEP_12 void* call_proc_cen_framelock (void *io_pArgs) { IStepError l_StepError; - + errlHndl_t l_err = NULL; + p9_cen_framelock_args l_args; + l_args.channel_init_timeout = CHANNEL_INIT_TIMEOUT_14US; + l_args.frtl_auto_not_manual = 1; + l_args.frtl_manual_pu = 0; + l_args.frtl_manual_mem = 0; + + TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_proc_cen_framelock entry" ); + + TARGETING::TargetHandleList l_dmiTargetList; + getAllChiplets(l_dmiTargetList, TYPE_DMI); + + TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, "call_proc_cen_framelock: %d DMIs found", + l_dmiTargetList.size()); + + for (const auto & l_dmi_target : l_dmiTargetList) + { + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "p9_cen_framelock HWP target HUID %.8x", + TARGETING::get_huid(l_dmi_target)); + + //get the membuf associated with this DMI. + TARGETING::TargetHandleList l_pChildMembufList; + getChildAffinityTargetsByState(l_pChildMembufList, + l_dmi_target, + CLASS_CHIP, + TYPE_MEMBUF, + UTIL_FILTER_PRESENT); + // call the HWP p9_io_dmi_attr_update only if membuf connected. + //we can't expect more than one membufs connected to a DMI + if (l_pChildMembufList.size() == 1) + { + // call the HWP with each DMI target + fapi2::Target l_fapi_dmi_target + (l_dmi_target); + + fapi2::Target l_fapi_membuf_target + (l_pChildMembufList[0]); + + FAPI_INVOKE_HWP(l_err, p9_cen_framelock, l_fapi_dmi_target, l_fapi_membuf_target, l_args ); + + // process return code. + if ( l_err ) + { + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "ERROR 0x%.8X: p9_cen_framelock HWP on target HUID %.8x", + l_err->reasonCode(), TARGETING::get_huid(l_dmi_target) ); + + // capture the target data in the elog + ErrlUserDetailsTarget(l_dmi_target).addToLog( l_err ); + + // Create IStep error log and cross reference to error that occurred + l_StepError.addErrorDetails( l_err ); + + // Commit Error + errlCommit( l_err, ISTEP_COMP_ID ); + } + else + { + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "SUCCESS : p9_cen_framelock HWP"); + } + } + else //No associated membuf + { + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "call_proc_cen_framelock HWP skipped, no associated membufs %d" + ,l_pChildMembufList.size()); + } + + } + + + + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_proc_cen_framelock exit" ); + // end task, returning any errorlogs to IStepDisp - return l_StepError.getErrorHandle(); -} + return l_StepError.getErrorHandle();} }; diff --git a/src/usr/isteps/istep12/call_proc_dmi_scominit.C b/src/usr/isteps/istep12/call_proc_dmi_scominit.C index c378c4227..e6fbadc7e 100644 --- a/src/usr/isteps/istep12/call_proc_dmi_scominit.C +++ b/src/usr/isteps/istep12/call_proc_dmi_scominit.C @@ -22,17 +22,30 @@ /* permissions and limitations under the License. */ /* */ /* IBM_PROLOG_END_TAG */ -#include +#include -#include +#include +#include +#include #include #include +#include + // targeting support. #include #include +//Fapi Support +#include +#include +#include +#include + +// HWP +#include + using namespace ISTEP; using namespace ISTEP_ERROR; using namespace ERRORLOG; @@ -44,7 +57,54 @@ namespace ISTEP_12 void* call_proc_dmi_scominit (void *io_pArgs) { IStepError l_StepError; - + errlHndl_t l_err = NULL; + + TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_proc_dmi_scominit entry" ); + + TARGETING::TargetHandleList l_dmiTargetList; + getAllChiplets(l_dmiTargetList, TYPE_DMI); + + TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, "call_proc_dmi_scominit: %d DMIs found", + l_dmiTargetList.size()); + + for (const auto & l_dmi_target : l_dmiTargetList) + { + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "p9_io_dmi_scominit HWP target HUID %.8x", + TARGETING::get_huid(l_dmi_target)); + + // call the HWP with each DMI target + fapi2::Target l_fapi_dmi_target + (l_dmi_target); + + FAPI_INVOKE_HWP(l_err, p9_io_dmi_scominit, l_fapi_dmi_target); + + // process return code. + if ( l_err ) + { + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "ERROR 0x%.8X: p9_io_dmi_scominit HWP on target HUID %.8x", + l_err->reasonCode(), TARGETING::get_huid(l_dmi_target) ); + + // capture the target data in the elog + ErrlUserDetailsTarget(l_dmi_target).addToLog( l_err ); + + // Create IStep error log and cross reference to error that occurred + l_StepError.addErrorDetails( l_err ); + + // Commit Error + errlCommit( l_err, ISTEP_COMP_ID ); + } + else + { + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "SUCCESS : p9_io_dmi_scominit HWP"); + } + + } + + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_proc_dmi_scominit exit" ); + // end task, returning any errorlogs to IStepDisp return l_StepError.getErrorHandle(); } diff --git a/src/usr/isteps/istep12/makefile b/src/usr/isteps/istep12/makefile index 48a70fba8..1a879c96c 100644 --- a/src/usr/isteps/istep12/makefile +++ b/src/usr/isteps/istep12/makefile @@ -24,6 +24,43 @@ # IBM_PROLOG_END_TAG ROOTPATH = ../../../.. MODULE = istep12 +P9_PROCEDURES_PATH = ${ROOTPATH}/src/import/chips/p9/procedures +P9_IO_HWP_PATH = $(P9_PROCEDURES_PATH)/hwp/io +P9_PERV_HWP_PATH = $(P9_PROCEDURES_PATH)/hwp/perv +P9_NEST_HWP_PATH = $(P9_PROCEDURES_PATH)/hwp/nest +P9_INITFILE_PATH = $(P9_PROCEDURES_PATH)/hwp/initfiles + +CENT_PROC_PATH = ${ROOTPATH}/src/import/chips/centaur/procedures +CENT_IO_HWP_PATH = $(CENT_PROC_PATH)/hwp/io +CENT_MEM_HWP_PATH = $(CENT_PROC_PATH)/hwp/memory +CENT_INITFILE_PATH = $(CENT_PROC_PATH)/hwp/initfiles + +#Add all the extra include paths +EXTRAINCDIR += ${ROOTPATH}/src/include/usr/fapi2/ +EXTRAINCDIR += ${ROOTPATH}/src/import/hwpf/fapi2/include/ +EXTRAINCDIR += ${ROOTPATH}/src/import/chips/centaur/common/include/ +EXTRAINCDIR += ${ROOTPATH}/src/import/chips/p9/common/include/ +EXTRAINCDIR += ${ROOTPATH}/src/import/chips/p9/utils/imageProcs/ +EXTRAINCDIR += ${ROOTPATH}/src/import/ +EXTRAINCDIR += ${ROOTPATH}/obj/genfiles/ +EXTRAINCDIR += ${ROOTPATH}/src/usr/isteps/ +EXTRAINCDIR += $(P9_PROCEDURES_PATH)/hwp/ffdc/ +EXTRAINCDIR += $(P9_IO_HWP_PATH) +EXTRAINCDIR += $(P9_NEST_HWP_PATH) +EXTRAINCDIR += $(P9_PERV_HWP_PATH) +EXTRAINCDIR += $(P9_INITFILE_PATH) +EXTRAINCDIR += $(CENT_MEM_HWP_PATH) +EXTRAINCDIR += $(CENT_INITFILE_PATH) +EXTRAINCDIR += $(CENT_IO_HWP_PATH) + +VPATH += $(P9_NEST_HWP_PATH) +VPATH += $(P9_PERV_HWP_PATH) +VPATH += $(P9_IO_HWP_PATH) +VPATH += $(P9_INITFILE_PATH) +VPATH += $(CENT_MEM_HWP_PATH) +VPATH += $(CENT_INITFILE_PATH) +VPATH += $(CENT_IO_HWP_PATH) +VAPTH += ${ROOTPATH}/src/usr/fapi2 OBJS += call_mss_getecid.o OBJS += call_dmi_attr_update.o @@ -39,5 +76,28 @@ OBJS += call_host_startprd_dmi.o OBJS += call_host_attnlisten_memb.o OBJS += call_cen_set_inband_addr.o +#Required before all the .mk are included +include ${ROOTPATH}/procedure.rules.mk + +include $(CENT_MEM_HWP_PATH)/p9c_mss_get_cen_ecid.mk +include $(P9_IO_HWP_PATH)/p9_io_dmi_attr_update.mk +include $(P9_IO_HWP_PATH)/p9_io_dmi_scominit.mk +include $(P9_INITFILE_PATH)/p9c_dmi_io_scom.mk +include $(CENT_IO_HWP_PATH)/p9_io_cen_scominit.mk +include $(P9_IO_HWP_PATH)/p9_io_dmi_restore_erepair.mk +include $(CENT_IO_HWP_PATH)/p9_io_cen_restore_erepair.mk +include $(P9_IO_HWP_PATH)/p9_io_dmi_dccal.mk +include $(CENT_IO_HWP_PATH)/p9_io_cen_dccal.mk +include $(P9_IO_HWP_PATH)/p9_io_dmi_pre_trainadv.mk +include $(P9_IO_HWP_PATH)/p9_io_dmi_linktrain.mk +include $(P9_IO_HWP_PATH)/p9_io_dmi_post_trainadv.mk +include $(P9_PERV_HWP_PATH)/p9_cen_framelock.mk +include $(P9_NEST_HWP_PATH)/p9c_set_inband_addr.mk +include $(P9_IO_HWP_PATH)/p9_io_common.mk +include $(P9_IO_HWP_PATH)/p9_io_dmi_pdwn_lanes.mk +include $(CENT_IO_HWP_PATH)/p9_io_cen_pdwn_lanes.mk +include $(P9_IO_HWP_PATH)/p9_io_dmi_clear_firs.mk +include $(CENT_INITFILE_PATH)/centaur_dmi_scom.mk + include ${ROOTPATH}/config.mk diff --git a/src/usr/scom/scomtrans.C b/src/usr/scom/scomtrans.C index ac6de3fe3..78787ca7d 100644 --- a/src/usr/scom/scomtrans.C +++ b/src/usr/scom/scomtrans.C @@ -67,6 +67,11 @@ namespace SCOM bool g_wakeupInProgress = false; +DEVICE_REGISTER_ROUTE(DeviceFW::WILDCARD, + DeviceFW::SCOM, + TARGETING::TYPE_MC, + startScomProcess); + DEVICE_REGISTER_ROUTE(DeviceFW::WILDCARD, DeviceFW::SCOM, TARGETING::TYPE_EX, @@ -912,6 +917,11 @@ bool getChipUnitP9 (TARGETING::TYPE i_type, o_chipUnit = PU_CAPP_CHIPUNIT; break; } + case(TARGETING::TYPE_MC) : + { + o_chipUnit = PU_MC_CHIPUNIT; + break; + } default: { l_isError = true; -- cgit v1.2.1