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* Fix PVR check for Nimbus DD1Dan Crowell2017-05-111-0/+6
| | | | | | | | | | | | | | | | | | Added check for bit 18 to distinguish between Nimbus DD1.0 and Cumulus DD1.0 Consolidated Nimbus DD1 checking to a common function Added printk output that shows which CPU we're running on Modified some existing printk output to use fewer characters Change-Id: I1c42df0051fc2d9cc5fa54d95f68c3bd26b86462 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39876 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com> Reviewed-by: Martin Gloff <mgloff@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Include HUID of failed Proc in TI data for certain SBE errorsBill Hoffa2017-05-101-1/+3
| | | | | | | | | | | | | | | - Include a generic error pipleline for other future error scenarios to leverage this functionality Change-Id: Icc1399ee93157c7106d394944a3355285a8cd830 RTC: 171865 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39072 Reviewed-by: Martin Gloff <mgloff@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Prachi Gupta <pragupta@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Port P8 HBI page verification functionalityStephen Cprek2017-05-011-1/+6
| | | | | | | | | | | | | | Verify HBI pages via its securely signed hash page table Change-Id: I86d29ee393c19aa0d9c5270b0b6c561a9fc4ab51 RTC: 167668 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39071 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
* Remove devtree codeDan Crowell2017-04-261-3/+2
| | | | | | | | | | | | | | OPAL is now HDAT-based, removing all references to the Hostboot-generated devtree. Change-Id: I9fc8773f7135d4e0d4799e4cc7c6e3b6ea1da14d Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39293 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Reviewed-by: Matthew A. Ploetz <maploetz@us.ibm.com>
* Fix OCC Host Data OffsetCorey Swenson2016-10-051-7/+5
| | | | | | | | Change-Id: I1e23ebe452049d86bfd1b1fdafd14f5e48309fb2 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/30687 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Implement XIP Customization for Core InformationMarty Gloff2016-09-071-1/+1
| | | | | | | | | | | | | | | | | Loop to run xip_customize on the pnor image for each core must still be implemented. This commit also enables the call of p9_xip_customize only when not in the FSP environment. Change-Id: Iafc04e2ba05def7794315f9178b55dd2f2de35e4 RTC:158044 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/28098 Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Matt Derksen <v2cibmd@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Updates for new scratch registers in P9Andrew Geissler2016-08-161-18/+8
| | | | | | | | | | | | | | | P9 moves us from 8 scratch registers to 4. This commit handles this change and also adds the base support for partial cache. Change-Id: Ibe050c663744285dd3e77850649236a669dadbd6 RTC: 150923 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/27462 Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Martin Gloff <mgloff@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
* Handle 8MB reduced cache modeMarty Gloff2016-08-101-0/+1
| | | | | | | | | | | | Check scom register (0x1001181B) for reduced cache mode and expand the memory footprint appropriately, reduced 8MB or full 10MB. Change-Id: I5920572077cdcee317e7b3b9abe999e6de295459 RTC:152954 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/27522 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Update purge of L3 cache during initial bootElizabeth Liner2016-06-101-3/+3
| | | | | | | | | | Change-Id: Ic6cfabbdfe8f10cf5fa1cd9a4a13093452b61978 RTC:118832 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24021 Tested-by: Jenkins Server Tested-by: FSP CI Jenkins Reviewed-by: Martin Gloff <mgloff@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Doorbell Interrupt Base Support for Core/Thread WakeupBill Hoffa2016-05-061-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | This change includes: - Implementation of a generic KernelWorkItem Class - Kernel functionality for doorbell send to specific PIRs - Kernel changes to send core/thread Wakeup doorbells using doorbell_send() + placing KernelWorkItems on a cpu stack obj to be executed during doorbell wakeup - Kernel Interrupt Message handler changes to send wakeup msgs - Interrupt Resource Provider (INTRRP) Changes to handle wakeup msgs and monitor for timeouts - Changes to the IPL flow to invoke proper Core/Thread Wakeup - A basic outline (commented out) for how IPC messages can be implemented in the future Change-Id: I547fb8719bac657def561565ae11ab18cde72096 CMVC-Prereq: 992722 RTC:137564 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22815 Tested-by: Jenkins Server Tested-by: FSP CI Jenkins Reviewed-by: Andrew J. Geissler <andrewg@us.ibm.com> Reviewed-by: Prachi Gupta <pragupta@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Integrate HWPs for step 15crgeddes2016-03-171-5/+17
| | | | | | | | | | | | | | | This commit includes work to create the call_HWP wrappers for istep15. RTC:133832 Change-Id: Ib0db5ac2b9b5d5f5c2967ff97794493d867fb04b Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/774 Reviewed-by: A. P. Williams III <iawillia@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Richard J. Knight <rjknight@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Tested-by: Jenkins Server Tested-by: FSP CI Jenkins
* HOSTBOOT: Support fused coresBrian Stegmiller2015-12-111-1/+3
| | | | | | | | | Change-Id: I2ad133be733ee9e41590b3b8bd60bd6abe69d1a9 RTC: 126786 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/22054 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* libc support for thread-local storagePatrick Williams2015-12-111-0/+4
| | | | | | | | | | RTC: 124148 Change-Id: I055885bc7d7cfc4ebd7cf1a662f677bdf4e28c62 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/22313 Tested-by: Jenkins Server Reviewed-by: Richard J. Knight <rjknight@us.ibm.com> Reviewed-by: Brian Silver <bsilver@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Base kernel changes for Nimbus/CumulusCorey Swenson2015-12-111-1/+7
| | | | | | | | | Change-Id: Ic5dfde1e975453d760631335bab674919e1109e7 RTC: 126637 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/18321 Tested-by: Jenkins Server Reviewed-by: Christian Geddes <crgeddes@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Prevent out-of-order data access to FSP mailbox memory areaNick Bofferding2015-04-091-1/+16
| | | | | | | | | | | | | | | | | | - Added system call to map FSP mailbox memory with guard permission - Call new mapping in DMA area init - Propagate guard permission down to MMIO map - Apply guard permission in page fault handler - Updated debug tools to support extra bit in MMIO struct Change-Id: I8335ac7d3ef57e46d4c8b6c2b2a42b8a0bf7c4b0 Backport: release-fips830 Backport: release-fips820 CQ: SW295345 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/16307 Tested-by: Jenkins Server Reviewed-by: Brian H. Horton <brianh@linux.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* PRD: Enable support for UtilFile and prf files for HBRTSachin Gupta2015-01-161-1/+1
| | | | | | | | | | | Change-Id: I91f8157db632b6088fe64b28bf42f993d16e8b44 RTC: 119022 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/14944 Tested-by: Jenkins Server Reviewed-by: Zane Shelley <zshelle@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Christopher T. Phan <cphan@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Fix spelling mistakes using codespell.Patrick Williams2015-01-152-4/+8
| | | | | | | | | | | | - See https://github.com/lucasdemarchi/codespell Change-Id: I03e102d1ebb9473b6226fa9b6edb684fa0218a2f Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/15031 Tested-by: Jenkins Server Reviewed-by: STEPHEN M. CPREK <smcprek@us.ibm.com> Reviewed-by: Zane Shelley <zshelle@us.ibm.com> Reviewed-by: Brian Silver <bsilver@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* add IPMI Watchdog TimerAni Bagepalli2014-12-031-1/+9
| | | | | | | | | | Change-Id: I4617f5b545a3fc193e62fb7cfdf0292b394871c2 RTC: 108832 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/14232 Reviewed-by: Christopher T. Phan <cphan@us.ibm.com> Reviewed-by: Brian H. Horton <brianh@linux.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com> Tested-by: Jenkins Server
* Support for serial console.Patrick Williams2014-09-241-3/+6
| | | | | | | | | | Change-Id: Ia1b11f68cc4be175076562b7daf0291b14df498b Origin: Google Shared Technology RTC: 97495 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/13250 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Populate actual PVR value instead of architected versionDean Sanner2014-07-221-1/+9
| | | | | | | Change-Id: I5d19166fe949394fae536f5165ce6138be7f820b Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/12277 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Add Naples support to the kernelBrian Silver2014-06-231-0/+2
| | | | | | | | | Change-Id: Ie748454257938103bdb76d7ac1b5d425bc97d348 RTC: 107941 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/11298 Tested-by: Jenkins Server Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Change copyright prolog for all files to Apache.Patrick Williams2014-05-2110-117/+117
| | | | | | | Change-Id: I5664587b4f889099290ef50d50fa9ce5e580e1eb Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/11167 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Use new scratch reg for hb_done and set early in IPLAndrew Geissler2014-03-131-6/+4
| | | | | | | | | | | | | | | | | This is to support using the scratch register for the power off message. I moved to a new scratch register since we were sharing with a SBE scratch reg that was needed early in HB IPL. NOTE! This will have a co-req with an FSP track so we'll need to coordinate. CMVC-Coreq: 917527 Change-Id: I5f81f15126d6ad8d2c9459c5afe730554256c037 RTC: 95818 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/9220 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: MIKE J. JONES <mjjones@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Workaround invalid SBE use of IPI inject registerDean Sanner2014-03-041-1/+3
| | | | | | | | | Change-Id: I40600399daf2ef563b534bd91143a4f45d00ff79 CQ: SW248610 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/9273 Tested-by: Jenkins Server Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Handle pending interrupts across nodes in mpiplDoug Gilbert2014-03-021-0/+58
| | | | | | | | | RTC: 80988 Change-Id: I7ef9feaa3d163d6956576f30538e2fe001e892a1 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/8441 Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* implement start_payload for multi-drawerDoug Gilbert2014-01-101-2/+4
| | | | | | | | RTC: 71994 Change-Id: I422f349d5588731a5e7cfc504d96e497958d6b95 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/7426 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* hbirt increase number of modules allowedDoug Gilbert2013-11-131-1/+6
| | | | | | | | Change-Id: I64a05ac460d75a8328a326d808e906dc0751a8d8 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/7166 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Initial Support for Updating SBE SEEPROMMike Baiocchi2013-10-281-1/+1
| | | | | | | | | | | | | | | This initial commit will be used to create the new SBE directories and files. It also supports the usr functions to find and copy SBE PNOR images. NOTE: It will not enable Updating SBE SEEPROMs in the IPL. Change-Id: I3f545a134493c7595ce50fd885478bbe606de472 RTC: 47032 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/6311 Tested-by: Jenkins Server Reviewed-by: ADAM R. MUHLE <armuhle@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Resolve testcase race conditions with SCAN.Patrick Williams2013-09-111-2/+2
| | | | | | | | | | | | | | A number of test cases were writing to the SCAN select register and if the SCAN device driver unit tests were running at the same time they would clobber each other. Moved the other test cases to utilize a core scratch register instead. Change-Id: I243500ce40cdb75e1052541056f9460e50e0bbcd Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/5977 Tested-by: Jenkins Server Reviewed-by: MIKE J. JONES <mjjones@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Ensure task_crash not optimized outMike Jones2013-08-291-2/+2
| | | | | | | | | | | | | | User space assert() calls the task_crash() macro to crash the thread, this writes to address NULL, but the write is optimized out. Therefore an assert does not cause the task to crash as intended. If istep code asserts, the istepdispatcher does not notice and Hostboot hangs instead of TIing. This is fixed with a volatile. Change-Id: Icc27d94d76e937000189655c2f8a640620456673 RTC: 80657 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/5968 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Basic devtree supportDean Sanner2013-08-091-1/+4
| | | | | | | | | | Simple devtree support for Sapphire in SPless mode Change-Id: I4a70bfc5cd3eb3dbd1b443869c046c789f98cc95 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/3739 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Use SBE Setting of Thread Count or FailMike Baiocchi2013-07-091-23/+28
| | | | | | | | | | | | | | This commit takes out the workaround of using a default setting of a thread count if the SBE didn't set the right value in a scratch register. The current SBE code now does this, and we will now fail if for some reason the value isn't set. This commit also includes sim action file updates to model this behavior. Change-Id: I83608c402fac675c0287fa3ce38cf75237bcff26 RTC: 63991 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/5255 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Secureboot memory layout support.Patrick Williams2013-06-141-0/+1
| | | | | | | | | | | | | | | | * Start kernel in 1/4 cache mode per Secureboot. * Copy Secureboot header for base image for later use. * Blind-purge bottom half of cache. * Add bottom of cache into memory maps for 1/2 cache mode. RTC: 64762 Change-Id: I1b45f30a2d45c9709d4fd486cfe0ca2ce86b051c Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/3773 Reviewed-by: Michael Baiocchi <baiocchi@us.ibm.com> Tested-by: Jenkins Server Reviewed-by: ADAM R. MUHLE <armuhle@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* New mm_block_map syscall.Patrick Williams2013-06-102-1/+18
| | | | | | | | RTC: 71081 Change-Id: Ic5531fbba92cfc7aad7d303f043d6a350483d63d Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/4607 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Tolerate memory UEs during dump extraction.Patrick Williams2013-06-061-1/+21
| | | | | | | | | | Change-Id: I0dc57ec047beb47b557b816162d619a5b2a54108 RTC: 64619 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/4600 Tested-by: Jenkins Server Reviewed-by: ADAM R. MUHLE <armuhle@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Inter-processor communications for multinodeDoug Gilbert2013-05-161-1/+2
| | | | | | | | RTC: 63128 Change-Id: Ica27c7f714bc8b874c9bccb663a32d3cfba37c5a Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/4193 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* AVP OCC Enable & Procedure RefreshAdam Muhle2013-05-151-0/+14
| | | | | | | | | | | | Refreshed OCC Procedures Enabled OCC in AVP mode for all processors Merged SLW and OCC to common HOMER image RTC:50987 Change-Id: I08d9128dfcb572367c145ee0296a48292584a480 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/4340 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* IBSCOM error path supportAdam Muhle2013-05-081-0/+11
| | | | | | | | | | | | | | | This commit updates IBSCOM to have error path support. It also updates the good-path test cases since there is limited good path support in simics. Full enablement will be done later. Change-Id: I5f9d66165db119473f606303a1026c8c71988785 RTC: 34743 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/3972 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Fixes for GCC 4.7Patrick Williams2013-04-171-2/+2
| | | | | | | Change-Id: Ief0b9202e13bd70cf0de84ca3cb20f5c6df4d3d8 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/4035 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Allow winkle of all threads for multi-drawer add.Patrick Williams2013-04-081-0/+24
| | | | | | | | | | | RTC: 63124 Change-Id: I1ad1d6bdf6a2848b686b25504fabddddb701d440 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/3813 Tested-by: Jenkins Server Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Michael Baiocchi <baiocchi@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Update Core Scratch Reg 6 with L3 vs Mainstore for FSP to queryMissy Connell2013-03-261-2/+3
| | | | | | | | | RTC:64829 Change-Id: Ic8e7983f6838b79c359c4cee2647b7676493cb1e Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/3564 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Add system-wide constants to specify the maximum number of procs possible in ↵Mark Wenning2013-02-281-0/+18
| | | | | | | | | | the system Change-Id: I6759b15c3f31f9e8ba219b0f9661a6c947eb94d6 RTC: 61361 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/3082 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Support for less than 8 threads per coreDan Crowell2013-02-082-3/+7
| | | | | | | | | | | Modified anywhere that we enable non-master threads to only touch the threads that we are told to update. Change-Id: I5b764e51d85a5c663ac76164e9465831ef0c167c RTC: 48808 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2877 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Remove support for P7.Patrick Williams2013-01-101-3/+1
| | | | | | | | | | Change-Id: I9186f42f85d6f6864b51b6935f5d4e5ca510ceb4 RTC: 39872 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2901 Tested-by: Jenkins Server Reviewed-by: ADAM R. MUHLE <armuhle@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* ptmgr lacked support for physical mapped addrs.Patrick Williams2012-12-171-0/+1
| | | | | | | | | | | | | | | | Added a new access type of BYPASS_HRMOR that the ptmgr will support when a PTE is added, so that blocks can support addresses which do not have the HRMOR applied. This is needed so that mm_linear_map will work correctly when HRMOR != 0. Change-Id: Ie4599d63a4454f425e0a0964b02fec7075c4401e RTC: 60665 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2733 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Switch Interrupt Presenter to get ICPBAR value from an attributeDoug Gilbert2012-12-143-88/+59
| | | | | | | | Change-Id: I5d95f3e3e2d803f07c7d8f3bf2d8ee522e1b4519 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2406 Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com> Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Lockless trace implementationPatrick Williams2012-12-142-30/+67
| | | | | | | | | RTC: 35396 Change-Id: I96ea0d95606f04abb4dc2b0470345ca475b53912 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2520 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Expand memory footprint to full 8MB cache.Patrick Williams2012-11-141-3/+11
| | | | | | | | | | | | | | If fake PNOR isn't being used, we can expand our memory space to the full 8MB cache. There will be follow up work with RTC: 49137 to support 4MB degraded caches for bring-up. Change-Id: I1248efa37965f39ebab62aae556349c34aa24b66 RTC: 47356 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2319 Tested-by: Jenkins Server Reviewed-by: Melissa J. Connell <missyc@us.ibm.com> Reviewed-by: ADAM R. MUHLE <armuhle@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Terminate Immediate on a shutdown and assertMissy Connell2012-11-091-0/+9
| | | | | | | | Change-Id: I37c8956afb11c69201f4936821cff5e153327780 RTC:43793 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2194 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Memory Leak task_endBill Schwartz2012-10-121-27/+31
| | | | | | | | Change-Id: Idb7a2d8d72a55f644efd0b2548eca5df5d062e6d RTC: 47491 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2011 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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