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* Adds some BCW safe delay for LRDIMMLi Meng2019-02-121-3/+5
| | | | | | | | | | | | | | | Change-Id: Ida8101737e39e040009fa6fb3c2a6b36b85bed6e Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69751 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com> Reviewed-by: Louis Stermole <stermole@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69857 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
* Update p9a.omi_init.scom.initfileBen Gass2019-02-121-2/+0
| | | | | | | | | | | | | | | | | Remove USTLCFG_ET_DELAY. It is setup elsewhere. Change-Id: I61b7261925d9c685074fc53bf2d06ffea7512683 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71178 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Benjamin Gass <bgass@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71183 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
* Implement exp_check_for_readyAndre Marin2019-02-122-0/+88
| | | | | | | | | | | | | | | | | | Change-Id: I800eb12f166b1af90ce0153e109630cc90c8b8e8 Original-Change-Id: I11e80e70c411ec0f5a1891e078b669f176658c34 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/61972 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Louis Stermole <stermole@us.ibm.com> Reviewed-by: RYAN P. KING <rpking@us.ibm.com> Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71232 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
* Move lpc_rw to a source filespashabk-in2019-02-121-1/+0
| | | | | | | | | | | | | | | | | | | | | | | Moving lpc_rw to its source file to avoid code duplication if more than one file includes lpc_utils.H. This is mainly required by SBE to use lpc_rw for virtual PNOR access. Change-Id: Ib9cbb0abd74806959e4b78f3be2ade23066780cd Original-Change-Id: I7de30bcbae932307e0b63d8d42ae6ce050753339 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/64296 Reviewed-by: Joachim Fenkes <fenkes@de.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71488 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
* p9_sbe_lpc_init: Skip final error check for Fleetwood GA1Joachim Fenkes2019-02-121-0/+2
| | | | | | | | | | | | | | | | | | As a temporary workaround for SW440738, ignore errors after LPC init so we don't halt the IPL for a benign LPC error on the alt master LPC. If the master LPC happens to have a problem we'll find out soon enough. Change-Id: I2d97efe6b49bfab83b834dde31ed878588339bd0 CQ: SW440738 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/65767 Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Dean Sanner <dsanner@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71487 Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
* Revert "lpc_init: Correct LPC host controller timeout value"Jennifer A. Stofer2019-02-121-1/+1
| | | | | | | | | | | | This reverts commit 77b6c7e6b123b32e37d07db91b0478a938a4d4a7. Change-Id: I95ffbf3404932c027093ea614ff979178292edeb Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/65113 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71486 Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
* lpc_init: Correct LPC host controller timeout valueJoachim Fenkes2019-02-121-1/+1
| | | | | | | | | | | | | | | | | | | | | | | The LPC host controller has an interesting way to decode the timeout value. The left 4 bits are used for the "short wait" timeout, while the entire 8 bits are used for the "long wait" timeout. If the "short wait" timeout is 0xF, it is taken to be infinite, causing the host controller to hang if the slave doesn't respond. Change the timeout value from 0xFE to 0xEF, the correct maximum value that is not decoded to be infinity. Change-Id: Iaf1a5119a87338c24b1e324d814ade0b30353360 CQ: SW442999 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/64850 Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Prachi Gupta <pragupta@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71485 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
* Introducing lpc utils source filespashabk-in2019-02-121-0/+1
| | | | | | | | | | | | | | | | | | Including the dummy file so that the platforms could mirror this file without breaking existing implementation. Will follow up with separation of lpc_rw into source file on top of mirrored commits Change-Id: Ic166f82015a37fd7dbb3c799d25677016f0cf33a Original-Change-Id: I4596af3a8740cb9593f135a0138e84299a5946ac Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/64298 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Reviewed-by: Joachim Fenkes <fenkes@de.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71484 Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
* p9_sbe_lpc_init: Improve resetJoachim Fenkes2019-02-121-12/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | The sequence to switch the LPC HC clock onto the nest clock temporarily was incorrect as it used the TP CPLT_CTRL0 register inasted of N3, so it never really switched the clocks during reset. Also, for good measure, keep the clock switched to the nest clock while we're resetting the LPC bus. (Bonus change: Decrease the sim delay cycles waiting for a command to complete.) Change-Id: I5d463977d21df4dfe30f3c6fc02ed12dd3d19ebe Original-Change-Id: I5e77fa056204639a96aad9c1eec4b7bc76d8e54b CQ: SW439536 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/63279 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Dean Sanner <dsanner@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71483 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
* p9_sbe_lpc_init: Add final check for errorsJoachim Fenkes2019-02-122-0/+13
| | | | | | | | | | | | | | | | | | | | Add an external FFDC collection procedure that will dump the LPC register spaces, make sure it is called if after LPC setup an OPB error is registered. Change-Id: Ia4b31ced6c322cb56a7d408f66ac07c459bf5d9a Original-Change-Id: I91046a6a3814ba94abd878f860e08f1b1338390b CQ: SW435433 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/57803 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71482 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
* p9_sbe_lpc_init: Fix timeout setupJoachim Fenkes2019-02-122-37/+27
| | | | | | | | | | | | | | | | | | | | | Factor LPC register access out into its own utility function, with added timeout for the ADU access and proper FFDC if the ADU times out. CQ: SW418354 Change-Id: Id08653f49ddb66442533bf93a7a2ce8f72135c11 Original-Change-Id: Ief05ccb022eeb1ec45d2f49f386fb58231966058 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54637 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Prachi Gupta <pragupta@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71481 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
* Update hardware procedure metadataAnusha Reddy Rangareddygari2019-02-122-2/+2
| | | | | | | | | | | | | | | | | | | | update the metadata to reflect that HWPs are product ready (HWP Level: 3) Change-Id: Icd3b792359777652362c77e48de00c07dba5b430 Original-Change-Id: I5a7380e9f34865b3e0ef7872d6338a840b08aa4a Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/46789 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: SRINIVAS V. POLISETTY <srinivan@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71480 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
* p9_sbe_lpc_init: Fix LPC bus LRESET for DD2Joachim Fenkes2019-02-122-64/+111
| | | | | | | | | | | | | | | | | | | | | | Change the order of operations so that first the LPC Master is reset, then the bus reset is driven with a proper delay. Previously the bus reset duration depended on the code path taken (DD1 vs. DD2) and was likely too short on DD2. Also extract the various parts of the sequence into individual functions to improve readability. Change-Id: I55cd750735ae21131c57c185ffc8a4fa1392b2dc Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/44416 Reviewed-by: Dean Sanner <dsanner@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71479 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
* Do the real LPC reset for DD2CHRISTINA L. GRAVES2019-02-122-0/+32
| | | | | | | | | | | | | | | Change-Id: I6a3089e7f33fd69b82dc23a5d2e4f495a1ce8b75 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35698 Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/35702 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
* Adding in LPC and OPB timeout valuesCHRISTINA L. GRAVES2019-02-121-1/+15
| | | | | | | | | | | | | | Change-Id: I5a15d272d4fd5a5953a2057a02eb4c54f1438108 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/33740 Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71478 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
* p9_sbe_lpc_init fix with GPIO resetCHRISTINA L. GRAVES2019-02-121-0/+32
| | | | | | | | | | | | | Change-Id: I103627369c600308e16e87c7b46184ed63c85794 Original-Change-Id: I019d7ba16b4e39b5cf140fe1461218736ce329f5 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32199 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Dean Sanner <dsanner@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71477 Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Tested-by: Christian R. Geddes <crgeddes@us.ibm.com>
* Fixing order of setting clock muxes & functional reset & removing sim only scomsCHRISTINA L. GRAVES2019-02-121-40/+5
| | | | | | | | | | | | | Change-Id: I6234bfa16add15f7d1cd1cecc47b0e4f05733846 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31845 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Dean Sanner <dsanner@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71476 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
* Adding in configurations for PNOR/LPC communicationCHRISTINA L. GRAVES2019-02-121-0/+40
| | | | | | | | | | | | | | | | | | Adjust default LPC base address offset in image (0000030000000000) Change-Id: I98b1ddf8fc9d515b65b20421e9e480ba4def8b9f Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/28570 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: CHRISTINA L. GRAVES <clgraves@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71475 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
* FAPI_INF entering and exiting message updatesAnusha Reddy Rangareddygari2019-02-121-2/+2
| | | | | | | | | | | | | | Change-Id: I2fe927821e9c940ffa249165486960228993b45a Original-Change-Id: Iac3116df68febfd228e7e0dc19c30526ac932906 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/27804 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: PARVATHI RACHAKONDA <prachako@in.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71474 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
* Adding in LPC functional reset to sbe_lpc_initCHRISTINA L. GRAVES2019-02-122-7/+6
| | | | | | | | | | | | | | | Change-Id: I2343dcaad657640258bcdf7954a9b5702a1061aa Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24885 Tested-by: Jenkins Server Tested-by: PPE CI Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71473 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
* Level 2 Procedure - p9_sbe_lpc_initSunil.Kumar2019-02-123-26/+68
| | | | | | | | | | | | | Change-Id: I55b70b8a2c1f6b4eccf3a75d09e6431c91e5872a Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/20801 Tested-by: Jenkins Server Reviewed-by: Soma Bhanutej <soma.bhanu@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71472 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
* L1 Rev istep 0.(6-8,11,13,14),1.1,2.(1-13,15,18-20,22,26,27,30,32,34) V2Abhishek Agarwal2019-02-122-0/+117
| | | | | | | | | | | | | | | Change-Id: I6dc2cb6bc8358901e260805d5f5e204616927981 Original-Change-Id: I3ea0eec08ce479057277524021bfce540d7b63ca Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/17755 Reviewed-by: Brian Silver <bsilver@us.ibm.com> Tested-by: Brian Silver <bsilver@us.ibm.com> Reviewed-by: SRINIVAS V. POLISETTY <srinivan@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71471 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
* Find cpu struct directly in doorbell interrupt handlerDean Sanner2019-02-122-4/+9
| | | | | | | | | | | | | | | | | | | | | | | This fix accesses the cpu struct based on current thread PIR instead of relying on an indirect pointer in the current task struct. It is attempting to eliminate a weak consistency/timing issue on the thread wakeups on the secondary cores. Given the way hostboot wakes up from the doorbell, there is a good chunck of code executed prior to the doorbell interrupt handler --> this also adds a msgsync instruction in the sreset (0x100) interrupt handler. Change-Id: I23db1d786a8a8f0637a890e2ac5de6197ee9cabb Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71582 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add more agressive memory allocation callsDan Crowell2019-02-127-8/+43
| | | | | | | | | | | | | | | | | | | | | If we hit a situation where we can't allocate a page of memory, this will force a coalesce (defrag) a few times and then eventually trigger other memory reclamation actions. Also tweaked a few spots in the kernel to enhance debug: - add more stops to look at errors (HB_BREAK_ON_ERROR) - add more backtrace calls - add a new debug flag to count the extra coalesce calls Change-Id: Ibac7079a44a12dc61e41304de4c4ae518c206d13 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71653 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add missing implied include to populate_hbruntime.HDan Crowell2019-02-121-1/+3
| | | | | | | | | | | | | Discovered some missing includes while doing some creative compiles. Change-Id: Ia77addd7bc8d0b10db1ed63a7e598c0f4892c0c8 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71654 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Disable NVDIMM Trigger Before Draminit and Deassert DDR_RESETn During MPIPLTsung Yeung2019-02-1213-388/+881
| | | | | | | | | | | | | | | | | | | | - Per the JEDEC spec, DDR_RESETn is masked from the DRAM when the NVDIMM is armed. This could cause the training to fail if the trigger is not disabled before training. Two scenarios where this can happen are warm reboot and cold boot before the backup power module can deplete the charge - Deassert DDR_RESETn in MPIPL before triggering the restore. - Fix the config flag to enable NVDIMM code Change-Id: I9d25c2f653fc54d379f0dbab49218f5b59a407a0 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70035 Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* PRD: Adjust row repair capture data sizeCaleb Palmer2019-02-123-1/+19
| | | | | | | | | | | | | Change-Id: I2a9100e927fd8a1c39b25eb8662aeda2d2c31a4e CQ: SW454322 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71522 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Brian J. Stegmiller <bjs@us.ibm.com> Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71608 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
* Add additional 2133 and 1866 ps values for spd parsing.Evan Lojewski2019-02-111-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On some RAM modules, unexpected ps values are reported that are off by 1 from the expected JEDEC value. This patch adds additional values to the lookup table, appearing second to ensure that the inverse lookup always find the correct value first. This change was tested with the M393A1G40DB0-CPB RAM module which was rejected by the previous code due to the time_in_ps being 938 instead of the previously expected value of 937. Memtester was run with the resulting configuration and shows no errors: / # /usr/sbin/memtester 6G 4 memtester version 4.3.0 (64-bit) Copyright (C) 2001-2012 Charles Cazabon. Licensed under the GNU General Public License version 2 (only). pagesize is 65536 pagesizemask is 0xffffffffffff0000 want 6144MB (6442450944 bytes) got 6144MB (6442450944 bytes), trying mlock ...locked. Loop 1/4: Stuck Address : ok Random Value : ok Compare XOR : ok Compare SUB : ok Compare MUL : ok Compare DIV : ok Compare OR : ok Compare AND : ok Sequential Increment: ok Solid Bits : ok Block Sequential : ok Checkerboard : ok Bit Spread : ok Bit Flip : ok Walking Ones : ok Walking Zeroes : ok 8-bit Writes : ok 16-bit Writes : ok Change-Id: Ia9dfe37ef7e62219aaa4a8bb4e8184f5a29d4b06 Signed-off-by: Evan Lojewski <github@meklort.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70971 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com> Reviewed-by: Louis Stermole <stermole@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71047 Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Skip NPU scominit until ARTMISS register gets updatedChristian Geddes2019-02-111-1/+5
| | | | | | | | | | | | | | | | This ARTMISS register that gets updated during npu_scominit changed for axone. If we run this step we take errors so we will skip it in the Axone flow till we get some updates. Change-Id: I4f1607ab2147692eef864ce0bf3ee73c43ba8bb3 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71547 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add call to p9a_ocmb_enable to istep 10.4Christian Geddes2019-02-114-6/+104
| | | | | | | | | | | | | | | | Per IPL Flow doc for P9 Axone, p9a_ocmb_enable needs to be called on all processors during istep 10.4 RTC: 195553 Change-Id: I50fa98959008cccfe0620c8bc6e62f33ee91c135 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71229 Reviewed-by: Roland Veloz <rveloz@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Update OBUS PLL Bucket attribute getter with Axone EC levelsChristian Geddes2019-02-111-1/+17
| | | | | | | | | | | | | | | This function needed to be updated to handle new Axone EC 1.0 and Axone EC 1.1 OBUS PLL Bucket values. Change-Id: I1be2803e9440d8e355964d75710134f240ec41e8 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71222 Reviewed-by: Roland Veloz <rveloz@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Update simics to latest build for Axone simics bringupChristian Geddes2019-02-112-4/+4
| | | | | | | | | | | | | | | | | Axone and beyond use the src/build/citest/etc/simbuild file to declare which version of released simics we want to use. This will grab a number of simics improvements, highlights are fixes to the i2c_mux logic and general IPL speed improvements. Change-Id: I9294d2adf33a8584f5eb1a381a4ba50b932c5ee5 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71355 Reviewed-by: Roland Veloz <rveloz@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Make sure FIRDATA is filled in axone pnor, remove UVBWLIST sectionChristian Geddes2019-02-111-2/+2
| | | | | | | | | | | | There was a bug where we were not filling FIRDATA in with correct ECC. Also the new UVBWLIST section is going away so might as well remove it from Axone code now as it is not being used at all Change-Id: Ieb7618ac2c47df88047f124216c3d7cbe0fc05c8 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71060 Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Fix 1-rank row repair case in p9c draminit_training and draminit_mcLouis Stermole2019-02-107-16/+312
| | | | | | | | | | | | | | | | | Change-Id: I91a83bbee82a01c5c065974afaf9e4291fa071f8 CQ:SW450686 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69536 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Dev-Ready: Louis Stermole <stermole@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com> Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69568 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
* Use virtual address buffer to read mvpd ringsCorey Swenson2019-02-105-16/+72
| | | | | | | | | | | | | | | | | | | | | Fragmented memory may prevent mallocing multiple pages when getting mvpd rings in xip_customize. Pass in and use a previously allocated virtual memory buffer instead. Change-Id: I43f70aab7787d2849dca5add6d4a777b5f49b62e CQ:SW451916 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70937 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Sumit Kumar <sumit_kumar@in.ibm.com> Reviewed-by: Claus M. Olsen <cmolsen@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70944 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
* Add ATTR_MSS_MEM_MVPD_FWMS to generic xml and fix accessorLouis Stermole2019-02-101-0/+14
| | | | | | | | | | | | | | Change-Id: Ia792b99afd94cf216e3036167dcd849e8936bdf0 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69998 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com> Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71353 Reviewed-by: Roland Veloz <rveloz@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
* Add p9a_mss_volt procedureLouis Stermole2019-02-101-0/+45
| | | | | | | | | | | | | | | | Change-Id: Ib825eaeab9bdef2c4d746224780502afac008aa1 Original-Change-Id: I893685b365f6c815653717d4cc8149f2ea7acb94 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/68412 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com> Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71352 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
* Add generic attribute accessor script and makefilesLouis Stermole2019-02-101-0/+4
| | | | | | | | | | | | | | | | | Added makefiles for generic and ocmb/explorer attrs Also add mssAccessorName tag to explorer attrs Change-Id: I738c44e9bdf1999eb2746e79d4849683204ae567 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69017 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Louis Stermole <stermole@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69571 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
* Update setup_fw_boot_config() to read out actual values from attributesAlvin Wang2019-02-101-14/+0
| | | | | | | | | | | | | | | Change-Id: I9a9c1c3db2d4c87fe8c4d5453fcf08b99345ad57 Original-Change-Id: I2574f01fceb79fb0d3234010581aab92d48ce409 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/68248 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Louis Stermole <stermole@us.ibm.com> Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com> Reviewed-by: JEREMY R. NEATON <jrneaton@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71351 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
* Correct invalid HUID and chiplet id values for NPU targetsMatt Raybuck2019-02-081-2/+6
| | | | | | | | | | | | | | | | | | There was a bug for NPU targets would incorrectly have a HUID with a value indicating that they were of target type MC instead of target type NPU. This commit corrects that issue and gives the correct chiplet id for NPU targets. Change-Id: I543e80e1c0da7a02bef61f9657270684abc6e7c7 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71159 Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-by: Ilya Smirnov <ismirno@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Updates to processMrw.pl to fix erroneous chiplet idsMatt Raybuck2019-02-081-8/+176
| | | | | | | | | | | | | | | | | | In some mrw .xml files there are bugs where the some unit's chiplet ids were set to an incorrect value. This update to processMrw.pl will override whatever value is in that xml and correct it to the appropriate value for hostboot consumption. Change-Id: I88fbeb893bbbbbd6e0a88adea3041df822c6a70d Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70742 Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-by: Ilya Smirnov <ismirno@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* HBBL LPC Error CheckingBill Hoffa2019-02-088-27/+73
| | | | | | | | | | | | | | | | | | - To avoid IPL delays, the LPC status register should be checked prior to loading the entire PNOR image (done via LPC). If an error condition occurs, HBBL should fail out. Change-Id: I5d716213f468e28191db794bf3e5480af547b26e CQ: SW446254 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/68442 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* NVDIMM SBE Support to Trigger CSAVE - xip_customizeTsung Yeung2019-02-081-2/+3
| | | | | | | | | | | | | | | | | | | | | -Separate commit for p9_xip_customize.C due to prereqs for change I5fc9ead249dda0062ca3ac5237113688a22eb50c Change-Id: Id7873ea8127af58ea93be587a041a227aa163fe1 CQ:SW452306 CMVC-Prereq:1075342 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70253 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: RAJA DAS <rajadas2@in.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Reviewed-by: Sunil Kumar <skumar8j@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70274 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* VDM(Part 1): Introduced new members in CME and CPMR image headersPrem Shanker Jha2019-02-081-1/+9
| | | | | | | | | | | | | | | | | | | | | | commit introduces new members in CPMR and CME image headers. These fields will be utilised in subsequent commits to facilitate and execute downloading of LPSPB customized for a quad. Key_Cronus_Test=PM_REGRESS Change-Id: I9af8f2e6c2570a4bb0ea6a95a458b30b7e25273e Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69964 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69969 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Adds blank files for EFD APIStephen Glancy2019-02-075-0/+120
| | | | | | | | | | | | | | Change-Id: I760c6fe1c69d36352c73a93e59f5d58bd000b8fe Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71101 Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com> Reviewed-by: Louis Stermole <stermole@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71380 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
* Add empty explorer "check_for_ready" procedure filesAndre Marin2019-02-072-0/+48
| | | | | | | | | | | | | | | Change-Id: I87ee5e42c3b05d67bdf3db6f21589c74ad78ce43 Original-Change-Id: Id15269f534757f4df2a3b47f008293572f128c17 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/61971 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com> Reviewed-by: Louis Stermole <stermole@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71231 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
* Unset CONFIG_FILE env var if in standalone environmentChristian Geddes2019-02-071-3/+3
| | | | | | | | | | | | There was a bug where we were setting it to nothing rather than unsetting it, we think it might be causing other issues. Change-Id: I06df6e9ed9f84414a5ee8765b255574952b281e9 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71530 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Move libconsole into base imageDan Crowell2019-02-071-1/+1
| | | | | | | | | | | | | | | If the console module is pageable (part of extended image) it cannot be used anywhere that is involved in the code load path, e.g. ipmirp, pnorrp. This change will move libconsole into the base image where it can be assured to always be in memory. Change-Id: I8970b6147fdf19ce69a741112c1a41317b33c039 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71308 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Adds explorer OMI training codeStephen Glancy2019-02-062-3/+31
| | | | | | | | | | | | | | | | Change-Id: I76ed3dbcd05b9cefb899cea1c424fa2a30846082 Original-Change-Id: Ic4fcd226eea7478ffff6cacb830f8e1e83e6f247 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/64919 Reviewed-by: Louis Stermole <stermole@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: RYAN P. KING <rpking@us.ibm.com> Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71350 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
* Adds Explorer OMI setup - step 12.8aStephen Glancy2019-02-066-0/+429
| | | | | | | | | | | | | | | Change-Id: I4e448a7ecc04b6f169b1688c7e8ffde2451f5f9e Original-Change-Id: Ic3a15e25faf465c4beb2b722c79c12d4a79ae33b Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/63492 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com> Reviewed-by: Louis Stermole <stermole@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71349 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
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