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* Add dp16 io tx dll/vreg configBrian Silver2016-04-014-89/+237
* Add phy control error checking, clean up dp16, apbBrian Silver2016-04-017-296/+559
* Add vpd_decode, remove fake_vpd scaffoldBrian Silver2016-04-011-0/+1657
* Add mss throttle files L1Andre Marin2016-04-011-11/+11
* Change procedure include pathsBrian Silver2016-04-011-5/+5
* Add ability to disable port fails for trainingBrian Silver2016-04-011-0/+24
* Change address translation registers to account for MCA odd portsBrian Silver2016-04-011-3/+11
* Add initial FIR checking for APB interfaceBrian Silver2016-04-012-0/+395
* Add physical/mcbist address classBrian Silver2016-04-011-0/+282
* Change DIMM_SIZE from 8 bits to 32 bitsBrian Silver2016-04-012-2/+2
* Modify spd_decoder, eff_config, unit tests. Modify dependent filesAndre Marin2016-04-019-2853/+5036
* Add support for checking PC errors on initial calBrian Silver2016-04-011-1/+30
* Add eff_memory_size APIBrian Silver2016-04-012-0/+113
* Fix mcbist control register; was config registerBrian Silver2016-04-011-1/+1
* Change WC to follow the new register block patternBrian Silver2016-04-014-190/+445
* Change read control API to match desired design, add design docBrian Silver2016-04-012-11/+32
* Change WRCLK_PR so that we don't trash the sim initsBrian Silver2016-04-011-2/+4
* Change RC_CONFIG2 for sim settings (BL8)Brian Silver2016-04-011-22/+23
* Add mcbist L2 functionBrian Silver2016-04-019-84/+1557
* Fixed doxygen errors and typosJacob Harvey2016-04-0131-529/+526
* Added mss_spd_ut, edited mss_utils_ut, fixed ecmd_facade & return_codeAndre Marin2016-04-011-13/+15
* Add dump_regs for PHY registersBrian Silver2016-04-015-198/+1390
* Add dump_regs for MCBrian Silver2016-04-012-0/+364
* Change polling to include probes, add granular training controlsBrian Silver2016-04-015-31/+83
* Add PHY RC class, update setup cal for 2D wc/rcBrian Silver2016-04-013-68/+604
* Changes related to model 31, attr changes for sim latenciesBrian Silver2016-04-012-4/+45
* Added mss::get/putScomBrian Silver2016-04-0111-80/+194
* Initial commit of memory subsystemBrian Silver2016-04-0142-0/+13042
* PRD: bad links generated for error log plugin codeZane Shelley2016-04-011-1/+1
* PCIE phase1/phase2 initialization procedure.Gou Peng Fei2016-04-011-6/+259
* Add cstdint.H as part of C++11 supportDan Crowell2016-04-011-0/+71
* PCIE Level 1 proceduresJoe McGill2016-04-011-0/+500
* PRD: Modified makefiles to remove all P8 referencesZane Shelley2016-04-0110-62/+235
* PRD: Removed remaining P8 codeZane Shelley2016-04-0113-27/+53
* PRD: Partially flattened framework directoriesZane Shelley2016-04-019-63/+98
* Handle non-platInit temporary attributesDan Crowell2016-03-311-2/+9
* Make SBE attributes writeableDan Crowell2016-03-311-0/+10
* ifCompiler -- initfile HWP generation code to match specificationJoe McGill2016-03-311-108/+14
* L2 HWPs - Fix TODOs in p9_mss_eff_grouping HWPThi Tran2016-03-311-20/+0
* Update xbus initfile procedures with latest initCompiler changesPrachi Gupta2016-03-312-1375/+2406
* Add I/O Xbus InitfilesChris Steffen2016-03-316-0/+13337
* Support 2nd PROC+update DIMMs on Nimbus model, support FAPI_POS attributecrgeddes2016-03-315-484/+7307
* Enable startDeadmanLoop in host_activate_master.Ccrgeddes2016-03-313-25/+5
* L2 - p9_mss_eff_grouping HWP (p9_opt_memmap)Thi Tran2016-03-311-14/+37
* Trustedboot attribute configuration bit for TPM Required.Chris Engel2016-03-312-0/+16
* More attribute updates for HWP compilesDan Crowell2016-03-311-1/+1
* Merge additional attributes from p9_pcie_attributes.xmlMatt Derksen2016-03-302-65/+1066
* P9 PSIHB Base Interrupt SupportBill Hoffa2016-03-3020-976/+1166
* Method to support initial temporary defaults for attributesMarty Gloff2016-03-307-30/+930
* BMC istep controlDean Sanner2016-03-3013-445/+386
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