diff options
Diffstat (limited to 'src/usr/hwpf/hwp/initfiles')
4 files changed, 9 insertions, 12 deletions
diff --git a/src/usr/hwpf/hwp/initfiles/cen.dmi.custom.scom.initfile b/src/usr/hwpf/hwp/initfiles/cen.dmi.custom.scom.initfile index fc6d657bf..a15860f49 100644 --- a/src/usr/hwpf/hwp/initfiles/cen.dmi.custom.scom.initfile +++ b/src/usr/hwpf/hwp/initfiles/cen.dmi.custom.scom.initfile @@ -1,8 +1,9 @@ -#-- $Id: cen.dmi.custom.scom.initfile,v 1.14 2013/09/17 22:29:16 jgrell Exp $ +#-- $Id: cen.dmi.custom.scom.initfile,v 1.15 2013/09/24 20:22:33 jgrell Exp $ #-- CHANGE HISTORY: #-------------------------------------------------------------------------------- #-- Version:|Author: | Date: | Comment: #-- --------|--------|--------|-------------------------------------------------- +#-- 1.15|jgrell |09/24/13|Changed "1" expression to "any" #-- 1.13|jgrell |09/17/13|Added DD2 specific inits #-- 1.11|jgrell |09/12/13|Re-added "Override" scoms #-- 1.10|jgrell |08/21/13|Removed "Override" scoms @@ -322,7 +323,6 @@ scom_data; scom 0x800.0b(rx_rc_step_cntl_pg)(rx_grp0)(lane_na).0x(cn_gcr_addr) { bits, scom_data, expr; -#@thi - fix compiler error rx_rc_enable_dfe_h1_cal, 0b0, any; #ATTR_CHIP_EC_FEATURE_RECAL_DFE_ENABLE==0 || ATTR_DMI_DFE_OVERRIDE==1; rx_rc_enable_ddc, 0b0, any; #ATTR_CHIP_EC_FEATURE_RECAL_DDC_ENABLE==0; rx_rc_enable_ctle_cal, 0b0, any; #ATTR_CHIP_EC_FEATURE_RECAL_CTLE_ENABLE==0; diff --git a/src/usr/hwpf/hwp/initfiles/p8.abus.custom.scom.initfile b/src/usr/hwpf/hwp/initfiles/p8.abus.custom.scom.initfile index 80ef4f1e1..d1eaecabd 100644 --- a/src/usr/hwpf/hwp/initfiles/p8.abus.custom.scom.initfile +++ b/src/usr/hwpf/hwp/initfiles/p8.abus.custom.scom.initfile @@ -1,8 +1,9 @@ -#-- $Id: p8.abus.custom.scom.initfile,v 1.7 2013/09/17 22:28:51 jgrell Exp $ +#-- $Id: p8.abus.custom.scom.initfile,v 1.8 2013/09/24 20:20:19 jgrell Exp $ #-- CHANGE HISTORY: #-------------------------------------------------------------------------------- #-- Version:|Author: | Date: | Comment: #-- --------|--------|--------|-------------------------------------------------- +#-- 1.8 |jgrell |09/24/13|Changed "1" expression to "any" #-- 1.6 |jgrell |09/17/13|Added DD2 specific inits #-- 1.4 |jgrell |06/18/13|Added Venice specific PRBS tap IDs due to common initfile #-- 1.3 |thomsen |04/30/13|Added TGT1. to ATTR_CHIP_EC* attribute instances to reference a chip target rather than a chiplet target @@ -301,7 +302,6 @@ scom 0x800.0b(tx_mode_pg)(tx_grp0)(lane_na).0x(abus_gcr_addr) { scom 0x800.0b(rx_rc_step_cntl_pg)(rx_grp0)(lane_na).0x(abus_gcr_addr) { bits, scom_data, expr; -#@thi - fix compiler error rx_rc_enable_dfe_h1_cal, 0b0, any; #temp for DD2 testing. Previously --> TGT1.ATTR_CHIP_EC_FEATURE_RECAL_DFE_ENABLE==0; rx_rc_enable_ddc, 0b0, any; #temp for DD2 testing. Previously --> TGT1.ATTR_CHIP_EC_FEATURE_RECAL_DDC_ENABLE==0; rx_rc_enable_ctle_cal, 0b0, any; #temp for DD2 testing. Previously --> TGT1.ATTR_CHIP_EC_FEATURE_RECAL_CTLE_ENABLE==0; diff --git a/src/usr/hwpf/hwp/initfiles/p8.abus.scom.initfile b/src/usr/hwpf/hwp/initfiles/p8.abus.scom.initfile index 5704c7c6e..36f75078a 100644 --- a/src/usr/hwpf/hwp/initfiles/p8.abus.scom.initfile +++ b/src/usr/hwpf/hwp/initfiles/p8.abus.scom.initfile @@ -1,4 +1,4 @@ -#-- $Id: p8.abus.scom.initfile,v 1.15 2013/08/21 18:35:16 jgrell Exp $ +#-- $Id: p8.abus.scom.initfile,v 1.16 2013/09/24 20:20:35 jgrell Exp $ #################################################################### @@ -7,13 +7,14 @@ ## Based on SETUP_ID_MODE A_BUS_TR_HW ## from ../../logic/mesa_sim/fusion/run/IODUV_ABUS_WRAP.IODUV_ABUS_WRAP.figdb ## -## Created on Wed Aug 21 12:18:29 CDT 2013, by jgrell +## Created on Tue Sep 24 11:20:21 CDT 2013, by jgrell #################################################################### ## -- CHANGE HISTORY: ## -------------------------------------------------------------------------------- ## -- VersionID: |Author: | Date: | Comment: ## -- -----------|---------|--------|------------------------------------------------- + ## -- jgr13092400| jgr |09-24-13| Fixed tx_zcal inits scom address ## -- jgr13082100| jgr |08-21-13| Added tx_zcal inits so they can be removed from scan ## -- jfg13072400| jfg |07-24-13| HW253558: change pgooddly to MAX from lab feedback ## -- mbs13071200| mbs |07-12-13| Updates for HW239870 and HW258990 @@ -65,16 +66,12 @@ define def_is_slave = (prim_id > conn_id); #BUSCTL.BUS_CTL_REGS.TX_IMPCAL_P_4X_PB -#@thi - hack -#scom 0x800F1C6008010C3F { scom 0x800F1C0008010C3F { bits, scom_data, expr; tx_zcal_p_4x, 0b00100, any; } #BUSCTL.BUS_CTL_REGS.TX_IMPCAL_SWO2_PB -#@thi - hack -#scom 0x800F2C6008010C3F { scom 0x800F2C0008010C3F { bits, scom_data, expr; tx_zcal_sm_max_val, 0b1000110, any; diff --git a/src/usr/hwpf/hwp/initfiles/p8.dmi.custom.scom.initfile b/src/usr/hwpf/hwp/initfiles/p8.dmi.custom.scom.initfile index cb3b8aeeb..b4bf58914 100644 --- a/src/usr/hwpf/hwp/initfiles/p8.dmi.custom.scom.initfile +++ b/src/usr/hwpf/hwp/initfiles/p8.dmi.custom.scom.initfile @@ -1,8 +1,9 @@ -#-- $Id: p8.dmi.custom.scom.initfile,v 1.16 2013/09/17 22:28:51 jgrell Exp $ +#-- $Id: p8.dmi.custom.scom.initfile,v 1.17 2013/09/24 20:20:35 jgrell Exp $ #-- CHANGE HISTORY: #-------------------------------------------------------------------------------- #-- Version:|Author: | Date: | Comment: #-- --------|--------|--------|-------------------------------------------------- +#-- 1.17|jgrell |09/24/13|Changed "1" expression to "any" #-- 1.15|jgrell |09/17/13|Added DD2 specific inits #-- 1.13|jgrell |09/12/13|Re-added "Override" settings #-- 1.9 |thomsen |04/30/13|Added TGT1. to ATTR_CHIP_EC* attribute instances to reference a chip target rather than a chiplet target @@ -265,7 +266,6 @@ scom 0x800.0b(tx_mode_pg)(tx_grp3)(lane_na).0x(dmi0_gcr_addr) { scom 0x800.0b(rx_rc_step_cntl_pg)(rx_grp3)(lane_na).0x(dmi0_gcr_addr) { bits, scom_data, expr; -#@thi - fix compiler error rx_rc_enable_dfe_h1_cal, 0b0, any; #temp for DD2 testing. Previously --> TGT1.ATTR_CHIP_EC_FEATURE_RECAL_DFE_ENABLE==0 || ATTR_DMI_DFE_OVERRIDE==1; rx_rc_enable_ddc, 0b0, any; #temp for DD2 testing. Previously --> TGT1.ATTR_CHIP_EC_FEATURE_RECAL_DDC_ENABLE==0; rx_rc_enable_ctle_cal, 0b0, any; #temp for DD2 testing. Previously --> TGT1.ATTR_CHIP_EC_FEATURE_RECAL_CTLE_ENABLE==0; |
