diff options
| -rw-r--r-- | src/build/citest/etc/bbuild | 2 | ||||
| -rw-r--r-- | src/include/kernel/cpumgr.H | 3 | ||||
| -rw-r--r-- | src/kernel/intmsghandler.C | 2 | ||||
| -rw-r--r-- | src/kernel/misc.C | 59 | ||||
| -rw-r--r-- | src/usr/intr/intrrp.C | 18 | ||||
| -rw-r--r-- | src/usr/isteps/istep06/thread_activate/thread_activate.C | 22 |
6 files changed, 46 insertions, 60 deletions
diff --git a/src/build/citest/etc/bbuild b/src/build/citest/etc/bbuild index 5de7dd09d..63ca6f030 100644 --- a/src/build/citest/etc/bbuild +++ b/src/build/citest/etc/bbuild @@ -1 +1 @@ -/esw/fips910/Builds/b0509b_1620.910 +/esw/fips910/Builds/b0516a_1622.910 diff --git a/src/include/kernel/cpumgr.H b/src/include/kernel/cpumgr.H index 25bb794bf..2c3449fa0 100644 --- a/src/include/kernel/cpumgr.H +++ b/src/include/kernel/cpumgr.H @@ -165,6 +165,7 @@ class CpuManager /** Desired value for LPCR after wakeup. * + * bit 48 - Wake-up from hyp doorbell * bit 49 - Wake-up from external interrupt. * bit 50 - Wake-up from decrementer. * bit 51 - Wake-up from machine check. @@ -172,7 +173,7 @@ class CpuManager * bit 61 - LPES(1) = 0 (P8 RFC02204 forces to 0) * bit 62 - HVICE - Hypervisor Virt Interrupt Conditionally Enable */ - static const uint64_t WAKEUP_LPCR_VALUE = 0x000000000000700A; + static const uint64_t WAKEUP_LPCR_VALUE = 0x000000000000F00A; /** Desired value for RPR after wakeup. * diff --git a/src/kernel/intmsghandler.C b/src/kernel/intmsghandler.C index 301be0f05..ea055ceed 100644 --- a/src/kernel/intmsghandler.C +++ b/src/kernel/intmsghandler.C @@ -171,8 +171,6 @@ void InterruptMsgHdlr::addCpuCore(uint64_t i_pir) cv_instance->sendMessage(MSG_INTR_ADD_CPU, (void*)pir_key,(void *)i_pir,t); cv_instance->iv_lock.unlock(); - printkd("InterruptMsgHdlr::addCpuCore MSG_INTR_ADD_CPU message " - "sent for pir: %lx\n", i_pir); } } diff --git a/src/kernel/misc.C b/src/kernel/misc.C index 3b25ae705..4343fe9c8 100644 --- a/src/kernel/misc.C +++ b/src/kernel/misc.C @@ -182,7 +182,6 @@ namespace KernelMisc KernelMemState::MEM_CONTAINED_NR, KernelMemState::NO_MEM); - // add this nodes cpu_count to the system cpu_count __sync_add_and_fetch(&(p_spda->cpu_count), CpuManager::getCpuCount()); @@ -269,6 +268,7 @@ namespace KernelMisc // Tell SIMICS we expect more threads (one more core) // to appear after doing the 'stop' instruction. MAGIC_INSTRUCTION(MAGIC_SIMICS_FUSEDCOREWAKE); + } // end if fused core mode } @@ -277,8 +277,7 @@ namespace KernelMisc void WinkleCore::activeMainWork() { cpu_t* cpu = CpuManager::getCurrentCPU(); - ssize_t l_numThreads = CpuManager::getThreadCount(); - printk("%d", static_cast<int>(cpu->cpu & (l_numThreads-1))); + printk("%d.", static_cast<int>(cpu->cpu)); // Return current task to run-queue so it isn't lost. cpu->scheduler->returnRunnable(); @@ -301,6 +300,7 @@ namespace KernelMisc // Set register to indicate we want a 'stop 15' to occur (state loss) uint64_t l_psscr_saved = getPSSCR(); setPSSCR( 0x00000000003F00FF ); + // Execute winkle. kernel_execute_stop(saveArea); @@ -311,6 +311,22 @@ namespace KernelMisc CpuManager::activateCPU(cpu); VmmManager::init_slb(); + if(cpu->master) + { + // NOTE: The cpu_t structures for theads 1:3 were created + // during init (CpuManager::init). + // Start with a base PIR of thread 0 + 1 (Thread 1) as thread 0 + // doesn't need to be woken up as it is already running. + uint64_t l_pir = getPIR() + 1; + for(size_t i = 0; i < CpuManager::getThreadCount()-1; i++) + { + // NOTE: The deferred work container verifies master core + // threads 1-3 wake up so a direct doorbell can be sent. For + // threads on other cores send_doorbell_wakeup() is used. + doorbell_send(l_pir + i); + } + } + // Select a new task if not the master CPU. Master CPU will resume // the code that called cpu_master_winkle(). if (!cpu->master) @@ -340,43 +356,6 @@ namespace KernelMisc //Issue sbe master workaround InterruptMsgHdlr::issueSbeMboxWA(); - - // NOTE: The cpu_t structures for theads 1:3 were created - // during init (CpuManager::init). - // - - #ifdef HOSTBOOT_REAL_WINKLE - // @todo- RTC 141924 Start the other threads 1:3 in a new manner - // SBE won't start them and we can't use normal instruction start. - // Maybe something like: sendIPI(..) or addCpuCore(..) - // Need interrupt code in place for this. - - - #else - // get other 3 threads going in SIMICs for now - MAGIC_INSTRUCTION(MAGIC_WAKE_OTHER_THREADS); - #endif - - if (true == iv_fusedCores) - { - // If using FUSED cores, we need to essentially - // treat this as a new core appearing. - - #ifdef HOSTBOOT_REAL_WINKLE - ssize_t l_numThreads = CpuManager::getThreadCount(); - cpu_t* l_cpuPtr = CpuManager::getCurrentCPU(); - cpuid_t l_startPir = l_cpuPtr->cpu & (~(l_numThreads - 1)); - - // New core should have threads just past current ones - CpuManager::startCore(l_startPir + l_numThreads, - 0xF000000000000000); // all 4 threads - #else - // get new core going in SIMICS - MAGIC_INSTRUCTION(MAGIC_WAKE_FUSED_THREADS); - #endif - - } // end if fused core mode - } void WinkleCore::nonactiveMainWork() diff --git a/src/usr/intr/intrrp.C b/src/usr/intr/intrrp.C index 91bca3c11..4df934758 100644 --- a/src/usr/intr/intrrp.C +++ b/src/usr/intr/intrrp.C @@ -182,7 +182,7 @@ errlHndl_t IntrRp::_init() //Set value for enabled threads uint64_t l_en_threads = get_enabled_threads(); - TRACDCOMP(g_trac_intr, "IntrRp::_init() Threads enabled:" + TRACFCOMP(g_trac_intr, "IntrRp::_init() Threads enabled:" " %lx", l_en_threads); } while(0); @@ -198,7 +198,7 @@ void IntrRp::acknowledgeInterrupt() l_ack_int_ptr += ACK_HYPERVISOR_INT_REG_OFFSET; uint16_t l_ackRead = *l_ack_int_ptr; - TRACDCOMP(g_trac_intr, "IntrRp::acknowledgeInterrupt(), read result: %16x", l_ackRead); + TRACFCOMP(g_trac_intr, "IntrRp::acknowledgeInterrupt(), read result: %16x", l_ackRead); } errlHndl_t IntrRp::resetIntUnit() @@ -404,12 +404,12 @@ void IntrRp::msgHandler() //Check if LSI-Based Interrupt if ((ackResponse & LSI_INTERRUPT) == LSI_INTERRUPT) { - TRACDCOMP(g_trac_intr, "IntrRp::msgHandler() " + TRACFCOMP(g_trac_intr, "IntrRp::msgHandler() " "- LSI Interrupt Detected"); //Read LSI Interrupt Status register PSIHB_SW_INTERFACES_t * l_psihb_ptr = iv_psiHbBaseAddr; uint64_t lsiIntStatus = l_psihb_ptr->lsiintstatus; - TRACDCOMP(g_trac_intr, "IntrRp::msgHandler() " + TRACFCOMP(g_trac_intr, "IntrRp::msgHandler() " "lsiIntStatus 0x%016lx", lsiIntStatus); LSIvalue_t l_intrType = static_cast<LSIvalue_t> (__builtin_clzl(lsiIntStatus)); @@ -424,7 +424,7 @@ void IntrRp::msgHandler() uint64_t l_data0 = (l_xirr_pir & 0xFFFFFFFF); PIR_t pir = static_cast<PIR_t>(l_data0); - TRACDCOMP(g_trac_intr, + TRACFCOMP(g_trac_intr, "External Interrupt received. XIRR=%x, PIR=%x", xirr,pir.word); //An external interrupt comes from two paths @@ -468,7 +468,7 @@ void IntrRp::msgHandler() } else if (type == LSI_PSU) { - TRACDCOMP(g_trac_intr, "PSU Interrupt Detected"); + TRACFCOMP(g_trac_intr, "PSU Interrupt Detected"); handlePsuInterrupt(type); } else // no queue registered for this interrupt type @@ -601,7 +601,7 @@ void IntrRp::msgHandler() break; case MSG_INTR_UNREGISTER_MSGQ: { - TRACDCOMP(g_trac_intr, + TRACFCOMP(g_trac_intr, "INTR remove registration of interrupt type = 0x%lx", msg->data[0]); LSIvalue_t l_type = static_cast<LSIvalue_t>(msg->data[0]); @@ -710,7 +710,7 @@ void IntrRp::msgHandler() } else // Ended successfully. { - TRACDCOMP(g_trac_intr, + TRACFCOMP(g_trac_intr, INFO_MRK "Cpu wakeup completed on %x", pir.word); // Tell child thread to exit. @@ -1063,7 +1063,7 @@ errlHndl_t IntrRp::handlePsuInterrupt(ext_intr_t i_type) //Issue standard EOI for the PSU Interupt uint64_t intSource = i_type; - TRACDCOMP(g_trac_intr, "Sending PSU EOI"); + TRACFCOMP(g_trac_intr, "Sending PSU EOI"); sendEOI(intSource); } while(0); diff --git a/src/usr/isteps/istep06/thread_activate/thread_activate.C b/src/usr/isteps/istep06/thread_activate/thread_activate.C index 43ff4c1aa..22b90568d 100644 --- a/src/usr/isteps/istep06/thread_activate/thread_activate.C +++ b/src/usr/isteps/istep06/thread_activate/thread_activate.C @@ -384,7 +384,7 @@ void activate_threads( errlHndl_t& io_rtaskRetErrl ) } else { - TRACDCOMP( g_fapiTd, + TRACFCOMP( g_fapiTd, "activate_threads enabling thread=%d", thread ); thread_bitset |= fapi2::thread_id2bitset(thread); @@ -406,12 +406,20 @@ void activate_threads( errlHndl_t& io_rtaskRetErrl ) // return data in o_ras_status // i_warncheck => convert pre/post checks errors to // warnings -// // @TODO RTC:134077 -// FAPI_INVOKE_HWP( l_errl, p9_thread_control, -// l_fapiCore, //i_target -// thread_bitset, //i_threads -// PTC_CMD_SRESET, //i_command -// false); //i_warncheck + // o_rasStatusReg => Complete RAS status reg 64-bit buffer + // o_state => N/A - Output state not used for + // PTC_CMD_SRESET command + // + //TODO RTC 134077 Revisit use of status and threadState + fapi2::buffer<uint64_t> l_status = 0; + uint64_t l_threadState = 0; + FAPI_INVOKE_HWP( l_errl, p9_thread_control, + l_fapiCore, //i_target + thread_bitset, //i_threads + PTC_CMD_SRESET, //i_command + false, //i_warncheck + l_status, //o_rasStatusReg + l_threadState); //o_state if ( l_errl != NULL ) { |
