diff options
7 files changed, 307 insertions, 113 deletions
diff --git a/src/import/chips/p9/procedures/hwp/io/p9_io_xbus_scominit.C b/src/import/chips/p9/procedures/hwp/io/p9_io_xbus_scominit.C index dff5af3dc..2e42b6527 100644 --- a/src/import/chips/p9/procedures/hwp/io/p9_io_xbus_scominit.C +++ b/src/import/chips/p9/procedures/hwp/io/p9_io_xbus_scominit.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2015,2017 */ +/* Contributors Listed Below - COPYRIGHT 2015,2018 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -49,12 +49,15 @@ //------------------------------------------------------------------------------ // Includes //------------------------------------------------------------------------------ +#include <p9_xbus_fir_utils.H> #include <p9_io_regs.H> #include <p9_io_scom.H> #include <p9_io_xbus_scominit.H> #include <p9_xbus_g0_scom.H> #include <p9_xbus_g1_scom.H> #include <p9_xbus_scom_addresses.H> +#include <p9_misc_scom_addresses.H> +#include <p9_misc_scom_addresses_fld.H> enum { @@ -63,13 +66,6 @@ enum }; //------------------------------------------------------------------------------ -// Constant definitions -//------------------------------------------------------------------------------ -const uint64_t FIR_ACTION0 = 0x0000000000000000ULL; -const uint64_t FIR_ACTION1 = 0xFFFFFFFFFFFF0000ULL; -const uint64_t FIR_MASK = 0xDF9797FFFFFFC000ULL; - -//------------------------------------------------------------------------------ // Function definitions //------------------------------------------------------------------------------ @@ -219,20 +215,27 @@ fapi2::ReturnCode p9_io_xbus_scominit( break; } - // configure FIR + // configure PHY FIR, only if not already setup by SBE { - FAPI_TRY(fapi2::putScom(i_target, - XBUS_FIR_ACTION0_REG, - FIR_ACTION0), - "Error from putScom (XBUS_FIR_ACTION0_REG)"); - FAPI_TRY(fapi2::putScom(i_target, - XBUS_FIR_ACTION1_REG, - FIR_ACTION1), - "Error from putScom (XBUS_FIR_ACTION1_REG)"); - FAPI_TRY(fapi2::putScom(i_target, - XBUS_FIR_MASK_REG, - FIR_MASK), - "Error from putScom (XBUS_FIR_MASK_REG)"); + fapi2::buffer<uint64_t> l_scom_data; + FAPI_TRY(fapi2::getScom(l_proc, PU_PB_CENT_SM0_PB_CENT_FIR_REG, l_scom_data), + "Error from getScom (PU_PB_CENT_SM0_PB_CENT_FIR_REG)"); + + if (!l_scom_data.getBit<PU_PB_CENT_SM0_PB_CENT_FIR_MASK_REG_SPARE_13>()) + { + FAPI_TRY(fapi2::putScom(i_target, + XBUS_FIR_ACTION0_REG, + XBUS_PHY_FIR_ACTION0), + "Error from putScom (XBUS_FIR_ACTION0_REG)"); + FAPI_TRY(fapi2::putScom(i_target, + XBUS_FIR_ACTION1_REG, + XBUS_PHY_FIR_ACTION1), + "Error from putScom (XBUS_FIR_ACTION1_REG)"); + FAPI_TRY(fapi2::putScom(i_target, + XBUS_FIR_MASK_REG, + XBUS_PHY_FIR_MASK), + "Error from putScom (XBUS_FIR_MASK_REG)"); + } } // mark HWP exit diff --git a/src/import/chips/p9/procedures/hwp/io/p9_io_xbus_scominit.mk b/src/import/chips/p9/procedures/hwp/io/p9_io_xbus_scominit.mk index 51064f2b1..aad8b4a05 100644 --- a/src/import/chips/p9/procedures/hwp/io/p9_io_xbus_scominit.mk +++ b/src/import/chips/p9/procedures/hwp/io/p9_io_xbus_scominit.mk @@ -5,7 +5,7 @@ # # OpenPOWER HostBoot Project # -# Contributors Listed Below - COPYRIGHT 2015,2016 +# Contributors Listed Below - COPYRIGHT 2015,2018 # [+] International Business Machines Corp. # # @@ -24,4 +24,5 @@ # IBM_PROLOG_END_TAG PROCEDURE=p9_io_xbus_scominit +$(call ADD_MODULE_INCDIR,$(PROCEDURE),$(ROOTPATH)/chips/p9/procedures/hwp/nest/) $(call BUILD_PROCEDURE) diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_chiplet_fabric_scominit.C b/src/import/chips/p9/procedures/hwp/nest/p9_chiplet_fabric_scominit.C index 361a1cf83..833cf8ba9 100644 --- a/src/import/chips/p9/procedures/hwp/nest/p9_chiplet_fabric_scominit.C +++ b/src/import/chips/p9/procedures/hwp/nest/p9_chiplet_fabric_scominit.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2017 */ +/* Contributors Listed Below - COPYRIGHT 2017,2018 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -43,6 +43,8 @@ #include <p9_fbc_no_hp_scom.H> #include <p9_fbc_ioe_tl_scom.H> #include <p9_fbc_ioe_dl_scom.H> +#include <p9_xbus_fir_utils.H> +#include <p9_fbc_smp_utils.H> #include <p9_xbus_scom_addresses.H> #include <p9_xbus_scom_addresses_fld.H> @@ -52,17 +54,6 @@ #include <p9_perv_scom_addresses.H> //------------------------------------------------------------------------------ -// Constant definitions -//------------------------------------------------------------------------------ -const uint64_t FBC_IOE_TL_FIR_ACTION0 = 0x0000000000000000ULL; -const uint64_t FBC_IOE_TL_FIR_ACTION1 = 0x0000000000000000ULL; -const uint64_t FBC_IOE_TL_FIR_MASK = 0xFF6DF0303FFFFF1FULL; - -const uint64_t FBC_IOE_DL_FIR_ACTION0 = 0x0000000000000000ULL; -const uint64_t FBC_IOE_DL_FIR_ACTION1 = 0x0303C00000001FFCULL; -const uint64_t FBC_IOE_DL_FIR_MASK = 0xFCFC3FFFFFFFE003ULL; - -//------------------------------------------------------------------------------ // Function definitions //------------------------------------------------------------------------------ @@ -74,6 +65,7 @@ fapi2::ReturnCode p9_chiplet_fabric_scominit(const fapi2::Target<fapi2::TARGET_T fapi2::Target<fapi2::TARGET_TYPE_SYSTEM> FAPI_SYSTEM; std::vector<fapi2::Target<fapi2::TARGET_TYPE_XBUS>> l_xbus_chiplets; std::vector<fapi2::Target<fapi2::TARGET_TYPE_OBUS>> l_obus_chiplets; + fapi2::buffer<uint64_t> l_fbc_cent_fir_data; fapi2::ATTR_PROC_FABRIC_OPTICS_CONFIG_MODE_Type l_fbc_optics_cfg_mode = { fapi2::ENUM_ATTR_PROC_FABRIC_OPTICS_CONFIG_MODE_SMP }; FAPI_DBG("Start"); @@ -105,14 +97,64 @@ fapi2::ReturnCode p9_chiplet_fabric_scominit(const fapi2::Target<fapi2::TARGET_T l_xbus_chiplets = i_target.getChildren<fapi2::TARGET_TYPE_XBUS>(); - if (l_xbus_chiplets.size()) + // configure TL FIR, only if not already setup by SBE + FAPI_TRY(fapi2::getScom(i_target, PU_PB_CENT_SM0_PB_CENT_FIR_REG, l_fbc_cent_fir_data), + "Error from getScom (PU_PB_CENT_SM0_PB_CENT_FIR_REG)"); + + if (!l_fbc_cent_fir_data.getBit<PU_PB_CENT_SM0_PB_CENT_FIR_MASK_REG_SPARE_13>()) { FAPI_TRY(fapi2::putScom(i_target, PU_PB_IOE_FIR_ACTION0_REG, FBC_IOE_TL_FIR_ACTION0), "Error from putScom (PU_PB_IOE_FIR_ACTION0_REG)"); FAPI_TRY(fapi2::putScom(i_target, PU_PB_IOE_FIR_ACTION1_REG, FBC_IOE_TL_FIR_ACTION1), "Error from putScom (PU_PB_IOE_FIR_ACTION1_REG)"); - FAPI_TRY(fapi2::putScom(i_target, PU_PB_IOE_FIR_MASK_REG, FBC_IOE_TL_FIR_MASK), - "Error from putScom (PU_PB_IOE_FIR_MASK_REG)"); + + fapi2::buffer<uint64_t> l_fir_mask = FBC_IOE_TL_FIR_MASK; + + if (!l_xbus_chiplets.size()) + { + // no valid links, mask + l_fir_mask.flush<1>(); + } + else + { + bool l_x_functional[P9_FBC_UTILS_MAX_ELECTRICAL_LINKS] = + { + false, + false, + false + }; + uint64_t l_x_non_functional_mask[P9_FBC_UTILS_MAX_ELECTRICAL_LINKS] = + { + FBC_IOE_TL_FIR_MASK_X0_NF, + FBC_IOE_TL_FIR_MASK_X1_NF, + FBC_IOE_TL_FIR_MASK_X2_NF + }; + + for (auto l_iter = l_xbus_chiplets.begin(); + l_iter != l_xbus_chiplets.end(); + l_iter++) + { + uint8_t l_unit_pos; + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_UNIT_POS, + *l_iter, + l_unit_pos), + "Error from FAPI_ATTR_GET (ATTR_CHIP_UNIT_POS)"); + l_x_functional[l_unit_pos] = true; + } + + for (uint8_t ll = 0; + ll < P9_FBC_UTILS_MAX_ELECTRICAL_LINKS; + ll++) + { + if (!l_x_functional[ll]) + { + l_fir_mask |= l_x_non_functional_mask[ll]; + } + } + + FAPI_TRY(fapi2::putScom(i_target, PU_PB_IOE_FIR_MASK_REG, l_fir_mask), + "Error from putScom (PU_PB_IOE_FIR_MASK_REG)"); + } } // setup IOE (XBUS FBC IO) DL SCOMs @@ -131,13 +173,16 @@ fapi2::ReturnCode p9_chiplet_fabric_scominit(const fapi2::Target<fapi2::TARGET_T goto fapi_try_exit; } - // configure action registers & unmask - FAPI_TRY(fapi2::putScom(*l_iter, XBUS_LL0_IOEL_FIR_ACTION0_REG, FBC_IOE_DL_FIR_ACTION0), - "Error from putScom (XBUS_LL0_IOEL_FIR_ACTION0_REG)"); - FAPI_TRY(fapi2::putScom(*l_iter, XBUS_LL0_IOEL_FIR_ACTION1_REG, FBC_IOE_DL_FIR_ACTION1), - "Error from putScom (XBUS_LL0_IOEL_FIR_ACTION1_REG)"); - FAPI_TRY(fapi2::putScom(*l_iter, XBUS_LL0_LL0_LL0_IOEL_FIR_MASK_REG, FBC_IOE_DL_FIR_MASK), - "Error from putScom (XBUS_LL0_LL0_LL0_IOEL_FIR_MASK_REG)"); + // configure DL FIR, only if not already setup by SBE + if (!l_fbc_cent_fir_data.getBit<PU_PB_CENT_SM0_PB_CENT_FIR_MASK_REG_SPARE_13>()) + { + FAPI_TRY(fapi2::putScom(*l_iter, XBUS_LL0_IOEL_FIR_ACTION0_REG, FBC_IOE_DL_FIR_ACTION0), + "Error from putScom (XBUS_LL0_IOEL_FIR_ACTION0_REG)"); + FAPI_TRY(fapi2::putScom(*l_iter, XBUS_LL0_IOEL_FIR_ACTION1_REG, FBC_IOE_DL_FIR_ACTION1), + "Error from putScom (XBUS_LL0_IOEL_FIR_ACTION1_REG)"); + FAPI_TRY(fapi2::putScom(*l_iter, XBUS_LL0_LL0_LL0_IOEL_FIR_MASK_REG, FBC_IOE_DL_FIR_MASK), + "Error from putScom (XBUS_LL0_LL0_LL0_IOEL_FIR_MASK_REG)"); + } } // set FBC optics config mode attribute diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_chiplet_scominit.C b/src/import/chips/p9/procedures/hwp/nest/p9_chiplet_scominit.C index 7c381f53b..635b338a6 100644 --- a/src/import/chips/p9/procedures/hwp/nest/p9_chiplet_scominit.C +++ b/src/import/chips/p9/procedures/hwp/nest/p9_chiplet_scominit.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2015,2017 */ +/* Contributors Listed Below - COPYRIGHT 2015,2018 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -40,6 +40,7 @@ // Includes //------------------------------------------------------------------------------ #include <p9_chiplet_scominit.H> +#include <p9_xbus_fir_utils.H> #include <p9_fbc_ioo_tl_scom.H> #include <p9_fbc_ioo_dl_scom.H> #include <p9n_mcs_scom.H> @@ -50,6 +51,7 @@ #include <p9_nx_scom.H> #include <p9_int_scom.H> #include <p9_vas_scom.H> +#include <p9_fbc_smp_utils.H> #include <p9_xbus_scom_addresses.H> #include <p9_xbus_scom_addresses_fld.H> #include <p9_obus_scom_addresses.H> @@ -72,17 +74,6 @@ const uint64_t FBC_IOO_DL_FIR_MASK = 0xFCFC3FFFFCFF00F3ULL; // link 0,1 internal errors are a simulation artifact in dd1 so they need to be masked const uint64_t FBC_IOO_DL_FIR_MASK_SIM = 0xFCFC3FFFFCFF00FFULL; -static const uint8_t OBRICK0_POS = 0x0; -static const uint8_t OBRICK1_POS = 0x1; -static const uint8_t OBRICK2_POS = 0x2; -static const uint8_t OBRICK9_POS = 0x9; -static const uint8_t OBRICK10_POS = 0xA; -static const uint8_t OBRICK11_POS = 0xB; - -static const uint8_t PERV_OB_CPLT_CONF1_OBRICKA_IOVALID = 0x6; -static const uint8_t PERV_OB_CPLT_CONF1_OBRICKB_IOVALID = 0x7; -static const uint8_t PERV_OB_CPLT_CONF1_OBRICKC_IOVALID = 0x8; - static const uint8_t N3_PG_NPU_REGION_BIT = 7; //------------------------------------------------------------------------------ @@ -96,16 +87,15 @@ fapi2::ReturnCode p9_chiplet_scominit(const fapi2::Target<fapi2::TARGET_TYPE_PRO char l_procTargetStr[fapi2::MAX_ECMD_STRING_LEN]; char l_chipletTargetStr[fapi2::MAX_ECMD_STRING_LEN]; fapi2::Target<fapi2::TARGET_TYPE_SYSTEM> FAPI_SYSTEM; + uint8_t l_xbus_present[P9_FBC_UTILS_MAX_ELECTRICAL_LINKS] = {0}; + uint8_t l_xbus_functional[P9_FBC_UTILS_MAX_ELECTRICAL_LINKS] = {0}; + std::vector<fapi2::Target<fapi2::TARGET_TYPE_XBUS>> l_xbus_chiplets; std::vector<fapi2::Target<fapi2::TARGET_TYPE_OBUS>> l_obus_chiplets; std::vector<fapi2::Target<fapi2::TARGET_TYPE_MCS>> l_mcs_targets; std::vector<fapi2::Target<fapi2::TARGET_TYPE_MI>> l_mi_targets; std::vector<fapi2::Target<fapi2::TARGET_TYPE_MC>> l_mc_targets; std::vector<fapi2::Target<fapi2::TARGET_TYPE_DMI>> l_dmi_targets; std::vector<fapi2::Target<fapi2::TARGET_TYPE_CAPP>> l_capp_targets; - std::vector<fapi2::Target<fapi2::TARGET_TYPE_OBUS_BRICK>> l_obrick_targets; - fapi2::buffer<uint64_t> l_ob0data(0x0); - fapi2::buffer<uint64_t> l_ob3data(0x0); - uint8_t l_no_ndl_iovalid = 0; uint8_t l_is_simulation = 0; uint8_t l_nmmu_ndd1 = 0; uint32_t l_eps_write_cycles_t1 = 0; @@ -114,8 +104,6 @@ fapi2::ReturnCode p9_chiplet_scominit(const fapi2::Target<fapi2::TARGET_TYPE_PRO FAPI_DBG("Start"); - // Get attribute to check if NDL IOValids need to be set (dd2+) - FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_EC_FEATURE_P9_NO_NDL_IOVALID, i_target, l_no_ndl_iovalid)); // Get simulation indicator attribute FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_IS_SIMULATION, FAPI_SYSTEM, l_is_simulation)); @@ -155,6 +143,7 @@ fapi2::ReturnCode p9_chiplet_scominit(const fapi2::Target<fapi2::TARGET_TYPE_PRO "Error from FAPI_ATTR_SET (ATTR_PROC_NPU_ENABLED)"); } + l_xbus_chiplets = i_target.getChildren<fapi2::TARGET_TYPE_XBUS>(); l_obus_chiplets = i_target.getChildren<fapi2::TARGET_TYPE_OBUS>(); l_mcs_targets = i_target.getChildren<fapi2::TARGET_TYPE_MCS>(); l_mi_targets = i_target.getChildren<fapi2::TARGET_TYPE_MI>(); @@ -227,6 +216,114 @@ fapi2::ReturnCode p9_chiplet_scominit(const fapi2::Target<fapi2::TARGET_TYPE_PRO FAPI_INF("No MCS/MI targets found! Do nothing!"); } + // read spare FBC FIR bit -- if set, SBE has configured XBUS FIR resources for all + // present units, and code here will be run to mask resources associated with + // non-functional units + FAPI_TRY(getScom(i_target, PU_PB_CENT_SM0_PB_CENT_FIR_REG, l_scom_data), + "Error from getScom (PU_PB_CENT_SM0_PB_CENT_FIR_REG)"); + + if (l_scom_data.getBit<PU_PB_CENT_SM0_PB_CENT_FIR_MASK_REG_SPARE_13>()) + { + FAPI_DBG("Determine set of present XBUS regions on target %s...", l_procTargetStr); + { + for (auto& l_cplt_target : i_target.getChildren<fapi2::TARGET_TYPE_PERV> + (static_cast<fapi2::TargetFilter>(fapi2::TARGET_FILTER_XBUS), + fapi2::TARGET_STATE_FUNCTIONAL)) + { + fapi2::buffer<uint16_t> l_attr_pg = 0; + // obtain partial good information to determine viable X links + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PG, l_cplt_target, l_attr_pg), + "Error from FAPI_ATTR_GET (ATTR_PG)"); + + for (uint8_t ii = 0; + ii < P9_FBC_UTILS_MAX_ELECTRICAL_LINKS; + ii++) + { + l_xbus_present[ii] = !l_attr_pg.getBit(X_PG_IOX0_REGION_BIT + ii) && + !l_attr_pg.getBit(X_PG_PBIOX0_REGION_BIT + ii); + } + } + } + + FAPI_DBG("Determine set of functional XBUS regions on target %s...", l_procTargetStr); + { + for (auto l_iter = l_xbus_chiplets.begin(); + l_iter != l_xbus_chiplets.end(); + l_iter++) + { + uint8_t l_unit_pos; + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_UNIT_POS, *l_iter, l_unit_pos), + "Error from FAPI_ATTR_GET (ATTR_CHIP_UNIT_POS)"); + l_xbus_functional[l_unit_pos] = 1; + } + } + + FAPI_DBG("Masking XBUS FIR resources for unused links on target %s...", l_procTargetStr); + { + if (l_xbus_present[0] && !l_xbus_functional[0]) + { + // XBUS0 FBC DL + FAPI_TRY(putScom(i_target, XBUS_0_LL0_LL0_LL0_IOEL_FIR_MASK_REG, FBC_IOE_DL_FIR_MASK_NF), + "Error from putScom (XBUS_0_LL0_IOEL_FIR_MASK_REG)"); + // XBUS0 PHY + FAPI_TRY(putScom(i_target, XBUS_FIR_MASK_REG, XBUS_PHY_FIR_MASK_NF), + "Error from putScom (XBUS_FIR_MASK_REG)"); + } + + if (!l_xbus_functional[0]) + { + // XBUS0 FBC TL + FAPI_TRY(putScom(i_target, PU_PB_IOE_FIR_MASK_REG_OR, FBC_IOE_TL_FIR_MASK_X0_NF), + "Error from putScom (PU_PB_IOE_FIR_MASK_REG, X0)"); + + // XBUS0 EXTFIR + FAPI_TRY(putScom(i_target, PU_PB_CENT_SM1_EXTFIR_MASK_REG_OR, FBC_EXT_FIR_MASK_X0_NF), + "Error from putScom (PU_PB_CENT_SM1_EXTFIR_MASK_REG_OR)"); + } + + if (l_xbus_present[1] && !l_xbus_functional[1]) + { + // XBUS1 FBC DL + FAPI_TRY(putScom(i_target, XBUS_1_LL1_LL1_LL1_IOEL_FIR_MASK_REG, FBC_IOE_DL_FIR_MASK_NF), + "Error from putScom (XBUS_1_LL1_IOEL_FIR_MASK_REG)"); + // XBUS1 PHY + FAPI_TRY(putScom(i_target, XBUS_1_FIR_MASK_REG, XBUS_PHY_FIR_MASK_NF), + "Error from putScom (XBUS_1_FIR_MASK_REG)"); + } + + if (!l_xbus_functional[1]) + { + // XBUS1 FBC TL + FAPI_TRY(putScom(i_target, PU_PB_IOE_FIR_MASK_REG_OR, FBC_IOE_TL_FIR_MASK_X1_NF), + "Error from putScom (PU_PB_IOE_FIR_MASK_REG, X1)"); + + // XBUS1 EXTFIR + FAPI_TRY(putScom(i_target, PU_PB_CENT_SM1_EXTFIR_MASK_REG_OR, FBC_EXT_FIR_MASK_X1_NF), + "Error from putScom (PU_PB_CENT_SM1_EXTFIR_MASK_REG_OR)"); + } + + if (l_xbus_present[2] && !l_xbus_functional[2]) + { + // XBUS2 FBC DL + FAPI_TRY(putScom(i_target, XBUS_2_LL2_LL2_LL2_IOEL_FIR_MASK_REG, FBC_IOE_DL_FIR_MASK_NF), + "Error from putScom (XBUS_2_LL2_IOEL_FIR_MASK_REG)"); + // XBUS2 PHY + FAPI_TRY(fapi2::putScom(i_target, XBUS_2_FIR_MASK_REG, XBUS_PHY_FIR_MASK_NF), + "Error from putScom (XBUS_2_FIR_MASK_REG)"); + } + + if (!l_xbus_functional[2]) + { + // XBUS2 FBC TL + FAPI_TRY(putScom(i_target, PU_PB_IOE_FIR_MASK_REG_OR, FBC_IOE_TL_FIR_MASK_X2_NF), + "Error from putScom (PU_PB_IOE_FIR_MASK_REG, X2)"); + + // XBUS2 EXTFIR + FAPI_TRY(putScom(i_target, PU_PB_CENT_SM1_EXTFIR_MASK_REG_OR, FBC_EXT_FIR_MASK_X2_NF), + "Error from putScom (PU_PB_CENT_SM1_EXTFIR_MASK_REG_OR)"); + } + } + } FAPI_DBG("Invoking p9.fbc.ioo_tl.scom.initfile on target %s...", l_procTargetStr); FAPI_EXEC_HWP(l_rc, p9_fbc_ioo_tl_scom, i_target, FAPI_SYSTEM); diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_fab_iovalid.C b/src/import/chips/p9/procedures/hwp/nest/p9_fab_iovalid.C index 6344f4df7..5f57a1371 100644 --- a/src/import/chips/p9/procedures/hwp/nest/p9_fab_iovalid.C +++ b/src/import/chips/p9/procedures/hwp/nest/p9_fab_iovalid.C @@ -42,6 +42,8 @@ //------------------------------------------------------------------------------ #include <p9_fab_iovalid.H> #include <p9_fbc_smp_utils.H> +#include <p9_misc_scom_addresses.H> +#include <p9_misc_scom_addresses_fld.H> //------------------------------------------------------------------------------ @@ -708,7 +710,7 @@ fapi_try_exit: /// -/// @brief Manipulate iovalid/FIR settings for a single fabric link (X/A) +/// @brief Manipulate iovalid settings for a single fabric link (X/A) /// /// @param[in] i_target Reference to processor chip target /// @param[in] i_ctl Reference to link control structure @@ -727,11 +729,13 @@ p9_fab_iovalid_update_link(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_ // form data buffers for iovalid/RAS FIR mask updates fapi2::buffer<uint64_t> l_iovalid_mask; - fapi2::buffer<uint64_t> l_ras_fir_mask; - fapi2::buffer<uint64_t> l_extfir_action; if (i_set_not_clear) { + fapi2::buffer<uint64_t> l_ras_fir_mask; + fapi2::buffer<uint64_t> l_extfir_action; + fapi2::buffer<uint64_t> l_fbc_cent_fir_data; + // set iovalid l_iovalid_mask.flush<0>(); @@ -747,23 +751,34 @@ p9_fab_iovalid_update_link(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_ FAPI_TRY(l_iovalid_mask.setBit(i_ctl.iovalid_field_start_bit + 1)); } - // clear RAS FIR mask - l_ras_fir_mask.flush<1>(); - FAPI_TRY(l_ras_fir_mask.clearBit(i_ctl.ras_fir_field_bit)); - - // get the value of the action 0 register, clear the bit and write it - FAPI_TRY(fapi2::getScom(i_target, PU_PB_CENT_SM1_EXTFIR_ACTION0_REG, l_extfir_action), - "Error reading Action 0 register"); - FAPI_TRY(l_extfir_action.clearBit(i_ctl.ras_fir_field_bit)); - FAPI_TRY(fapi2::putScom(i_target, PU_PB_CENT_SM1_EXTFIR_ACTION0_REG, l_extfir_action), - "Error writing Action 0 register"); - - // get the value of the action 1 registers, clear the bit, and write it - FAPI_TRY(fapi2::getScom(i_target, PU_PB_CENT_SM1_EXTFIR_ACTION1_REG, l_extfir_action), - "Error reading Action 1 register"); - FAPI_TRY(l_extfir_action.clearBit(i_ctl.ras_fir_field_bit)); - FAPI_TRY(fapi2::putScom(i_target, PU_PB_CENT_SM1_EXTFIR_ACTION1_REG, l_extfir_action), - "Error writing Action 1 register"); + FAPI_TRY(fapi2::getScom(i_target, PU_PB_CENT_SM0_PB_CENT_FIR_REG, l_fbc_cent_fir_data), + "Error from getScom (PU_PB_CENT_SM0_PB_CENT_FIR_REG)"); + + // clear RAS FIR mask for optical link, or electrical link if not already setup by SBE + if ((i_ctl.endp_type == OPTICAL) || + ((i_ctl.endp_type == ELECTRICAL) && + (!l_fbc_cent_fir_data.getBit<PU_PB_CENT_SM0_PB_CENT_FIR_MASK_REG_SPARE_13>()))) + { + // get the value of the action 0 register, clear the bit and write it + FAPI_TRY(fapi2::getScom(i_target, PU_PB_CENT_SM1_EXTFIR_ACTION0_REG, l_extfir_action), + "Error reading RAS FIR Action 0 register"); + FAPI_TRY(l_extfir_action.clearBit(i_ctl.ras_fir_field_bit)); + FAPI_TRY(fapi2::putScom(i_target, PU_PB_CENT_SM1_EXTFIR_ACTION0_REG, l_extfir_action), + "Error writing RAS FIR Action 0 register"); + + // get the value of the action 1 registers, clear the bit, and write it + FAPI_TRY(fapi2::getScom(i_target, PU_PB_CENT_SM1_EXTFIR_ACTION1_REG, l_extfir_action), + "Error reading RAS FIR Action 1 register"); + FAPI_TRY(l_extfir_action.clearBit(i_ctl.ras_fir_field_bit)); + FAPI_TRY(fapi2::putScom(i_target, PU_PB_CENT_SM1_EXTFIR_ACTION1_REG, l_extfir_action), + "Error writing RAS FIR Action 1 register"); + + // clear associated mask bit + l_ras_fir_mask.flush<1>(); + FAPI_TRY(l_ras_fir_mask.clearBit(i_ctl.ras_fir_field_bit)); + FAPI_TRY(fapi2::putScom(i_target, PU_PB_CENT_SM1_EXTFIR_MASK_REG_AND, l_ras_fir_mask), + "Error writing RAS FIR mask register (PU_PB_CENT_SM1_EXTFIR_MASK_REG_AND)!"); + } } else { @@ -781,26 +796,16 @@ p9_fab_iovalid_update_link(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_ { FAPI_TRY(l_iovalid_mask.clearBit(i_ctl.iovalid_field_start_bit + 1)); } - - // set RAS FIR mask - l_ras_fir_mask.flush<0>(); - FAPI_TRY(l_ras_fir_mask.setBit(i_ctl.ras_fir_field_bit)); } // use AND/OR mask registers to atomically update link specific fields - // in iovalid/RAS FIR mask registers + // in iovalid control register FAPI_TRY(fapi2::putScom(i_target, (i_set_not_clear) ? (i_ctl.iovalid_or_addr) : (i_ctl.iovalid_clear_addr), l_iovalid_mask), "Error writing iovalid control register (0x%08X)!", (i_set_not_clear) ? (i_ctl.iovalid_or_addr) : (i_ctl.iovalid_clear_addr)); - FAPI_TRY(fapi2::putScom(i_target, - (i_set_not_clear) ? (PU_PB_CENT_SM1_EXTFIR_MASK_REG_AND) : (PU_PB_CENT_SM1_EXTFIR_MASK_REG_OR), - l_ras_fir_mask), - "Error writing RAS FIR mask register (0x%08X)!", - (i_set_not_clear) ? (PU_PB_CENT_SM1_EXTFIR_MASK_REG_AND) : (PU_PB_CENT_SM1_EXTFIR_MASK_REG_OR)); - fapi_try_exit: FAPI_DBG("End"); return fapi2::current_err; diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_fbc_smp_utils.H b/src/import/chips/p9/procedures/hwp/nest/p9_fbc_smp_utils.H index 80a01c5e1..ea4fc0032 100644 --- a/src/import/chips/p9/procedures/hwp/nest/p9_fbc_smp_utils.H +++ b/src/import/chips/p9/procedures/hwp/nest/p9_fbc_smp_utils.H @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2016,2017 */ +/* Contributors Listed Below - COPYRIGHT 2016,2018 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -91,6 +91,9 @@ struct p9_fbc_link_ctl_t const uint32_t P9_FBC_UTILS_MAX_X_LINKS = 7; const uint32_t P9_FBC_UTILS_MAX_A_LINKS = 4; +const uint32_t P9_FBC_UTILS_MAX_ELECTRICAL_LINKS = 3; +const uint32_t P9_FBC_UTILS_MAX_OPTICAL_LINKS = 4; + const p9_fbc_link_ctl_t P9_FBC_XBUS_LINK_CTL_ARR[P9_FBC_UTILS_MAX_X_LINKS] = { { diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_sys_chiplet_scominit.C b/src/import/chips/p9/procedures/hwp/nest/p9_sys_chiplet_scominit.C index bfd05abe9..46e2818e4 100644 --- a/src/import/chips/p9/procedures/hwp/nest/p9_sys_chiplet_scominit.C +++ b/src/import/chips/p9/procedures/hwp/nest/p9_sys_chiplet_scominit.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2016,2017 */ +/* Contributors Listed Below - COPYRIGHT 2016,2018 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -42,6 +42,9 @@ #include "p9_sys_chiplet_scominit.H" #include "p9_fbc_ioo_tl_scom.H" #include "p9_fbc_ioo_dl_scom.H" +#include "p9_misc_scom_addresses.H" +#include "p9_misc_scom_addresses_fld.H" +#include "p9_fbc_smp_utils.H" //------------------------------------------------------------------------------ // Function definitions @@ -53,38 +56,75 @@ fapi2::ReturnCode p9_sys_chiplet_scominit( fapi2::ReturnCode l_rc; fapi2::Target<fapi2::TARGET_TYPE_SYSTEM> FAPI_SYSTEM; std::vector<fapi2::Target<fapi2::TARGET_TYPE_OBUS>> l_obus_chiplets; + fapi2::ATTR_PROC_FABRIC_X_ATTACHED_CHIP_CNFG_Type l_x_en; + fapi2::ATTR_PROC_FABRIC_A_ATTACHED_CHIP_CNFG_Type l_a_en; FAPI_DBG("Start"); - do + // Invoke IOO (OBUS FBC IO) SCOM initfiles + FAPI_DBG("Invoking p9.fbc.ioo_tl.scom.initfile..."); + FAPI_EXEC_HWP(l_rc, p9_fbc_ioo_tl_scom, i_target, FAPI_SYSTEM); + + if (l_rc) + { + FAPI_ERR("Error from p9_fbc_ioo_tl_scom"); + fapi2::current_err = l_rc; + goto fapi_try_exit; + } + + l_obus_chiplets = i_target.getChildren<fapi2::TARGET_TYPE_OBUS>(); + + for (auto l_iter = l_obus_chiplets.begin(); + l_iter != l_obus_chiplets.end(); + l_iter++) { - // Invoke IOO (OBUS FBC IO) SCOM initfiles - FAPI_DBG("Invoking p9.fbc.ioo_tl.scom.initfile..."); - FAPI_EXEC_HWP(l_rc, p9_fbc_ioo_tl_scom, i_target, FAPI_SYSTEM); + FAPI_DBG("Invoking p9.fbc.ioo_dl.scom.initfile..."); + FAPI_EXEC_HWP(l_rc, p9_fbc_ioo_dl_scom, *l_iter, i_target); if (l_rc) { - FAPI_ERR("Error from p9_fbc_ioo_tl_scom"); - break; + FAPI_ERR("Error from p9_fbc_ioo_dl_scom"); + fapi2::current_err = l_rc; + goto fapi_try_exit; } + } - l_obus_chiplets = i_target.getChildren<fapi2::TARGET_TYPE_OBUS>(); + // mask EXTFIR associated with unused inter-drawer links + FAPI_DBG("Masking OBUS FIR resources for unused inter-drawer links"); + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PROC_FABRIC_X_ATTACHED_CHIP_CNFG, + i_target, + l_x_en), + "Error from FAPI_ATTR_GET (ATTR_PROC_FABRIC_X_ATTACHED_CHIP_CNFG)"); + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PROC_FABRIC_A_ATTACHED_CHIP_CNFG, + i_target, + l_a_en), + "Error from FAPI_ATTR_GET (ATTR_PROC_FABRIC_A_ATTACHED_CHIP_CNFG)"); - for (auto l_iter = l_obus_chiplets.begin(); - l_iter != l_obus_chiplets.end(); - l_iter++) + for (uint8_t l_obus = 0; + l_obus < P9_FBC_UTILS_MAX_A_LINKS; + l_obus++) + { + if (!l_x_en[3 + l_obus] && !l_a_en[l_obus]) { - FAPI_DBG("Invoking p9.fbc.ioo_dl.scom.initfile..."); - FAPI_EXEC_HWP(l_rc, p9_fbc_ioo_dl_scom, *l_iter, i_target); + fapi2::buffer<uint64_t> l_extfir_mask = 0; + fapi2::buffer<uint64_t> l_extfir_action1 = 0; + + FAPI_TRY(l_extfir_mask.setBit(PU_PB_CENT_SM1_EXTFIR_REG_PB_X3_FIR_ERR + + l_obus), + "Error forming EXTFIR mask register content"); + FAPI_TRY(fapi2::putScom(i_target, PU_PB_CENT_SM1_EXTFIR_MASK_REG_OR, l_extfir_mask), + "Error from putScom (PU_PB_CENT_SM1_EXTFIR_MASK_REG_OR)"); - if (l_rc) - { - FAPI_ERR("Error from p9_fbc_ioo_dl_scom"); - break; - } + FAPI_TRY(fapi2::getScom(i_target, PU_PB_CENT_SM1_EXTFIR_ACTION1_REG, l_extfir_action1), + "Error from getScom (PU_PB_CENT_SM1_EXTFIR_ACTION1_REG)"); + FAPI_TRY(l_extfir_action1.setBit(PU_PB_CENT_SM1_EXTFIR_REG_PB_X3_FIR_ERR + + l_obus), + "Error forming EXTFIR action1 register content"); + FAPI_TRY(fapi2::putScom(i_target, PU_PB_CENT_SM1_EXTFIR_ACTION1_REG, l_extfir_action1), + "Error from putScom (PU_PB_CENT_SM1_EXTFIR_ACTION1_REG)"); } } - while(0); +fapi_try_exit: FAPI_DBG("End"); return l_rc; } |
