diff options
25 files changed, 2281 insertions, 415 deletions
diff --git a/src/include/usr/hwpf/fapi/fapiMBvpdAccess.H b/src/include/usr/hwpf/fapi/fapiMBvpdAccess.H index 56d3dc55d..3f50ec389 100644 --- a/src/include/usr/hwpf/fapi/fapiMBvpdAccess.H +++ b/src/include/usr/hwpf/fapi/fapiMBvpdAccess.H @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2013,2014 */ +/* Contributors Listed Below - COPYRIGHT 2013,2015 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -22,7 +22,7 @@ /* permissions and limitations under the License. */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: fapiMBvpdAccess.H,v 1.11 2014/10/23 20:57:58 eliner Exp $ +// $Id: fapiMBvpdAccess.H,v 1.12 2015/09/29 15:59:29 dcrowell Exp $ /** * @file fapiMBvpdAccess.H * @@ -123,6 +123,17 @@ namespace fapi MBVPD_KEYWORD_K6 = 0x39, MBVPD_KEYWORD_K7 = 0x3a, MBVPD_KEYWORD_K8 = 0x3b, + MBVPD_KEYWORD_MM = 0x3c, + MBVPD_KEYWORD_SS = 0x3d, + MBVPD_KEYWORD_ET = 0x3e, + MBVPD_KEYWORD_VM = 0x3f, + MBVPD_KEYWORD_PD1 = 0x40, //#1 + MBVPD_KEYWORD_PDZ = 0x41, //#Z + MBVPD_KEYWORD_PD4 = 0x42, //#4 + MBVPD_KEYWORD_PD5 = 0x43, //#5 + MBVPD_KEYWORD_PD6 = 0x44, //#6 + MBVPD_KEYWORD_PD8 = 0x45, //#8 + MBVPD_KEYWORD_PDY = 0x46, //#Y }; } diff --git a/src/include/usr/hwpf/hwp/mvpd_accessors/getMBvpdAttr.H b/src/include/usr/hwpf/hwp/mvpd_accessors/getMBvpdAttr.H index 810cb4072..591617411 100644 --- a/src/include/usr/hwpf/hwp/mvpd_accessors/getMBvpdAttr.H +++ b/src/include/usr/hwpf/hwp/mvpd_accessors/getMBvpdAttr.H @@ -22,7 +22,7 @@ /* permissions and limitations under the License. */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: getMBvpdAttr.H,v 1.2 2015/02/24 19:22:26 whs Exp $ +// $Id: getMBvpdAttr.H,v 1.7 2015/10/06 18:04:03 janssens Exp $ /** * @file getMBvpdAttr.H @@ -35,38 +35,78 @@ #define _HWP_MBVPDATTR_ #include <fapi.H> +#include <fapiUtil.H> #include <fapiMBvpdAccess.H> namespace fapi { namespace getAttrData { - //MT and MR keyword layout - const uint8_t NUM_MBA = 2; //There are 2 MBAs per Centaur memory buffer - const uint8_t NUM_PORTS = 2; //Each MBA has 2 ports - const uint8_t NUM_DIMMS = 2; //Each port has 2 DIMMs - const uint8_t NUM_RANKS = 4; //Number of ranks - //Each port has 64 bytes of space, but only 62 bytes is useable - const uint8_t PORT_SECTION_SIZE = 64; - const uint8_t PORT_SECTION_USED = 62; - - struct port_attributes + const uint32_t VM_00_MR_LAYOUT_KW_SIZE = 255; + const uint32_t VM_00_MR_LAYOUT_NON_PORT_HEAD_SIZE = 0; + const uint32_t VM_00_MR_LAYOUT_PORT_SEC_SIZE = 64; + const uint32_t VM_00_MT_LAYOUT_KW_SIZE = 255; + const uint32_t VM_00_MT_LAYOUT_NON_PORT_HEAD_SIZE = 0; + const uint32_t VM_00_MT_LAYOUT_PORT_SEC_SIZE = 64; + const uint32_t VM_01_MR_LAYOUT_KW_SIZE = 255; + const uint32_t VM_01_MR_LAYOUT_NON_PORT_HEAD_SIZE =2; + const uint32_t VM_01_MR_LAYOUT_PORT_SEC_SIZE = 64; + const uint32_t VM_01_MT_LAYOUT_KW_SIZE = 384; + const uint32_t VM_01_MT_LAYOUT_NON_PORT_HEAD_SIZE = 2; + const uint32_t VM_01_MT_LAYOUT_PORT_SEC_SIZE = 96; + + class keywordLayout + { + public: + virtual uint32_t getKeywordSize()=0; + virtual uint32_t getNonPortHeadSize()=0; + virtual uint32_t getPortSectionSize()=0; + virtual ~keywordLayout() {} + }; + class VM_00_MR_layout : public keywordLayout { - uint8_t port_attr[PORT_SECTION_USED]; - uint8_t nonport_data[PORT_SECTION_SIZE-PORT_SECTION_USED]; + public: + uint32_t getKeywordSize(){ return VM_00_MR_LAYOUT_KW_SIZE; } + uint32_t getNonPortHeadSize(){ return VM_00_MR_LAYOUT_NON_PORT_HEAD_SIZE; } + uint32_t getPortSectionSize(){ return VM_00_MR_LAYOUT_PORT_SEC_SIZE; } + ~VM_00_MR_layout() {} }; - struct mba_attributes + class VM_00_MT_layout : public keywordLayout { - port_attributes mba_port[NUM_PORTS]; + public: + uint32_t getKeywordSize(){ return VM_00_MT_LAYOUT_KW_SIZE; } + uint32_t getNonPortHeadSize(){ return VM_00_MT_LAYOUT_NON_PORT_HEAD_SIZE; } + uint32_t getPortSectionSize(){ return VM_00_MT_LAYOUT_PORT_SEC_SIZE; } + ~VM_00_MT_layout() {} }; - struct attr_keyword + class VM_01_MR_layout : public keywordLayout { - mba_attributes mb_mba[NUM_MBA]; + public: + uint32_t getKeywordSize(){ return VM_01_MR_LAYOUT_KW_SIZE; } + uint32_t getNonPortHeadSize(){ return VM_01_MR_LAYOUT_NON_PORT_HEAD_SIZE; } + uint32_t getPortSectionSize(){ return VM_01_MR_LAYOUT_PORT_SEC_SIZE; } + ~VM_01_MR_layout() {} }; - // The actual size of the keyword is 255 bytes, which is one byte short - // of the attr_keyword struct. One byte is used for the size in the vpd. - // As long as there is at least one reserved attribute, then all will fit. - const uint32_t ATTR_KEYWORD_SIZE = 255; // keyword size for attributes + class VM_01_MT_layout : public keywordLayout + { + public: + uint32_t getKeywordSize(){ return VM_01_MT_LAYOUT_KW_SIZE; } + uint32_t getNonPortHeadSize(){ return VM_01_MT_LAYOUT_NON_PORT_HEAD_SIZE; } + uint32_t getPortSectionSize(){ return VM_01_MT_LAYOUT_PORT_SEC_SIZE; } + ~VM_01_MT_layout() {} + }; + class layoutFactory + { + public: + static keywordLayout* getLayout(const uint32_t &i_keyword ,const uint32_t &i_ver); + }; + + + //MT and MR keyword layout for VM ver 0. + const uint8_t NUM_MBA = 2; //There are 2 MBAs per Centaur memory buffer + const uint8_t NUM_PORTS = 2; //Each MBA has 2 ports + const uint8_t NUM_DIMMS = 2; //Each port has 2 DIMMs + const uint8_t NUM_RANKS = 4; //Number of ranks // DIMM types enum DimmType @@ -76,14 +116,19 @@ namespace getAttrData ISDIMM = 2, }; + //Exceptions for MT keyword layout for VM ver 1. + + // Versions to check for enum VpdVersion { VD_VER = 0x010000, // Version came from VD keyword VZ_VER = 0x020000, // Version came from VZ keyword + VM_VER = 0x040000, // Version came from VM keyword ALL_VD = VD_VER, // Base value for VD keyword (version=0) ALL_VZ = VZ_VER, // Base value for VZ keyword (version=0) - ALL_VER = VD_VER|VZ_VER, // Base value for all versions + ALL_VM = VM_VER, // Base value for VM keyword (version=0) + ALL_VER = VD_VER|VZ_VER|VM_VER, // Base value for all versions // VZ values VZ_10 = VZ_VER | 0x3130, // Version 6.0 is ascii "10" @@ -91,6 +136,14 @@ namespace getAttrData // VD values VD_01 = VD_VER | 0x3031, // VD version "01" + + // VM values + VM_01 = VM_VER | 0x0001, // VM version "01" in hex + + // Supported VM version range + // As of now only VM_01 is supported + VM_SUPPORTED_HIGH_VER = 0x01, + VM_NOT_SUPPORTED = 0x00, VER_MASK= 0xffff, // Just version INVALID_VER = 0, // Invalid initialization value @@ -166,6 +219,14 @@ namespace getAttrData SPECIAL_PROCESSING_MASK = 0xFF00, }; +// VM keyword defination + struct MBvpdVMKeyword + { + uint8_t iv_version; + uint8_t iv_systemType; + uint8_t iv_systemType_ext; + uint8_t iv_dataVersion; + }; // Attribute definition struct MBvpdAttrDef { @@ -340,6 +401,22 @@ template<>class MBvpdAttrDataType<fapi::ATTR_VPD_CEN_PHASE_ROT_M1_CNTL_ODT0> { public: typedef fapi::ATTR_VPD_CEN_PHASE_ROT_M1_CNTL_ODT0_Type Type; }; template<>class MBvpdAttrDataType<fapi::ATTR_VPD_CEN_PHASE_ROT_M1_CNTL_ODT1> { public: typedef fapi::ATTR_VPD_CEN_PHASE_ROT_M1_CNTL_ODT1_Type Type; }; +template<>class MBvpdAttrDataType<fapi::ATTR_VPD_MR_VERSION_BYTE> + { public: typedef fapi::ATTR_VPD_MR_VERSION_BYTE_Type Type; }; +template<>class MBvpdAttrDataType<fapi::ATTR_VPD_MR_DATA_CONTROL_BYTE> + { public: typedef fapi::ATTR_VPD_MR_DATA_CONTROL_BYTE_Type Type; }; +template<>class MBvpdAttrDataType<fapi::ATTR_VPD_PERIODIC_MEMCAL_MODE_OPTIONS> + { public: typedef fapi::ATTR_VPD_PERIODIC_MEMCAL_MODE_OPTIONS_Type Type; }; +template<>class MBvpdAttrDataType<fapi::ATTR_VPD_MT_VERSION_BYTE> + { public: typedef fapi::ATTR_VPD_MT_VERSION_BYTE_Type Type; }; +template<>class MBvpdAttrDataType<fapi::ATTR_VPD_MT_DATA_CONTROL_BYTE> + { public: typedef fapi::ATTR_VPD_MT_DATA_CONTROL_BYTE_Type Type; }; +template<>class MBvpdAttrDataType<fapi::ATTR_VPD_DRAM_RTT_PARK> + { public: typedef fapi::ATTR_VPD_DRAM_RTT_PARK_Type Type; }; +template<>class MBvpdAttrDataType<fapi::ATTR_VPD_RD_CTR_WINDAGE_OFFSET> + { public: typedef fapi::ATTR_VPD_RD_CTR_WINDAGE_OFFSET_Type Type; }; + + // There is no ATTR_VPD_DRAM_2N_MODE attribute. getMBvpdAttr is called // directly using ATTR_VPD_DRAM_2N_MODE_ENABLED as an ID. //template<>class MBvpdAttrDataType<fapi::ATTR_VPD_DRAM_2N_MODE> @@ -381,6 +458,8 @@ typedef fapi::ReturnCode (*getMBvpdAttr_FP_t) (const fapi::Target &, const fapi::AttributeId, void *, const size_t); + + extern "C" { /** @@ -399,6 +478,16 @@ fapi::ReturnCode getMBvpdAttr( const fapi::AttributeId i_attr, void * o_pVal, const size_t i_valSize); + +/** + * @brief Find dimm info; parent, type, position + */ +fapi::ReturnCode findDimmInfo (const fapi::Target & i_mbaTarget, + fapi::Target & o_mbTarget, + uint8_t & o_pos, + fapi::getAttrData::DimmType & o_dimmType); + + } #endif diff --git a/src/include/usr/hwpf/hwp/mvpd_accessors/getMBvpdMemoryDataVersion.H b/src/include/usr/hwpf/hwp/mvpd_accessors/getMBvpdMemoryDataVersion.H new file mode 100644 index 000000000..f172508cb --- /dev/null +++ b/src/include/usr/hwpf/hwp/mvpd_accessors/getMBvpdMemoryDataVersion.H @@ -0,0 +1,62 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/include/usr/hwpf/hwp/mvpd_accessors/getMBvpdMemoryDataVersion.H $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +// $Id: getMBvpdMemoryDataVersion.H,v 1.2 2015/10/06 15:18:04 dcrowell Exp $ +/** + * @file getMBvpdMemoryDataVersion.H + * + * @brief MBVPD Accessor for providing the ATTR_VPD_VM_KEYWORD attribute + */ + +#ifndef _HWP_GETMBVPDMEMDATAVERSION_ +#define _HWP_GETMBVPDMEMDATAVERSION_ + +#include <fapi.H> +#define VM_KEYWORD_DEFAULT_VALUE 0x00000000 + +// function pointer typedef definition for HWP call support +typedef fapi::ReturnCode (*getMBvpdMemoryDataVersion_FP_t) + (const fapi::Target &, uint32_t &); + +extern "C" +{ +/** + * @brief Get the ATTR_VPD_VM_KEYWORD FAPI attribute + * + * Return the Memory Data version from MBvpd record SPDX keyword VM. + * + * The ATTR_VPD_VM_KEYWORD attribute is associated with a DIMM. The platfrom must + * get the associated Membuff chip to be passed to this hwp accessor. + * + * @param[in] i_mbTarget - Reference to membuf Target + * @param[out] o_val - Filled in with vpd version + * + * @return fapi::ReturnCode FAPI_RC_SUCCESS if success, else error code + */ +fapi::ReturnCode getMBvpdMemoryDataVersion( + const fapi::Target & i_mbTarget, + uint32_t & o_val); +} + +#endif diff --git a/src/include/usr/hwpf/hwp/mvpd_accessors/getMBvpdSPDXRecordVersion.H b/src/include/usr/hwpf/hwp/mvpd_accessors/getMBvpdSPDXRecordVersion.H new file mode 100644 index 000000000..647e68189 --- /dev/null +++ b/src/include/usr/hwpf/hwp/mvpd_accessors/getMBvpdSPDXRecordVersion.H @@ -0,0 +1,62 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/include/usr/hwpf/hwp/mvpd_accessors/getMBvpdSPDXRecordVersion.H $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +// $Id: getMBvpdSPDXRecordVersion.H,v 1.1 2015/09/29 16:25:03 dcrowell Exp $ +/** + * @file getMBvpdSPDXRecordVersion.H + * + * @brief MBVPD Accessor for providing the ATTR_VPD_VD_KEYWORD attribute + */ + +#ifndef _HWP_GETMBVPDSPDXVERSION_ +#define _HWP_GETMBVPDSPDXVERSION_ + +#include <fapi.H> +#define VD_KEYWORD_DEFAULT_VALUE 0x0000 + +// function pointer typedef definition for HWP call support +typedef fapi::ReturnCode (*getMBvpdSPDXRecordVersion_FP_t) + (const fapi::Target &, uint32_t &); + +extern "C" +{ +/** + * @brief Get the ATTR_VPD_VD_KEYWORD FAPI attribute + * + * Return the SPDX version from MBvpd record SPDX keyword VD. + * + * The ATTR_VPD_VD_KEYWORD attribute is associated with a DIMM. The platfrom must + * get the associated MemBuff chip to be passed to this hwp accessor. + * + * @param[in] i_mbTarget - Reference to membuf Target + * @param[out] o_val - Filled in with vpd version + * + * @return fapi::ReturnCode FAPI_RC_SUCCESS if success, else error code + */ +fapi::ReturnCode getMBvpdSPDXRecordVersion( + const fapi::Target & i_mbTarget, + uint32_t & o_val); +} + +#endif diff --git a/src/include/usr/hwpf/hwp/mvpd_accessors/getMBvpdSlopeInterceptData.H b/src/include/usr/hwpf/hwp/mvpd_accessors/getMBvpdSlopeInterceptData.H index 1a3fbb733..d88a087a7 100644 --- a/src/include/usr/hwpf/hwp/mvpd_accessors/getMBvpdSlopeInterceptData.H +++ b/src/include/usr/hwpf/hwp/mvpd_accessors/getMBvpdSlopeInterceptData.H @@ -5,7 +5,9 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* COPYRIGHT International Business Machines Corp. 2012,2014 */ +/* Contributors Listed Below - COPYRIGHT 2013,2015 */ +/* [+] International Business Machines Corp. */ +/* */ /* */ /* Licensed under the Apache License, Version 2.0 (the "License"); */ /* you may not use this file except in compliance with the License. */ @@ -20,7 +22,7 @@ /* permissions and limitations under the License. */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: getMBvpdSlopeInterceptData.H,v 1.1 2013/07/18 15:35:01 whs Exp $ +// $Id: getMBvpdSlopeInterceptData.H,v 1.2 2015/09/29 15:59:42 dcrowell Exp $ /** * @file getMBvpdSlopeInterceptData.H @@ -43,6 +45,10 @@ namespace fapi MASTER_POWER_INTERCEPT = 0x01, SUPPLIER_POWER_SLOPE = 0x02, SUPPLIER_POWER_INTERCEPT = 0x03, + MASTER_TOTAL_POWER_SLOPE = 0x04, + MASTER_TOTAL_POWER_INTERCEPT = 0x05, + SUPPLIER_TOTAL_POWER_SLOPE = 0x06, + SUPPLIER_TOTAL_POWER_INTERCEPT = 0x07, }; } diff --git a/src/include/usr/hwpf/hwp/mvpd_accessors/getMBvpdVoltageSettingData.H b/src/include/usr/hwpf/hwp/mvpd_accessors/getMBvpdVoltageSettingData.H new file mode 100644 index 000000000..90f5a4d4e --- /dev/null +++ b/src/include/usr/hwpf/hwp/mvpd_accessors/getMBvpdVoltageSettingData.H @@ -0,0 +1,61 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/include/usr/hwpf/hwp/mvpd_accessors/getMBvpdVoltageSettingData.H $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +// $Id: getMBvpdVoltageSettingData.H,v 1.1 2015/09/29 16:25:05 dcrowell Exp $ +/** + * @file getMBvpdVoltageSettingData.H + * + * @brief MBVPD Accessor for providing the ATTR_VPD_DW_KEYWORD attribute + */ + +#ifndef _HWP_GETMBVPDDWDATA_ +#define _HWP_GETMBVPDDWDATA_ + +#include <fapi.H> +#define DW_KEYWORD_DEFAULT_VALUE 0x0109 +// function pointer typedef definition for HWP call support +typedef fapi::ReturnCode (*getMBvpdVoltageSettingData_FP_t) + (const fapi::Target &, uint32_t &); + +extern "C" +{ +/** + * @brief Get the ATTR_VPD_DW_KEYWORD FAPI attribute + * + * Return the voltage setting data from MBvpd record SPDX keyword DW. + * + * The ATTR_VPD_DW_KEYWORD attribute is associated with a DIMM. The platfrom must + * get the associated MemBuff chip to be passed to this hwp accessor. + * + * @param[in] i_mbTarget - Reference to membuff Target + * @param[out] o_val - Filled in with vpd version + * + * @return fapi::ReturnCode FAPI_RC_SUCCESS if success, else error code + */ +fapi::ReturnCode getMBvpdVoltageSettingData( + const fapi::Target & i_mbTarget, + uint32_t & o_val); +} + +#endif diff --git a/src/include/usr/hwpf/plat/fapiPlatAttributeService.H b/src/include/usr/hwpf/plat/fapiPlatAttributeService.H index c7bd87109..cfadb2cca 100644 --- a/src/include/usr/hwpf/plat/fapiPlatAttributeService.H +++ b/src/include/usr/hwpf/plat/fapiPlatAttributeService.H @@ -51,6 +51,9 @@ #include <hwpf/hwp/mvpd_accessors/getMBvpdSlopeInterceptData.H> #include <hwpf/hwp/mvpd_accessors/getMBvpdSpareDramData.H> #include <hwpf/hwp/mvpd_accessors/getMBvpdVersion.H> +#include <hwpf/hwp/mvpd_accessors/getMBvpdMemoryDataVersion.H> +#include <hwpf/hwp/mvpd_accessors/getMBvpdSPDXRecordVersion.H> +#include <hwpf/hwp/mvpd_accessors/getMBvpdVoltageSettingData.H> #include <hwpf/hwp/mvpd_accessors/getMBvpdDram2NModeEnabled.H> #include <hwpf/hwp/mvpd_accessors/getMBvpdSensorMap.H> #include <hwpf/hwp/mvpd_accessors/getControlCapableData.H> @@ -197,6 +200,17 @@ fapi::ReturnCode fapiPlatGetTargetName(const fapi::Target * i_pFapiTarget, /** * @brief This function is called by the FAPI_ATTR_GET macro when getting + * ATTR_MODULE_TYPE. It should not be called directly + * + * @param[in] i_pFapiTarget Target pointer + * @param[out] o_name Output Name (from enum ATTR_MODULE_TYPE_Enum) + * @return ReturnCode. Zero on success, else platform specified error + */ +fapi::ReturnCode fapiPlatGetModuleType(const fapi::Target * i_pFapiTarget, + uint8_t & o_name); + +/** + * @brief This function is called by the FAPI_ATTR_GET macro when getting * ATTR_FUNCTIONAL. It should not be called directly * * @param[in] i_pFapiTarget Target pointer @@ -522,6 +536,42 @@ fapi::ReturnCode fapiPlatDimmGetBadDqBitmap ( [DIMM_DQ_RANK_BITMAP_SIZE]); /** * @brief This function is called by the FAPI_ATTR_GET macro when getting + * the memory data version + * It should not be called directly. + * + * @param[in] i_pTarget Target DIMM pointer + * @param[out] o_val Memory Data version + * @return ReturnCode. Zero on success, else platform specified error + */ +fapi::ReturnCode fapiPlatGetMBvpdMemoryDataVersion( + const fapi::Target * i_pTarget, + uint32_t & o_val ); +/** + * @brief This function is called by the FAPI_ATTR_GET macro when getting + * the SPDX/VSPD Record version + * It should not be called directly. + * + * @param[in] i_pTarget Target DIMM pointer + * @param[out] o_val SPDX/VSPD version + * @return ReturnCode. Zero on success, else platform specified error + */ +fapi::ReturnCode fapiPlatGetMBvpdSPDXRecordVersion ( + const fapi::Target * i_pTarget, + uint32_t & o_val ); +/** + * @brief This function is called by the FAPI_ATTR_GET macro when getting + * the Voltage setting Data + * It should not be called directly. + * + * @param[in] i_pTarget Target DIMM pointer + * @param[out] o_val Voltage setting Data + * @return ReturnCode. Zero on success, else platform specified error + */ +fapi::ReturnCode fapiPlatGetMBvpdVoltageSettingData ( + const fapi::Target * i_pTarget, + uint32_t & o_val ); +/** + * @brief This function is called by the FAPI_ATTR_GET macro when getting * the vpd version * It should not be called directly. * @@ -533,6 +583,7 @@ fapi::ReturnCode fapiPlatGetVpdVersion ( const fapi::Target * i_pTarget, uint32_t & o_val ); + /** * @brief This function is called by the FAPI_ATTR_GET macro when getting * the Dram 2N Mode Enabled attribute @@ -760,7 +811,7 @@ fapi::ReturnCode getIsDimmToC4DQS /** * @brief This function is called by the FAPI_ATTR_GET macro when getting - * the ATTR_VPD_DIMM_RCD_CNTL_WORD_0_15 attribute. + * the ATTR_SPD_DIMM_RCD_CNTL_WORD_0_15 attribute. * It should not be called directly. * * @param[in] i_pTarget Mem Buf Target pointer @@ -808,7 +859,7 @@ fapi::ReturnCode fapiPlatGetTpVitlSpyOffsetAttr( uint32_t (&o_data)[SPY_OFFSET_SIZE]); /* * @brief This function is called by the FAPI_ATTR_GET macro when getting - * certain memory attributes + * certain memory attributes at node level * It should not be called directly. * * @param[in] i_pTarget Target Centaur pointer @@ -816,7 +867,7 @@ fapi::ReturnCode fapiPlatGetTpVitlSpyOffsetAttr( * @param[out] o_val Attribute Value * @return ReturnCode. Zero on success, else platform specified error */ -fapi::ReturnCode fapiPlatGetMemAttrData ( +fapi::ReturnCode fapiPlatGetNodeMemAttrData ( const fapi::Target * i_pTarget, const TARGETING::ATTRIBUTE_ID i_attr, uint32_t & o_val); @@ -862,10 +913,14 @@ fapi::ReturnCode fapiPlatGetMemAttrData ( //------------------------------------------------------------------------------ // MACRO to support the RCD Control Word attribute //------------------------------------------------------------------------------ +#define ATTR_SPD_DIMM_RCD_CNTL_WORD_0_15_GETMACRO(ID, PTARGET, VAL)\ + fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ?\ + fapi::FAPI_RC_SUCCESS : fapi::platAttrSvc::fapiPlatGetRCDCntlWord015(PTARGET,VAL) #define ATTR_VPD_DIMM_RCD_CNTL_WORD_0_15_GETMACRO(ID, PTARGET, VAL)\ fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ?\ fapi::FAPI_RC_SUCCESS : fapi::platAttrSvc::fapiPlatGetRCDCntlWord015(PTARGET,VAL) + //------------------------------------------------------------------------------ // MACRO to support the power control capable memory attribute //------------------------------------------------------------------------------ @@ -885,14 +940,19 @@ fapi::ReturnCode fapiPlatGetMemAttrData ( fapi::FAPI_RC_SUCCESS : fapi::platAttrSvc::getIsDimmToC4DQS(PTARGET,VAL) //------------------------------------------------------------------------------ +// MACRO to support the MODULE TYPE attributes. +//------------------------------------------------------------------------------ + +#define ATTR_SPD_MODULE_TYPE_GETMACRO(ID, PTARGET, VAL) \ + fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL)?\ + fapi::FAPI_RC_SUCCESS : fapi::platAttrSvc::fapiPlatGetModuleType( PTARGET,VAL) + +//------------------------------------------------------------------------------ // MACROs to route each ATTR_SPD access to the Hostboot SPD function //------------------------------------------------------------------------------ #define ATTR_SPD_DRAM_DEVICE_TYPE_GETMACRO(ID, PTARGET, VAL) \ fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ? fapi::FAPI_RC_SUCCESS : \ fapi::platAttrSvc::fapiPlatGetSpdAttr( PTARGET, SPD::BASIC_MEMORY_TYPE, &(VAL), sizeof(VAL) ) -#define ATTR_SPD_MODULE_TYPE_GETMACRO(ID, PTARGET, VAL) \ - fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ? fapi::FAPI_RC_SUCCESS : \ - fapi::platAttrSvc::fapiPlatGetSpdAttr( PTARGET, SPD::MODULE_TYPE, &(VAL), sizeof(VAL) ) #define ATTR_SPD_SDRAM_DENSITY_GETMACRO(ID, PTARGET, VAL) \ fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ? fapi::FAPI_RC_SUCCESS : \ fapi::platAttrSvc::fapiPlatGetSpdAttr( PTARGET, SPD::DENSITY, &(VAL), sizeof(VAL) ) @@ -1175,78 +1235,77 @@ fapi::ReturnCode fapiPlatGetMemAttrData ( #define ATTR_SPD_CRC_MNFG_SEC_DDR4_GETMACRO(ID, PTARGET, VAL) \ fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ? fapi::FAPI_RC_SUCCESS : \ fapi::platAttrSvc::fapiPlatGetSpdAttr( PTARGET, SPD::MANUFACTURING_SECTION_CRC, &(VAL), sizeof(VAL) ) -#define ATTR_SPD_LR_REGISTER_MANF_ID_GETMACRO(ID, PTARGET, VAL) \ +#define ATTR_SPD_REGISTER_MANF_ID_GETMACRO(ID, PTARGET, VAL) \ + fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ? fapi::FAPI_RC_SUCCESS : \ + fapi::platAttrSvc::fapiPlatGetSpdAttr( PTARGET, SPD::MODSPEC_MM_MFR_ID_CODE, &(VAL), sizeof(VAL) ) +#define ATTR_SPD_DIMM_MODULE_ATTRIBUTES_GETMACRO(ID, PTARGET, VAL) \ fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ? fapi::FAPI_RC_SUCCESS : \ - fapi::platAttrSvc::fapiPlatGetSpdAttr( PTARGET, SPD::LR_REGISTER_MANF_ID, &(VAL), sizeof(VAL) ) -#define ATTR_SPD_LR_ADDR_MAP_REG_TO_DRAM_GETMACRO(ID, PTARGET, VAL) \ + fapi::platAttrSvc::fapiPlatGetSpdAttr( PTARGET, SPD::MODSPEC_MM_ATTRIBS, &(VAL), sizeof(VAL) ) +#define ATTR_SPD_ADDR_MAP_REG_TO_DRAM_GETMACRO(ID, PTARGET, VAL) \ fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ? fapi::FAPI_RC_SUCCESS : \ - fapi::platAttrSvc::fapiPlatGetSpdAttr( PTARGET, SPD::LR_REGISTER_MANF_ID, &(VAL), sizeof(VAL) ) -#define ATTR_SPD_LR_REG_OUTPUT_DRV_STRENGTH_CK_GETMACRO(ID, PTARGET, VAL) \ + fapi::platAttrSvc::fapiPlatGetSpdAttr( PTARGET, SPD::MODSPEC_MM_ADDR_MAPPING, &(VAL), sizeof(VAL) ) +#define ATTR_SPD_OUTPUT_DRV_STRENGTH_CNTL_GETMACRO(ID, PTARGET, VAL) \ fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ? fapi::FAPI_RC_SUCCESS : \ - fapi::platAttrSvc::fapiPlatGetSpdAttr( PTARGET, SPD::LR_REG_OUTPUT_DRV_STRENGTH_CK, &(VAL), sizeof(VAL) ) + fapi::platAttrSvc::fapiPlatGetSpdAttr( PTARGET, SPD::MODSPEC_MM_DRV_STRENGTH_CNTL, &(VAL), sizeof(VAL) ) +#define ATTR_SPD_REG_OUTPUT_DRV_STRENGTH_CK_GETMACRO(ID, PTARGET, VAL) \ + fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ? fapi::FAPI_RC_SUCCESS : \ + fapi::platAttrSvc::fapiPlatGetSpdAttr( PTARGET, SPD::MODSPEC_MM_DRV_STRENGTH_CK, &(VAL), sizeof(VAL) ) #define ATTR_SPD_LR_DRAM_VREF_DQ_RANK0_GETMACRO(ID, PTARGET, VAL) \ fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ? fapi::FAPI_RC_SUCCESS : \ - fapi::platAttrSvc::fapiPlatGetSpdAttr( PTARGET, SPD::LR_VREF_DQ_RANK0, &(VAL), sizeof(VAL) ) + fapi::platAttrSvc::fapiPlatGetSpdAttr( PTARGET, SPD::LRMM_VREF_DQ_RANK0, &(VAL), sizeof(VAL) ) #define ATTR_SPD_LR_DRAM_VREF_DQ_RANK1_GETMACRO(ID, PTARGET, VAL) \ fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ? fapi::FAPI_RC_SUCCESS : \ - fapi::platAttrSvc::fapiPlatGetSpdAttr( PTARGET, SPD::LR_VREF_DQ_RANK1, &(VAL), sizeof(VAL) ) + fapi::platAttrSvc::fapiPlatGetSpdAttr( PTARGET, SPD::LRMM_VREF_DQ_RANK1, &(VAL), sizeof(VAL) ) #define ATTR_SPD_LR_DRAM_VREF_DQ_RANK2_GETMACRO(ID, PTARGET, VAL) \ fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ? fapi::FAPI_RC_SUCCESS : \ - fapi::platAttrSvc::fapiPlatGetSpdAttr( PTARGET, SPD::LR_VREF_DQ_RANK2, &(VAL), sizeof(VAL) ) + fapi::platAttrSvc::fapiPlatGetSpdAttr( PTARGET, SPD::LRMM_VREF_DQ_RANK2, &(VAL), sizeof(VAL) ) #define ATTR_SPD_LR_DRAM_VREF_DQ_RANK3_GETMACRO(ID, PTARGET, VAL) \ fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ? fapi::FAPI_RC_SUCCESS : \ - fapi::platAttrSvc::fapiPlatGetSpdAttr( PTARGET, SPD::LR_VREF_DQ_RANK3, &(VAL), sizeof(VAL) ) + fapi::platAttrSvc::fapiPlatGetSpdAttr( PTARGET, SPD::LRMM_VREF_DQ_RANK3, &(VAL), sizeof(VAL) ) #define ATTR_SPD_LR_BUF_VREF_DQ_FOR_DRAM_GETMACRO(ID, PTARGET, VAL) \ fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ? fapi::FAPI_RC_SUCCESS : \ - fapi::platAttrSvc::fapiPlatGetSpdAttr( PTARGET, SPD::LR_BUF_VREF_DQ_FOR_DRAM, &(VAL), sizeof(VAL) ) + fapi::platAttrSvc::fapiPlatGetSpdAttr( PTARGET, SPD::LRMM_VREF_DQ_FOR_DRAM, &(VAL), sizeof(VAL) ) #define ATTR_SPD_LR_BUF_MDQ_DRV_LESS_THAN_1866_GETMACRO(ID, PTARGET, VAL) \ fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ? fapi::FAPI_RC_SUCCESS : \ - fapi::platAttrSvc::fapiPlatGetSpdAttr( PTARGET, SPD::LR_BUF_MDQ_DRV_LESS_THAN_1866, &(VAL), sizeof(VAL) ) + fapi::platAttrSvc::fapiPlatGetSpdAttr( PTARGET, SPD::LRMM_MDQ_DRV_LT_1866, &(VAL), sizeof(VAL) ) #define ATTR_SPD_LR_BUF_MDQ_DRV_1866_2400_GETMACRO(ID, PTARGET, VAL) \ fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ? fapi::FAPI_RC_SUCCESS : \ - fapi::platAttrSvc::fapiPlatGetSpdAttr( PTARGET, SPD::LR_BUF_MDQ_DRV_1866_2400, &(VAL), sizeof(VAL) ) + fapi::platAttrSvc::fapiPlatGetSpdAttr( PTARGET, SPD::LRMM_MDQ_DRV_1866_2400, &(VAL), sizeof(VAL) ) #define ATTR_SPD_LR_BUF_MDQ_DRV_2400_3200_GETMACRO(ID, PTARGET, VAL) \ fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ? fapi::FAPI_RC_SUCCESS : \ - fapi::platAttrSvc::fapiPlatGetSpdAttr( PTARGET, SPD::LR_BUF_MDQ_DRV_2400_3200, &(VAL), sizeof(VAL) ) + fapi::platAttrSvc::fapiPlatGetSpdAttr( PTARGET, SPD::LRMM_MDQ_DRV_2400_3200, &(VAL), sizeof(VAL) ) #define ATTR_SPD_LR_DRAM_DRV_STRENGTH_GETMACRO(ID, PTARGET, VAL) \ fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ? fapi::FAPI_RC_SUCCESS : \ - fapi::platAttrSvc::fapiPlatGetSpdAttr( PTARGET, SPD::LR_DRAM_DRV_STRENGTH, &(VAL), sizeof(VAL) ) + fapi::platAttrSvc::fapiPlatGetSpdAttr( PTARGET, SPD::LRMM_DRV_STRENGTH, &(VAL), sizeof(VAL) ) #define ATTR_SPD_LR_DRAM_ODT_RTT_WR_LESS_THAN_1866_GETMACRO(ID, PTARGET, VAL) \ fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ? fapi::FAPI_RC_SUCCESS : \ - fapi::platAttrSvc::fapiPlatGetSpdAttr( PTARGET, SPD::LR_DRAM_ODT_RTT_WR_LESS_THAN_1866, &(VAL), sizeof(VAL) ) + fapi::platAttrSvc::fapiPlatGetSpdAttr( PTARGET, SPD::LRMM_ODT_RTT_WR_LT_1866, &(VAL), sizeof(VAL) ) #define ATTR_SPD_LR_DRAM_ODT_RTT_NOM_LESS_THAN_1866_GETMACRO(ID, PTARGET, VAL) \ fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ? fapi::FAPI_RC_SUCCESS : \ - fapi::platAttrSvc::fapiPlatGetSpdAttr( PTARGET, SPD::LR_DRAM_ODT_RTT_NOM_LESS_THAN_1866, &(VAL), sizeof(VAL) ) + fapi::platAttrSvc::fapiPlatGetSpdAttr( PTARGET, SPD::LRMM_ODT_RTT_NOM_LT_1866, &(VAL), sizeof(VAL) ) #define ATTR_SPD_LR_DRAM_ODT_RTT_WR_1866_2400_GETMACRO(ID, PTARGET, VAL) \ fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ? fapi::FAPI_RC_SUCCESS : \ - fapi::platAttrSvc::fapiPlatGetSpdAttr( PTARGET, SPD::LR_DRAM_ODT_RTT_WR_1866_2400, &(VAL), sizeof(VAL) ) + fapi::platAttrSvc::fapiPlatGetSpdAttr( PTARGET, SPD::LRMM_ODT_RTT_WR_1866_2400, &(VAL), sizeof(VAL) ) #define ATTR_SPD_LR_DRAM_ODT_RTT_NOM_1866_2400_GETMACRO(ID, PTARGET, VAL) \ fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ? fapi::FAPI_RC_SUCCESS : \ - fapi::platAttrSvc::fapiPlatGetSpdAttr( PTARGET, SPD::LR_DRAM_ODT_RTT_NOM_1866_2400, &(VAL), sizeof(VAL) ) + fapi::platAttrSvc::fapiPlatGetSpdAttr( PTARGET, SPD::LRMM_ODT_RTT_NOM_1866_2400, &(VAL), sizeof(VAL) ) #define ATTR_SPD_LR_DRAM_ODT_RTT_WR_2400_3200_GETMACRO(ID, PTARGET, VAL) \ fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ? fapi::FAPI_RC_SUCCESS : \ - fapi::platAttrSvc::fapiPlatGetSpdAttr( PTARGET, SPD::LR_DRAM_ODT_RTT_WR_2400_3200, &(VAL), sizeof(VAL) ) + fapi::platAttrSvc::fapiPlatGetSpdAttr( PTARGET, SPD::LRMM_ODT_RTT_WR_2400_3200, &(VAL), sizeof(VAL) ) #define ATTR_SPD_LR_DRAM_ODT_RTT_NOM_2400_3200_GETMACRO(ID, PTARGET, VAL) \ fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ? fapi::FAPI_RC_SUCCESS : \ - fapi::platAttrSvc::fapiPlatGetSpdAttr( PTARGET, SPD::LR_DRAM_ODT_RTT_NOM_2400_3200, &(VAL), sizeof(VAL) ) + fapi::platAttrSvc::fapiPlatGetSpdAttr( PTARGET, SPD::LRMM_ODT_RTT_NOM_2400_3200, &(VAL), sizeof(VAL) ) #define ATTR_SPD_LR_DRAM_ODT_RTT_PARK_LESS_THAN_1866_GETMACRO(ID, PTARGET, VAL) \ fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ? fapi::FAPI_RC_SUCCESS : \ - fapi::platAttrSvc::fapiPlatGetSpdAttr( PTARGET, SPD::LR_DRAM_ODT_RTT_PARK_LESS_THAN_1866, &(VAL), sizeof(VAL) ) + fapi::platAttrSvc::fapiPlatGetSpdAttr( PTARGET, SPD::LRMM_ODT_RTT_PARK_LT_1866, &(VAL), sizeof(VAL) ) #define ATTR_SPD_LR_DRAM_ODT_RTT_PARK_1866_2400_GETMACRO(ID, PTARGET, VAL) \ fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ? fapi::FAPI_RC_SUCCESS : \ - fapi::platAttrSvc::fapiPlatGetSpdAttr( PTARGET, SPD::LR_DRAM_ODT_RTT_PARK_1866_2400, &(VAL), sizeof(VAL) ) + fapi::platAttrSvc::fapiPlatGetSpdAttr( PTARGET, SPD::LRMM_ODT_RTT_PARK_1866_2400, &(VAL), sizeof(VAL) ) #define ATTR_SPD_LR_DRAM_ODT_RTT_PARK_2400_3200_GETMACRO(ID, PTARGET, VAL) \ fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ? fapi::FAPI_RC_SUCCESS : \ - fapi::platAttrSvc::fapiPlatGetSpdAttr( PTARGET, SPD::LR_DRAM_ODT_RTT_PARK_2400_3200, &(VAL), sizeof(VAL) ) - #define ATTR_SPD_DIMM_RCD_CNTL_WORD_0_15_GETMACRO(ID, PTARGET, VAL) \ - fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ? fapi::FAPI_RC_SUCCESS : \ - fapi::platAttrSvc::fapiPlatGetSpdAttr( PTARGET, SPD::DIMM_RCD_CNTL_WORD_0_15, &(VAL), sizeof(VAL) ) - #define ATTR_SPD_DIMM_MODULE_LR_ATTRIBUTES_GETMACRO(ID, PTARGET, VAL) \ - fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ? fapi::FAPI_RC_SUCCESS : \ - fapi::platAttrSvc::fapiPlatGetSpdAttr( PTARGET, SPD::DIMM_MODULE_LR_ATTRIBUTES, &(VAL), sizeof(VAL) ) - - + fapi::platAttrSvc::fapiPlatGetSpdAttr( PTARGET, SPD::LRMM_ODT_RTT_PARK_2400_3200, &(VAL), sizeof(VAL) ) +//------------------------------------------------------------------------------ // MACRO to route ATTR_CEN_DQ_TO_DIMM_CONN_DQ access to the correct Hostboot // function //------------------------------------------------------------------------------ @@ -1354,6 +1413,72 @@ fapi::ReturnCode fapiPlatGetMemAttrData ( fapi::platAttrSvc::fapiPlatGetSingleMemberEnableAttr ( PTARGET, VAL ) //------------------------------------------------------------------------------ +// MACROS to support MBVPD exclusive DDR4 attributes +//------------------------------------------------------------------------------ + + +#define ATTR_VPD_MR_VERSION_BYTE_GETMACRO(ID, PTARGET, VAL)\ + fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ?\ + fapi::FAPI_RC_SUCCESS :\ + (checkAttrDataType<fapi::ATTR_VPD_MR_VERSION_BYTE>(VAL), \ + fapi::platAttrSvc::fapiPlatGetAttrData\ + (PTARGET, fapi::ATTR_VPD_MR_VERSION_BYTE, VAL, sizeof(VAL))) +#define ATTR_VPD_MR_DATA_CONTROL_BYTE_GETMACRO(ID, PTARGET, VAL)\ + fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ?\ + fapi::FAPI_RC_SUCCESS :\ + (checkAttrDataType<fapi::ATTR_VPD_MR_DATA_CONTROL_BYTE>(VAL), \ + fapi::platAttrSvc::fapiPlatGetAttrData\ + (PTARGET, fapi::ATTR_VPD_MR_DATA_CONTROL_BYTE, VAL, sizeof(VAL))) +#define ATTR_VPD_PERIODIC_MEMCAL_MODE_OPTIONS_GETMACRO(ID, PTARGET, VAL)\ + fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ?\ + fapi::FAPI_RC_SUCCESS :\ + (checkAttrDataType<fapi::ATTR_VPD_PERIODIC_MEMCAL_MODE_OPTIONS>(VAL), \ + fapi::platAttrSvc::fapiPlatGetAttrData\ + (PTARGET, fapi::ATTR_VPD_PERIODIC_MEMCAL_MODE_OPTIONS, VAL, sizeof(VAL))) +#define ATTR_VPD_MT_VERSION_BYTE_GETMACRO(ID, PTARGET, VAL)\ + fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ?\ + fapi::FAPI_RC_SUCCESS :\ + (checkAttrDataType<fapi::ATTR_VPD_MT_VERSION_BYTE>(VAL), \ + fapi::platAttrSvc::fapiPlatGetAttrData\ + (PTARGET, fapi::ATTR_VPD_MT_VERSION_BYTE, VAL, sizeof(VAL))) +#define ATTR_VPD_MT_DATA_CONTROL_BYTE_GETMACRO(ID, PTARGET, VAL)\ + fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ?\ + fapi::FAPI_RC_SUCCESS :\ + (checkAttrDataType<fapi::ATTR_VPD_MT_DATA_CONTROL_BYTE>(VAL), \ + fapi::platAttrSvc::fapiPlatGetAttrData\ + (PTARGET, fapi::ATTR_VPD_MT_DATA_CONTROL_BYTE, VAL, sizeof(VAL))) +#define ATTR_VPD_DRAM_RTT_PARK_GETMACRO(ID, PTARGET, VAL)\ + fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ?\ + fapi::FAPI_RC_SUCCESS :\ + (checkAttrDataType<fapi::ATTR_VPD_DRAM_RTT_PARK>(VAL), \ + fapi::platAttrSvc::fapiPlatGetAttrData\ + (PTARGET, fapi::ATTR_VPD_DRAM_RTT_PARK, VAL, sizeof(VAL))) +#define ATTR_VPD_VM_KEYWORD_GETMACRO(ID, PTARGET, VAL)\ + fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ?\ + fapi::FAPI_RC_SUCCESS :\ + (checkAttrDataType<fapi::ATTR_VPD_VM_KEYWORD>(VAL), \ + fapi::platAttrSvc::fapiPlatGetMBvpdMemoryDataVersion\ + (PTARGET, VAL)) +#define ATTR_VPD_VD_KEYWORD_GETMACRO(ID, PTARGET, VAL)\ + fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ?\ + fapi::FAPI_RC_SUCCESS :\ + (checkAttrDataType<fapi::ATTR_VPD_VD_KEYWORD>(VAL), \ + fapi::platAttrSvc::fapiPlatGetMBvpdSPDXRecordVersion \ + (PTARGET, VAL)) +#define ATTR_VPD_DW_KEYWORD_GETMACRO(ID, PTARGET, VAL)\ + fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ?\ + fapi::FAPI_RC_SUCCESS :\ + (checkAttrDataType<fapi::ATTR_VPD_DW_KEYWORD>(VAL), \ + fapi::platAttrSvc::fapiPlatGetMBvpdVoltageSettingData\ + (PTARGET, VAL, )) +#define ATTR_VPD_RD_CTR_WINDAGE_OFFSET_GETMACRO(ID, PTARGET, VAL)\ + fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ?\ + fapi::FAPI_RC_SUCCESS :\ + (checkAttrDataType<fapi::ATTR_VPD_RD_CTR_WINDAGE_OFFSET>(VAL), \ + fapi::platAttrSvc::fapiPlatGetAttrData\ + (PTARGET, fapi::ATTR_VPD_RD_CTR_WINDAGE_OFFSET, VAL, sizeof(VAL))) + +//------------------------------------------------------------------------------ // MACROS to support MBVPD Phase Rotator attributes //------------------------------------------------------------------------------ #ifndef CONFIG_VPD_GETMACRO_USE_EFF_ATTR @@ -2239,67 +2364,6 @@ fapi::ReturnCode fapiPlatGetMemAttrData ( (checkAttrDataType<fapi::ATTR_VPD_GPO>(VAL), \ fapi::platAttrSvc::fapiPlatGetAttrData\ (PTARGET, fapi::ATTR_VPD_GPO , VAL, sizeof(VAL))) -#define ATTR_VPD_DRAM_RTT_PARK_GETMACRO(ID, PTARGET, VAL)\ - fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ?\ - fapi::FAPI_RC_SUCCESS :\ - (checkAttrDataType<fapi::ATTR_VPD_DRAM_RTT_PARK>(VAL), \ - fapi::platAttrSvc::fapiPlatGetAttrData\ - (PTARGET, fapi::ATTR_VPD_DRAM_RTT_PARK , VAL, sizeof(VAL))) -#define ATTR_VPD_PERIODIC_MEMCAL_MODE_OPTIONS_GETMACRO(ID, PTARGET, VAL)\ - fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ?\ - fapi::FAPI_RC_SUCCESS :\ - (checkAttrDataType<fapi::ATTR_VPD_PERIODIC_MEMCAL_MODE_OPTIONS>(VAL), \ - fapi::platAttrSvc::fapiPlatGetAttrData\ - (PTARGET, fapi::ATTR_VPD_PERIODIC_MEMCAL_MODE_OPTIONS , VAL, sizeof(VAL))) -#define ATTR_VPD_MT_VERSION_BYTE_GETMACRO(ID, PTARGET, VAL)\ - fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ?\ - fapi::FAPI_RC_SUCCESS :\ - (checkAttrDataType<fapi::ATTR_VPD_MT_VERSION_BYTE>(VAL), \ - fapi::platAttrSvc::fapiPlatGetAttrData\ - (PTARGET, fapi::ATTR_VPD_MT_VERSION_BYTE , VAL, sizeof(VAL))) -#define ATTR_VPD_MR_VERSION_BYTE_GETMACRO(ID, PTARGET, VAL)\ - fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ?\ - fapi::FAPI_RC_SUCCESS :\ - (checkAttrDataType<fapi::ATTR_VPD_MR_VERSION_BYTE>(VAL), \ - fapi::platAttrSvc::fapiPlatGetAttrData\ - (PTARGET, fapi::ATTR_VPD_MR_VERSION_BYTE , VAL, sizeof(VAL))) -#define ATTR_VPD_MR_DATA_CONTROL_BYTE_GETMACRO(ID, PTARGET, VAL)\ - fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ?\ - fapi::FAPI_RC_SUCCESS :\ - (checkAttrDataType<fapi::ATTR_VPD_MR_DATA_CONTROL_BYTE>(VAL), \ - fapi::platAttrSvc::fapiPlatGetAttrData\ - (PTARGET, fapi::ATTR_VPD_MR_DATA_CONTROL_BYTE , VAL, sizeof(VAL))) -#define ATTR_VPD_MT_DATA_CONTROL_BYTE_GETMACRO(ID, PTARGET, VAL)\ - fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ?\ - fapi::FAPI_RC_SUCCESS :\ - (checkAttrDataType<fapi::ATTR_VPD_MT_DATA_CONTROL_BYTE>(VAL), \ - fapi::platAttrSvc::fapiPlatGetAttrData\ - (PTARGET, fapi::ATTR_VPD_MT_DATA_CONTROL_BYTE , VAL, sizeof(VAL))) -#define ATTR_VPD_VM_KEYWORD_GETMACRO(ID, PTARGET, VAL)\ - fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ?\ - fapi::FAPI_RC_SUCCESS :\ - (checkAttrDataType<fapi::ATTR_VPD_VM_KEYWORD_BYTE>(VAL), \ - fapi::platAttrSvc::fapiPlatGetAttrData\ - (PTARGET, fapi::ATTR_VPD_VM_KEYWORD_BYTE , VAL, sizeof(VAL))) -#define ATTR_VPD_VD_KEYWORD_GETMACRO(ID, PTARGET, VAL)\ - fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ?\ - fapi::FAPI_RC_SUCCESS :\ - (checkAttrDataType<fapi::ATTR_VPD_VD_KEYWORD>(VAL), \ - fapi::platAttrSvc::fapiPlatGetAttrData\ - (PTARGET, fapi::ATTR_VPD_VD_KEYWORD , VAL, sizeof(VAL))) -#define ATTR_VPD_DW_KEYWORD_GETMACRO(ID, PTARGET, VAL)\ - fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ?\ - fapi::FAPI_RC_SUCCESS :\ - (checkAttrDataType<fapi::ATTR_VPD_DW_KEYWORD>(VAL), \ - fapi::platAttrSvc::fapiPlatGetAttrData\ - (PTARGET, fapi::ATTR_VPD_DW_KEYWORD , VAL, sizeof(VAL))) -#define ATTR_VPD_RD_CTR_WINDAGE_OFFSET_GETMACRO(ID, PTARGET, VAL)\ - fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ?\ - fapi::FAPI_RC_SUCCESS :\ - (checkAttrDataType<fapi::ATTR_VPD_RD_CTR_WINDAGE_OFFSET>(VAL), \ - fapi::platAttrSvc::fapiPlatGetAttrData\ - (PTARGET, fapi::ATTR_VPD_RD_CTR_WINDAGE_OFFSET , VAL, sizeof(VAL))) - #else #define ATTR_VPD_DRAM_RON_GETMACRO(ID, PTARGET, VAL)\ fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ?\ @@ -2595,7 +2659,6 @@ fapi::ReturnCode fapiPlatGetMemAttrData ( fapi::platAttrSvc::fapiPlatGetSlopeInterceptData \ (PTARGET, fapi::SUPPLIER_TOTAL_POWER_INTERCEPT , VAL) - // MACRO to support BAD_DQ_BITMAP Attribute //------------------------------------------------------------------------------ #define ATTR_BAD_DQ_BITMAP_GETMACRO(ID, PTARGET, VAL) \ @@ -2937,72 +3000,72 @@ fapi::ReturnCode fapiPlatGetMemAttrData ( #define ATTR_MSS_VDD_SLOPE_ACTIVE_GETMACRO(ID, PTARGET, VAL) \ fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ? \ fapi::FAPI_RC_SUCCESS : \ - fapi::platAttrSvc::fapiPlatGetMemAttrData(\ + fapi::platAttrSvc::fapiPlatGetNodeMemAttrData(\ PTARGET, TARGETING::ATTR_MSS_CENT_VDD_SLOPE_ACTIVE, VAL) #define ATTR_MSS_VDD_SLOPE_INACTIVE_GETMACRO(ID, PTARGET, VAL) \ fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ? \ fapi::FAPI_RC_SUCCESS : \ - fapi::platAttrSvc::fapiPlatGetMemAttrData(\ + fapi::platAttrSvc::fapiPlatGetNodeMemAttrData(\ PTARGET, TARGETING::ATTR_MSS_CENT_VDD_SLOPE_INACTIVE, VAL) #define ATTR_MSS_VDD_SLOPE_INTERCEPT_GETMACRO(ID, PTARGET, VAL) \ fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ? \ fapi::FAPI_RC_SUCCESS : \ - fapi::platAttrSvc::fapiPlatGetMemAttrData(\ + fapi::platAttrSvc::fapiPlatGetNodeMemAttrData(\ PTARGET, TARGETING::ATTR_MSS_CENT_VDD_INTERCEPT, VAL) #define ATTR_MSS_VCS_SLOPE_ACTIVE_GETMACRO(ID, PTARGET, VAL) \ fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ? \ fapi::FAPI_RC_SUCCESS : \ - fapi::platAttrSvc::fapiPlatGetMemAttrData(\ + fapi::platAttrSvc::fapiPlatGetNodeMemAttrData(\ PTARGET, TARGETING::ATTR_MSS_CENT_VCS_SLOPE_ACTIVE, VAL) #define ATTR_MSS_VCS_SLOPE_INACTIVE_GETMACRO(ID, PTARGET, VAL) \ fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ? \ fapi::FAPI_RC_SUCCESS : \ - fapi::platAttrSvc::fapiPlatGetMemAttrData(\ + fapi::platAttrSvc::fapiPlatGetNodeMemAttrData(\ PTARGET, TARGETING::ATTR_MSS_CENT_VCS_SLOPE_INACTIVE, VAL) #define ATTR_MSS_VCS_SLOPE_INTERCEPT_GETMACRO(ID, PTARGET, VAL) \ fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ? \ fapi::FAPI_RC_SUCCESS : \ - fapi::platAttrSvc::fapiPlatGetMemAttrData(\ + fapi::platAttrSvc::fapiPlatGetNodeMemAttrData(\ PTARGET, TARGETING::ATTR_MSS_CENT_VCS_INTERCEPT, VAL) #define ATTR_MSS_VPP_SLOPE_GETMACRO(ID, PTARGET, VAL) \ fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ? \ fapi::FAPI_RC_SUCCESS : \ - fapi::platAttrSvc::fapiPlatGetMemAttrData(\ + fapi::platAttrSvc::fapiPlatGetNodeMemAttrData(\ PTARGET, TARGETING::ATTR_MSS_VOLT_VPP_SLOPE_EFF_CONFIG, VAL) #define ATTR_MSS_VPP_SLOPE_INTERCEPT_GETMACRO(ID, PTARGET, VAL) \ fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ? \ fapi::FAPI_RC_SUCCESS : \ - fapi::platAttrSvc::fapiPlatGetMemAttrData(\ + fapi::platAttrSvc::fapiPlatGetNodeMemAttrData(\ PTARGET, TARGETING::ATTR_MSS_VOLT_VPP_INTERCEPT_EFF_CONFIG, VAL) #define ATTR_MSS_DDR3_VDDR_SLOPE_GETMACRO(ID, PTARGET, VAL) \ fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ? \ fapi::FAPI_RC_SUCCESS : \ - fapi::platAttrSvc::fapiPlatGetMemAttrData(\ + fapi::platAttrSvc::fapiPlatGetNodeMemAttrData(\ PTARGET, TARGETING::ATTR_MSS_VOLT_DDR3_VDDR_SLOPE_EFF_CONFIG, VAL) #define ATTR_MSS_DDR3_VDDR_INTERCEPT_GETMACRO(ID, PTARGET, VAL) \ fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ? \ fapi::FAPI_RC_SUCCESS : \ - fapi::platAttrSvc::fapiPlatGetMemAttrData(PTARGET,\ + fapi::platAttrSvc::fapiPlatGetNodeMemAttrData(PTARGET,\ TARGETING::ATTR_MSS_VOLT_DDR3_VDDR_INTERCEPT_EFF_CONFIG, VAL) #define ATTR_MRW_DDR3_VDDR_MAX_LIMIT_GETMACRO(ID, PTARGET, VAL) \ fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ? \ fapi::FAPI_RC_SUCCESS : \ - fapi::platAttrSvc::fapiPlatGetMemAttrData(\ + fapi::platAttrSvc::fapiPlatGetNodeMemAttrData(\ PTARGET, TARGETING::ATTR_MRW_DDR3_VDDR_MAX_LIMIT_EFF_CONFIG, VAL) #define ATTR_MSS_DDR4_VDDR_SLOPE_GETMACRO(ID, PTARGET, VAL) \ fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ? \ fapi::FAPI_RC_SUCCESS : \ - fapi::platAttrSvc::fapiPlatGetMemAttrData(\ + fapi::platAttrSvc::fapiPlatGetNodeMemAttrData(\ PTARGET, TARGETING::ATTR_MSS_VOLT_DDR4_VDDR_SLOPE_EFF_CONFIG, VAL) #define ATTR_MSS_DDR4_VDDR_INTERCEPT_GETMACRO(ID, PTARGET, VAL) \ fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ? \ fapi::FAPI_RC_SUCCESS : \ - fapi::platAttrSvc::fapiPlatGetMemAttrData(PTARGET,\ + fapi::platAttrSvc::fapiPlatGetNodeMemAttrData(PTARGET,\ TARGETING::ATTR_MSS_VOLT_DDR4_VDDR_INTERCEPT_EFF_CONFIG, VAL) #define ATTR_MRW_DDR4_VDDR_MAX_LIMIT_GETMACRO(ID, PTARGET, VAL) \ fapi::AttrOverrideSync::getAttrOverrideFunc(fapi::ID, PTARGET, &VAL) ? \ fapi::FAPI_RC_SUCCESS : \ - fapi::platAttrSvc::fapiPlatGetMemAttrData(\ + fapi::platAttrSvc::fapiPlatGetNodeMemAttrData(\ PTARGET, TARGETING::ATTR_MRW_DDR4_VDDR_MAX_LIMIT_EFF_CONFIG, VAL) #endif // FAPIPLATATTRIBUTESERVICE_H_ diff --git a/src/include/usr/vpd/cvpdenums.H b/src/include/usr/vpd/cvpdenums.H index 79b81093c..c26743140 100644 --- a/src/include/usr/vpd/cvpdenums.H +++ b/src/include/usr/vpd/cvpdenums.H @@ -123,6 +123,14 @@ namespace CVPD MM = 0x3c, SS = 0x3d, ET = 0x3e, + VM = 0x3f, + pd1 = 0x40, //#1 + pdZ = 0x41, //#Z + pd4 = 0x42, //#4 + pd5 = 0x43, //#5 + pd6 = 0x44, //#6 + pd8 = 0x45, //#8 + pdY = 0x46, //#Y // Last Keyword CVPD_LAST_KEYWORD, diff --git a/src/include/usr/vpd/spdenums.H b/src/include/usr/vpd/spdenums.H index d429690cf..b728e3fbf 100644 --- a/src/include/usr/vpd/spdenums.H +++ b/src/include/usr/vpd/spdenums.H @@ -163,7 +163,7 @@ enum LRMM_NUM_ROWS = SPD_FIRST_MOD_SPEC | 0x0e, LRMM_MIRRORING = SPD_FIRST_MOD_SPEC | 0x0f, LRMM_REVISION_NUM = SPD_FIRST_MOD_SPEC | 0x10, - LRMM_MFR_ID_CODE = SPD_FIRST_MOD_SPEC | 0x11, + MODSPEC_MM_MFR_ID_CODE = SPD_FIRST_MOD_SPEC | 0x11, // ============================================================== // Module Specific Keywords (Available for DDR3 DIMMs only) @@ -309,9 +309,31 @@ enum MODSPEC_COM_RAW_CARD_EXT = SPD_FIRST_MOD_SPEC | 0x9a, UMM_CRC = SPD_FIRST_MOD_SPEC | 0x9b, RMM_ADDR_MAPPING = SPD_FIRST_MOD_SPEC | 0x9c, - RMM_CRC = SPD_FIRST_MOD_SPEC | 0x9d, - LRMM_CRC = SPD_FIRST_MOD_SPEC | 0x9e, - SPD_LAST_MOD_SPEC = SPD_FIRST_MOD_SPEC | 0x9e, + MODSPEC_MM_ATTRIBS = SPD_FIRST_MOD_SPEC | 0x9d, + MODSPEC_MM_ADDR_MAPPING = SPD_FIRST_MOD_SPEC | 0x9e, + MODSPEC_MM_DRV_STRENGTH_CNTL = SPD_FIRST_MOD_SPEC | 0x9f, + MODSPEC_MM_DRV_STRENGTH_CK = SPD_FIRST_MOD_SPEC | 0xa0, + LRMM_VREF_DQ_RANK0 = SPD_FIRST_MOD_SPEC | 0xa1, + LRMM_VREF_DQ_RANK1 = SPD_FIRST_MOD_SPEC | 0xa2, + LRMM_VREF_DQ_RANK2 = SPD_FIRST_MOD_SPEC | 0xa3, + LRMM_VREF_DQ_RANK3 = SPD_FIRST_MOD_SPEC | 0xa4, + LRMM_VREF_DQ_FOR_DRAM = SPD_FIRST_MOD_SPEC | 0xa5, + LRMM_MDQ_DRV_LT_1866 = SPD_FIRST_MOD_SPEC | 0xa6, + LRMM_MDQ_DRV_1866_2400 = SPD_FIRST_MOD_SPEC | 0xa7, + LRMM_MDQ_DRV_2400_3200 = SPD_FIRST_MOD_SPEC | 0xa8, + LRMM_DRV_STRENGTH = SPD_FIRST_MOD_SPEC | 0xa9, + LRMM_ODT_RTT_WR_LT_1866 = SPD_FIRST_MOD_SPEC | 0xaa, + LRMM_ODT_RTT_NOM_LT_1866 = SPD_FIRST_MOD_SPEC | 0xab, + LRMM_ODT_RTT_WR_1866_2400 = SPD_FIRST_MOD_SPEC | 0xac, + LRMM_ODT_RTT_NOM_1866_2400 = SPD_FIRST_MOD_SPEC | 0xad, + LRMM_ODT_RTT_WR_2400_3200 = SPD_FIRST_MOD_SPEC | 0xae, + LRMM_ODT_RTT_NOM_2400_3200 = SPD_FIRST_MOD_SPEC | 0xaf, + LRMM_ODT_RTT_PARK_LT_1866 = SPD_FIRST_MOD_SPEC | 0xb0, + LRMM_ODT_RTT_PARK_1866_2400 = SPD_FIRST_MOD_SPEC | 0xb1, + LRMM_ODT_RTT_PARK_2400_3200 = SPD_FIRST_MOD_SPEC | 0xb2, + RMM_CRC = SPD_FIRST_MOD_SPEC | 0xb3, + LRMM_CRC = SPD_FIRST_MOD_SPEC | 0xb4, + SPD_LAST_MOD_SPEC = SPD_FIRST_MOD_SPEC | 0xb5, // This keyword should be last in the list // Invalid Keyword @@ -319,6 +341,15 @@ enum INVALID_SPD_KEYWORD = 0xFFFF, }; +enum +{ + // These are LRDIMM values for Module Type attribute + // according to ver3 and ver4 JEDEC specs + JEDEC_VER3_LRDIMM_VAL = 0x0b, + JEDEC_VER4_LRDIMM_VAL = 0x04, +}; + + }; // end SPD #endif diff --git a/src/usr/hwpf/hwp/dimm_spd_attributes.xml b/src/usr/hwpf/hwp/dimm_spd_attributes.xml index 0d0a6723e..4093f1b1f 100644 --- a/src/usr/hwpf/hwp/dimm_spd_attributes.xml +++ b/src/usr/hwpf/hwp/dimm_spd_attributes.xml @@ -22,7 +22,7 @@ <!-- permissions and limitations under the License. --> <!-- --> <!-- IBM_PROLOG_END_TAG --> -<!-- $Id: dimm_spd_attributes.xml,v 1.55 2015/08/05 00:29:38 asaetow Exp $ --> +<!-- $Id: dimm_spd_attributes.xml,v 1.56 2015/08/27 12:04:06 sasethur Exp $ --> <!-- XML file specifying DIMM SPD attributes used by HW Procedures. --> <attributes> @@ -610,9 +610,9 @@ The following attributes can be queried from both DDR3 and DDR4 DIMMs <attribute> <id>ATTR_SPD_DIMM_RCD_CNTL_WORD_0_15</id> <targetType>TARGET_TYPE_DIMM</targetType> - <description>RCD Control Word. Supplied by VPD, used by mss_eff_config.C and mss_draminit.C . Each dimm will have a value. + <description>RCD Control Word. Supplied by SPD, used by mss_eff_config.C and mss_draminit.C . Each dimm will have a value. consumer: mss_dram_init, mss_eff_config firmware notes: In order to make this readable to the OpenPower: It is necessary - to swap the nibbles for a given byte. IE this is pulled from SPD bytes 69 - 76. + to swap the nibbles for a given byte. IE this is pulled from SPD bytes 69 - 76. (DDR3) The attribute would contain byte 69 nibble 1, followed by byte 69 nibble 0, followed by byte 70 nibble 1, and so forth. </description> <valueType>uint64</valueType> @@ -623,10 +623,9 @@ The following attributes can be queried from both DDR3 and DDR4 DIMMs <attribute> <id>ATTR_VPD_DIMM_RCD_CNTL_WORD_0_15</id> <targetType>TARGET_TYPE_DIMM</targetType> - <description>RCD Control Word. Supplied by VPD, used by mss_eff_config.C and mss_draminit.C . Each dimm will have a value. -consumer: mss_dram_init, mss_eff_config -firmware notes: In order to make this readable to the OpenPower: It is necessary to swap the nibbles for a given byte. IE this is pulled from SPD bytes 69 - 76. -The attribute would contain byte 69 nibble 1, followed by byte 69 nibble 0, followed by byte 70 nibble 1, and so forth. + <description>This will be replaced by ATTR_SPD_DIMM_RCD_CNTL_WORD_0_15. Until migration is complete USE as is. (Will be deleted soon) + IE this is pulled from SPD bytes 69 - 76. (DDR3) + The attribute would contain byte 69 nibble 1, followed by byte 69 nibble 0, followed by byte 70 nibble 1, and so forth. </description> <valueType>uint64</valueType> <odmVisable/> @@ -1284,12 +1283,12 @@ The following attributes can be queried from LRDIMM type DDR4 DIMMs only --> <attribute> - <id>ATTR_SPD_DIMM_MODULE_LR_ATTRIBUTES</id> + <id>ATTR_SPD_DIMM_MODULE_ATTRIBUTES</id> <targetType>TARGET_TYPE_DIMM</targetType> <description> Indicates number of registers used and number of rows of DRAM's on LRDIMM. - Byte 131, Bits 1-0 for # of registers used on LRDIMM. - 00 - Undefined , 01 - 1 Register , 10,11 -Reserved. + Byte 131, Bits 1-0 for # of registers used on LRDIMM. + 00 - Undefined , 01 - 1 Register , 10,11 -Reserved. Byte 131, Bits 3-2 for # of rows of DRAM's on LRDIMM 00,11- Undefined, 01- 1 Row, 10 - 2 Rows. </description> @@ -1298,22 +1297,22 @@ The following attributes can be queried from LRDIMM type DDR4 DIMMs only </attribute> <attribute> - <id>ATTR_SPD_LR_REGISTER_MANF_ID</id> + <id>ATTR_SPD_REGISTER_MANF_ID</id> <targetType>TARGET_TYPE_DIMM</targetType> <description> Manufacturer of the memory buffer on DIMM module. - Located in DDR4 SPD bytes 133(LSB) and 134(MSB). + Located in DDR4 SPD bytes 133(LSB) and 134(MSB). </description> <valueType>uint32</valueType> <platInit/> </attribute> <attribute> - <id>ATTR_SPD_LR_ADDR_MAP_REG_TO_DRAM</id> + <id>ATTR_SPD_ADDR_MAP_REG_TO_DRAM</id> <targetType>TARGET_TYPE_DIMM</targetType> <description> Address mapping from Register to DRAM and Drive strength. - Located in DDR4 SPD bytes 136 and 137. + Located in DDR4 SPD bytes 136 and 137. Byte 136 bit 0, 0 - Standard, 1 - Mirrored. Byte 137 has drive strength for control and command/Address. </description> @@ -1322,11 +1321,11 @@ The following attributes can be queried from LRDIMM type DDR4 DIMMs only </attribute> <attribute> - <id>ATTR_SPD_LR_REG_OUTPUT_DRV_STRENGTH_CK</id> + <id>ATTR_SPD_REG_OUTPUT_DRV_STRENGTH_CK</id> <targetType>TARGET_TYPE_DIMM</targetType> <description> Drive strength for clock outputs of the registering clock driver. - Located in DDR4 SPD bytes 138. + Located in DDR4 SPD bytes 138. </description> <valueType>uint8</valueType> <platInit/> @@ -1337,7 +1336,7 @@ The following attributes can be queried from LRDIMM type DDR4 DIMMs only <targetType>TARGET_TYPE_DIMM</targetType> <description> VREFDQ value for the package rank 0 DRAM's. - Located in DDR4 SPD bytes 140. + Located in DDR4 SPD bytes 140. </description> <valueType>uint8</valueType> <platInit/> @@ -1348,7 +1347,7 @@ The following attributes can be queried from LRDIMM type DDR4 DIMMs only <targetType>TARGET_TYPE_DIMM</targetType> <description> VREFDQ value for the package rank 1 DRAM's. - Located in DDR4 SPD bytes 141. + Located in DDR4 SPD bytes 141. </description> <valueType>uint8</valueType> <platInit/> @@ -1359,7 +1358,7 @@ The following attributes can be queried from LRDIMM type DDR4 DIMMs only <targetType>TARGET_TYPE_DIMM</targetType> <description> VREFDQ value for the package rank 2 DRAM's. - Located in DDR4 SPD bytes 142. + Located in DDR4 SPD bytes 142. </description> <valueType>uint8</valueType> <platInit/> @@ -1370,7 +1369,7 @@ The following attributes can be queried from LRDIMM type DDR4 DIMMs only <targetType>TARGET_TYPE_DIMM</targetType> <description> VREFDQ value for the package rank 3 DRAM's. - Located in DDR4 SPD bytes 143. + Located in DDR4 SPD bytes 143. </description> <valueType>uint8</valueType> <platInit/> @@ -1381,7 +1380,7 @@ The following attributes can be queried from LRDIMM type DDR4 DIMMs only <targetType>TARGET_TYPE_DIMM</targetType> <description> VREFDQ value for the data buffer component. - Located in DDR4 SPD bytes 144. + Located in DDR4 SPD bytes 144. </description> <valueType>uint8</valueType> <platInit/> @@ -1392,7 +1391,7 @@ The following attributes can be queried from LRDIMM type DDR4 DIMMs only <targetType>TARGET_TYPE_DIMM</targetType> <description> Data Buffer MDQ Drive strength and RTT for data rate less than 1866. - Located in DDR4 SPD bytes 145. + Located in DDR4 SPD bytes 145. Bits 2-0 for MDQ Read Termination strength. Bits 6-4 for MDQ Drive strength. </description> @@ -1405,7 +1404,7 @@ The following attributes can be queried from LRDIMM type DDR4 DIMMs only <targetType>TARGET_TYPE_DIMM</targetType> <description> Data Buffer MDQ Drive strength and RTT for data rate between 1866 and 2400. - Located in DDR4 SPD bytes 146. + Located in DDR4 SPD bytes 146. Bits 2-0 for MDQ Read Termination strength. Bits 6-4 for MDQ Drive strength. </description> @@ -1418,7 +1417,7 @@ The following attributes can be queried from LRDIMM type DDR4 DIMMs only <targetType>TARGET_TYPE_DIMM</targetType> <description> Data Buffer MDQ Drive strength and RTT for data rate between 2400 and 3200. - Located in DDR4 SPD bytes 147. + Located in DDR4 SPD bytes 147. Bits 2-0 for MDQ Read Termination strength. Bits 6-4 for MDQ Drive strength. </description> @@ -1431,7 +1430,7 @@ The following attributes can be queried from LRDIMM type DDR4 DIMMs only <targetType>TARGET_TYPE_DIMM</targetType> <description> DRAM Drive strength for all the data rates between 1866 and 3200. - Located in DDR4 SPD bytes 148. + Located in DDR4 SPD bytes 148. Bits 1-0 for Datarate less than 1866. Bits 3-2 for Data rate between 1866 and 2400. Bits 5-4 for data rate between 2400 and 3200. @@ -1445,7 +1444,7 @@ The following attributes can be queried from LRDIMM type DDR4 DIMMs only <targetType>TARGET_TYPE_DIMM</targetType> <description> DRAM ODT (RTT_WR) for data rates less than 1866 - Located in DDR4 SPD bytes 149 bits 2-0. + Located in DDR4 SPD bytes 149 bits 2-0. </description> <valueType>uint8</valueType> <platInit/> @@ -1456,7 +1455,7 @@ The following attributes can be queried from LRDIMM type DDR4 DIMMs only <targetType>TARGET_TYPE_DIMM</targetType> <description> DRAM ODT (RTT_NOM)for data rates less than 1866 - Located in DDR4 SPD bytes 149 bits 5-3. + Located in DDR4 SPD bytes 149 bits 5-3. </description> <valueType>uint8</valueType> <platInit/> @@ -1467,7 +1466,7 @@ The following attributes can be queried from LRDIMM type DDR4 DIMMs only <targetType>TARGET_TYPE_DIMM</targetType> <description> DRAM ODT (RTT_WR) for data rates between 1866 and 2400. - Located in DDR4 SPD bytes 150 bits 2-0. + Located in DDR4 SPD bytes 150 bits 2-0. </description> <valueType>uint8</valueType> <platInit/> @@ -1478,7 +1477,7 @@ The following attributes can be queried from LRDIMM type DDR4 DIMMs only <targetType>TARGET_TYPE_DIMM</targetType> <description> DRAM ODT (RTT_NOM)for data rates between 1866 and 2400. - Located in DDR4 SPD bytes 150 bits 5-3. + Located in DDR4 SPD bytes 150 bits 5-3. </description> <valueType>uint8</valueType> <platInit/> @@ -1489,7 +1488,7 @@ The following attributes can be queried from LRDIMM type DDR4 DIMMs only <targetType>TARGET_TYPE_DIMM</targetType> <description> DRAM ODT (RTT_WR) for data rates between 2400 and 3200. - Located in DDR4 SPD bytes 151 bits 2-0. + Located in DDR4 SPD bytes 151 bits 2-0. </description> <valueType>uint8</valueType> <platInit/> @@ -1500,7 +1499,7 @@ The following attributes can be queried from LRDIMM type DDR4 DIMMs only <targetType>TARGET_TYPE_DIMM</targetType> <description> DRAM ODT (RTT_NOM)for data rates between 2400 and 3200. - Located in DDR4 SPD bytes 151 bits 5-3. + Located in DDR4 SPD bytes 151 bits 5-3. </description> <valueType>uint8</valueType> <platInit/> @@ -1511,9 +1510,9 @@ The following attributes can be queried from LRDIMM type DDR4 DIMMs only <targetType>TARGET_TYPE_DIMM</targetType> <description> DRAM ODT (RTT_PARK)for data rates less than 1866. - Located in DDR4 SPD bytes 152. - Bit 2-0 for package ranks 0 and 1. - Bit 5-3 for package ranks 2 and 3. + Located in DDR4 SPD bytes 152. + Bit 2-0 for package ranks 0 and 1. + Bit 5-3 for package ranks 2 and 3. </description> <valueType>uint8</valueType> <platInit/> @@ -1524,9 +1523,9 @@ The following attributes can be queried from LRDIMM type DDR4 DIMMs only <targetType>TARGET_TYPE_DIMM</targetType> <description> DRAM ODT (RTT_PARK)for data rates between 1866 and 2400. - Located in DDR4 SPD bytes 153. - Bit 2-0 for package ranks 0 and 1. - Bit 5-3 for package ranks 2 and 3. + Located in DDR4 SPD bytes 153. + Bit 2-0 for package ranks 0 and 1. + Bit 5-3 for package ranks 2 and 3. </description> <valueType>uint8</valueType> <platInit/> @@ -1537,9 +1536,9 @@ The following attributes can be queried from LRDIMM type DDR4 DIMMs only <targetType>TARGET_TYPE_DIMM</targetType> <description> DRAM ODT (RTT_PARK)for data rates between 2400 and 3200. - Located in DDR4 SPD bytes 154. - Bit 2-0 for package ranks 0 and 1. - Bit 5-3 for package ranks 2 and 3. + Located in DDR4 SPD bytes 154. + Bit 2-0 for package ranks 0 and 1. + Bit 5-3 for package ranks 2 and 3. </description> <valueType>uint8</valueType> <platInit/> @@ -1819,7 +1818,7 @@ This Attribute is to be interpreted as an Integer</description> <id>ATTR_VPD_DRAM_RTT_PARK</id> <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> <description>DRAM Rtt_PARK. Used in various locations and comes from the MT keyword of the VPD or is computed in mss_eff_cnfg_termination. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg. - RTT_Park value. This is for DDR4 MRS5.Each memory channel will have a value. + RTT_Park value. This is for DDR4 MRS5.Each memory channel will have a value. Creator: VPD(MT), mss_eff_cnfg_termination consumer: various.C files (no initfiles) firmware notes: none diff --git a/src/usr/hwpf/hwp/lab_dimm_spd_attributes.xml b/src/usr/hwpf/hwp/lab_dimm_spd_attributes.xml index 01d90c997..8e4af3c93 100644..100755 --- a/src/usr/hwpf/hwp/lab_dimm_spd_attributes.xml +++ b/src/usr/hwpf/hwp/lab_dimm_spd_attributes.xml @@ -5,7 +5,7 @@ <!-- --> <!-- OpenPOWER HostBoot Project --> <!-- --> -<!-- Contributors Listed Below - COPYRIGHT 2014 --> +<!-- Contributors Listed Below - COPYRIGHT 2014,2015 --> <!-- [+] International Business Machines Corp. --> <!-- --> <!-- --> @@ -22,7 +22,7 @@ <!-- permissions and limitations under the License. --> <!-- --> <!-- IBM_PROLOG_END_TAG --> -<!-- $Id: dimm_spd_attributes.xml,v 1.35 2014/05/23 16:33:05 whs Exp $ --> +<!-- $Id: lab_dimm_spd_attributes.xml,v 1.25 2015/09/28 12:09:12 mklight Exp $ --> <!-- XML file specifying DIMM SPD attributes used by HW Procedures. --> <attributes> @@ -53,7 +53,7 @@ The following attributes can be queried from both DDR3 and DDR4 DIMMs Note that CDIMM designation here is obsolete. See ATTR_SPD_CUSTOM </description> <valueType>uint8</valueType> - <enum>CDIMM = 0x00, RDIMM = 0x01, UDIMM = 0x02, SO_DIMM=0x03, LRDIMM = 0x0b</enum> + <enum>CDIMM = 0x00, RDIMM = 0x01, UDIMM = 0x02, SO_DIMM=0x03, LRDIMM = 0x0b, INVALID = 0xff</enum> <platInit/> </attribute> @@ -76,6 +76,14 @@ The following attributes can be queried from both DDR3 and DDR4 DIMMs <description> DRAM Density. Located in DDR3/DDR4 SPD byte 4, bits 3-0. + 0x00 = 256MB + 0x01 = 512MB + 0x02 = 1GB + 0x03 = 2GB + 0x04 = 4GB + 0x05 = 8GB + 0x06 = 16GB + 0x07 = 32GB </description> <valueType>uint8</valueType> <enum> @@ -95,6 +103,8 @@ The following attributes can be queried from both DDR3 and DDR4 DIMMs The raw data has different meanings for DDR3 and DDR4. HWPs must use this DDR neutral enumeration to decode. Platform support must call an Accessor HWP. + For DDR4 , Values can be B4 and B8 based on bits 5-4 + For DDR3 , Values can be B8,B16,B32,B64 based on bits 6-4 </description> <valueType>uint8</valueType> <enum>B8 = 0x00, B16 = 0x01, B32 = 0x02, B64 = 0x03, B4 = 0x04, UNKNOWN = 0xff</enum> @@ -109,7 +119,7 @@ The following attributes can be queried from both DDR3 and DDR4 DIMMs Located in DDR3/DDR4 SPD byte 5, bits 5-3. </description> <valueType>uint8</valueType> - <enum>R12 = 0x00, R13 = 0x01, R14 = 0x02, R15 = 0x03, + <enum>R12 = 0x00, R13 = 0x01, R14 = 0x02, R15 = 0x03, R16 = 0x04, R17 = 0x05, R18 = 0x06 </enum> <platInit/> @@ -137,6 +147,8 @@ The following attributes can be queried from both DDR3 and DDR4 DIMMs The raw data has different meanings for DDR3 and DDR4. HWPs must use this DDR neutral enumeration to decode. Platform support must call an Accessor HWP. + For DDR3, values would be NOTOP1_5,OP1_35,OP1_2X based on byte 6, bits 2-0 + For DDR4, values would be OP1_2V,END1_2V, based on byte 6, bits 5-0 </description> <valueType>uint8</valueType> <enum> @@ -158,6 +170,7 @@ The following attributes can be queried from both DDR3 and DDR4 DIMMs Located in DDR4 SPD byte 12, bits 5-3. </description> <valueType>uint8</valueType> + <!-- RX means an invalid value, only used to init vars --> <enum>R1 = 0x00, R2 = 0x01, R4 = 0x03, RX = 0xFF</enum> <platInit/> </attribute> @@ -215,6 +228,8 @@ The following attributes can be queried from both DDR3 and DDR4 DIMMs The raw data has different meanings for DDR3 and DDR4. HWPs must use this DDR neutral enumeration to decode. Platform support must call an Accessor HWP. + For DDR3, the values would be from CL_4 through CL_18 + For DDR4, the values would be from CL_7 through CL_24 </description> <valueType>uint32</valueType> <enum> @@ -459,7 +474,7 @@ The following attributes can be queried from both DDR3 and DDR4 DIMMs <description> Number of Registers used on RDIMM. Located in DDR3 SPD byte 63 bits 1-0. - </description> + </description> <valueType>uint8</valueType> <platInit/> </attribute> @@ -592,6 +607,44 @@ The following attributes can be queried from both DDR3 and DDR4 DIMMs <writeable/> </attribute> +<attribute> + <id>ATTR_SPD_DIMM_RCD_CNTL_WORD_0_15</id> + <targetType>TARGET_TYPE_DIMM</targetType> + <description>RCD Control Word. Supplied by SPD, used by mss_eff_config.C and mss_draminit.C . Each dimm will have a value. + consumer: mss_dram_init, mss_eff_config firmware notes: In order to make this readable to the OpenPower: It is necessary + to swap the nibbles for a given byte. IE this is pulled from SPD bytes 69 - 76. (DDR3) + The attribute would contain byte 69 nibble 1, followed by byte 69 nibble 0, followed by byte 70 nibble 1, and so forth. + </description> + <valueType>uint64</valueType> + <odmVisable/> + <odmChangeable/> +</attribute> + +<attribute> + <id>ATTR_VPD_DIMM_RCD_CNTL_WORD_0_15</id> + <targetType>TARGET_TYPE_DIMM</targetType> + <description>This will be replaced by ATTR_SPD_DIMM_RCD_CNTL_WORD_0_15. Until migration is complete USE as is. (Will be deleted soon) + IE this is pulled from SPD bytes 69 - 76. (DDR3) + The attribute would contain byte 69 nibble 1, followed by byte 69 nibble 0, followed by byte 70 nibble 1, and so forth. + </description> + <valueType>uint64</valueType> + <odmVisable/> + <odmChangeable/> +</attribute> + +<attribute> + <id>ATTR_VPD_DIMM_RCD_OUTPUT_TIMING</id> + <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <description>RCD Timing. Supplied by VPD, used by mss_eff_config.C. Each dimm will have a value. + consumer: mss_eff_config + </description> + <valueType>uint8</valueType> + <enum>1T = 0x01, 3T = 0x03</enum> + <odmVisable/> + <odmChangeable/> + <array> 2 2</array> +</attribute> + <!-- ******************************************************************************* The following attributes can be queried from DDR3 DIMMs only @@ -1051,7 +1104,7 @@ Querying them from DDR3 DIMMs will result in an error <targetType>TARGET_TYPE_DIMM</targetType> <description> Minimum SDRAM Refresh Recovery Time Delay in medium timebase (MTB) units - Located in DDR4 SPD bytes 30(MSB) and 31(LSB). + Located in DDR4 SPD bytes 31(MSB) bits 15-8 and SPD byte 30(LSB) 7-0. </description> <valueType>uint32</valueType> <platInit/> @@ -1062,7 +1115,7 @@ Querying them from DDR3 DIMMs will result in an error <targetType>TARGET_TYPE_DIMM</targetType> <description> Minimum SDRAM Refresh Recovery Time Delay in medium timebase (MTB) units - Located in DDR4 SPD bytes 32(MSB) and 33(LSB). + Located in DDR4 SPD bytes 33(MSB) bits 15-8 and SPD byte 32(LSB) 7-0. </description> <valueType>uint32</valueType> <platInit/> @@ -1073,7 +1126,7 @@ Querying them from DDR3 DIMMs will result in an error <targetType>TARGET_TYPE_DIMM</targetType> <description> Minimum SDRAM Refresh Recovery Time Dealy in medium timebase (MTB) units. - Located in DDR4 SPD byte 34(LSB) bits 15-8 and SPD byte 35(MSB) 7-0. + Located in DDR4 SPD byte 35(MSB) bits 15-8 and SPD byte 34(LSB) 7-0. </description> <valueType>uint32</valueType> <platInit/> @@ -1083,10 +1136,10 @@ Querying them from DDR3 DIMMs will result in an error <id>ATTR_SPD_TRRDSMIN_DDR4</id> <targetType>TARGET_TYPE_DIMM</targetType> <description> - The minimum SDRAM Activate to Activate Delay Time to different bank - groups in medium timebase (MTB) units. Controller designers must also + The minimum SDRAM Activate to Activate Delay Time to different bank + groups in medium timebase (MTB) units. Controller designers must also note that at some frequencies, a minimum number of clocks may be required - resulting in a larger tRRD_Smin value than indicated in the SPD. + resulting in a larger tRRD_Smin value than indicated in the SPD. For example, tRRD_Smin for DDR4-1600 must be 4 clocks. Located in DDR4 SPD byte 38 </description> @@ -1098,10 +1151,10 @@ Querying them from DDR3 DIMMs will result in an error <id>ATTR_SPD_TRRDLMIN_DDR4</id> <targetType>TARGET_TYPE_DIMM</targetType> <description> - The minimum SDRAM Activate to Activate Delay Time to same bank - groups in medium timebase (MTB) units. Controller designers must also + The minimum SDRAM Activate to Activate Delay Time to same bank + groups in medium timebase (MTB) units. Controller designers must also note that at some frequencies, a minimum number of clocks may be required - resulting in a larger tRRD_Smin value than indicated in the SPD. + resulting in a larger tRRD_Smin value than indicated in the SPD. For example, tRRD_Lmin for DDR4-1600 must be 4 clocks. Located in DDR4 SPD byte 39 </description> @@ -1113,12 +1166,12 @@ Querying them from DDR3 DIMMs will result in an error <id>ATTR_SPD_TCCDLMIN_DDR4</id> <targetType>TARGET_TYPE_DIMM</targetType> <description> - The minimum SDRAM CAS to CAS Delay Time to same bank - groups in medium timebase (MTB) units. Controller designers must also + The minimum SDRAM CAS to CAS Delay Time to same bank + groups in medium timebase (MTB) units. Controller designers must also note that at some frequencies, a minimum number of clocks may be required - resulting in a larger tCCD_Lmin value than indicated in the SPD. + resulting in a larger tCCD_Lmin value than indicated in the SPD. For example, tCCD_Lmin for DDR4-2133 must be 6 clocks. - Located in DDR4 SPD byte 40 + Located in DDR4 SPD byte 40 </description> <valueType>uint8</valueType> <platInit/> @@ -1128,11 +1181,11 @@ Querying them from DDR3 DIMMs will result in an error <id>ATTR_SPD_FINE_OFFSET_TCCDLMIN_DDR4</id> <targetType>TARGET_TYPE_DIMM</targetType> <description> - Modifies the calculation of SPD Byte 40 with a fine correction - using FTB units. The value of tCCD_Lmin comes from the SDRAM data - sheet. This value is a two.s complement multiplier for FTB units, + Modifies the calculation of SPD Byte 40 with a fine correction + using FTB units. The value of tCCD_Lmin comes from the SDRAM data + sheet. This value is a two.s complement multiplier for FTB units, ranging from +127 to -128. - Located in DDR4 SPD byte 117 + Located in DDR4 SPD byte 117 </description> <valueType>uint8</valueType> <platInit/> @@ -1142,11 +1195,11 @@ Querying them from DDR3 DIMMs will result in an error <id>ATTR_SPD_FINE_OFFSET_TRRDLMIN_DDR4</id> <targetType>TARGET_TYPE_DIMM</targetType> <description> - Modifies the calculation of SPD Byte 39 with a fine correction using - FTB units. The value of tRRD_Lmin comes from the SDRAM data sheet. - This value is a two.s complement multiplier for FTB units, + Modifies the calculation of SPD Byte 39 with a fine correction using + FTB units. The value of tRRD_Lmin comes from the SDRAM data sheet. + This value is a two.s complement multiplier for FTB units, ranging from +127 to -128. - Located in DDR4 SPD byte 118 + Located in DDR4 SPD byte 118 </description> <valueType>uint8</valueType> <platInit/> @@ -1156,11 +1209,11 @@ Querying them from DDR3 DIMMs will result in an error <id>ATTR_SPD_FINE_OFFSET_TRRDSMIN_DDR4</id> <targetType>TARGET_TYPE_DIMM</targetType> <description> - Modifies the calculation of SPD Byte 38 (MTB units) with a fine - correction using FTB units. The value of tRRD_Smin comes from the - SDRAM data sheet. This value is a two.s complement multiplier for + Modifies the calculation of SPD Byte 38 (MTB units) with a fine + correction using FTB units. The value of tRRD_Smin comes from the + SDRAM data sheet. This value is a two.s complement multiplier for FTB units, ranging from +127 to -128. - Located in DDR4 SPD byte 119 + Located in DDR4 SPD byte 119 </description> <valueType>uint8</valueType> <platInit/> @@ -1193,7 +1246,7 @@ Querying them from DDR3 DIMMs will result in an error <targetType>TARGET_TYPE_DIMM</targetType> <description> Defines the vendor die revision level (often called the .stepping.) - of the DRAMs on the module. This byte is optional. + of the DRAMs on the module. This byte is optional. For modules without DRAM stepping information, this byte should be programmed to 0xFF. Located in DDR4 SPD byte 352 @@ -1217,15 +1270,285 @@ Querying them from DDR3 DIMMs will result in an error <id>ATTR_VPD_VERSION</id> <targetType>TARGET_TYPE_DIMM</targetType> <description> - The VPD Version of this DIMM. The version number can be an indication of when different DIMM keywords are valid and is loaded from the platform. A version number of zero is unknown. + The VPD Version of this DIMM. The version number can be an indication of when different DIMM keywords are valid and is loaded from the platform. The version represented here represents one of three distinct vintages of parts : unknown/error, early build CDIMMs with VZ less than 10, everything else. In other words, this attribute does NOT equate to the VZ keyword. </description> <valueType>uint32</valueType> + <!-- Values are ASCII numbers to match previous VZ usage --> + <enum>UNKNOWN = 0x3030, OLD_CDIMM = 0x3031, CURRENT = 0x3230</enum> <platInit/> <writeable/> </attribute> <!-- ******************************************************************************* +The following attributes can be queried from LRDIMM type DDR4 DIMMs only +******************************************************************************* +--> + +<attribute> + <id>ATTR_SPD_DIMM_MODULE_ATTRIBUTES</id> + <targetType>TARGET_TYPE_DIMM</targetType> + <description> + Indicates number of registers used and number of rows of DRAM's on LRDIMM. + Byte 131, Bits 1-0 for # of registers used on LRDIMM. + 00 - Undefined , 01 - 1 Register , 10,11 -Reserved. + Byte 131, Bits 3-2 for # of rows of DRAM's on LRDIMM + 00,11- Undefined, 01- 1 Row, 10 - 2 Rows. + </description> + <valueType>uint8</valueType> + <platInit/> +</attribute> + +<attribute> + <id>ATTR_SPD_REGISTER_MANF_ID</id> + <targetType>TARGET_TYPE_DIMM</targetType> + <description> + Manufacturer of the memory buffer on DIMM module. + Located in DDR4 SPD bytes 133(LSB) and 134(MSB). + </description> + <valueType>uint32</valueType> + <platInit/> +</attribute> + +<attribute> + <id>ATTR_SPD_ADDR_MAP_REG_TO_DRAM</id> + <targetType>TARGET_TYPE_DIMM</targetType> + <description> + Address mapping from Register to DRAM and Drive strength. + Located in DDR4 SPD bytes 136 and 137. + Byte 136 bit 0, 0 - Standard, 1 - Mirrored. + Byte 137 has drive strength for control and command/Address. + </description> + <valueType>uint32</valueType> + <platInit/> +</attribute> + +<attribute> + <id>ATTR_SPD_REG_OUTPUT_DRV_STRENGTH_CK</id> + <targetType>TARGET_TYPE_DIMM</targetType> + <description> + Drive strength for clock outputs of the registering clock driver. + Located in DDR4 SPD bytes 138. + </description> + <valueType>uint8</valueType> + <platInit/> +</attribute> + +<attribute> + <id>ATTR_SPD_LR_DRAM_VREF_DQ_RANK0</id> + <targetType>TARGET_TYPE_DIMM</targetType> + <description> + VREFDQ value for the package rank 0 DRAM's. + Located in DDR4 SPD bytes 140. + </description> + <valueType>uint8</valueType> + <platInit/> +</attribute> + +<attribute> + <id>ATTR_SPD_LR_DRAM_VREF_DQ_RANK1</id> + <targetType>TARGET_TYPE_DIMM</targetType> + <description> + VREFDQ value for the package rank 1 DRAM's. + Located in DDR4 SPD bytes 141. + </description> + <valueType>uint8</valueType> + <platInit/> +</attribute> + +<attribute> + <id>ATTR_SPD_LR_DRAM_VREF_DQ_RANK2</id> + <targetType>TARGET_TYPE_DIMM</targetType> + <description> + VREFDQ value for the package rank 2 DRAM's. + Located in DDR4 SPD bytes 142. + </description> + <valueType>uint8</valueType> + <platInit/> +</attribute> + +<attribute> + <id>ATTR_SPD_LR_DRAM_VREF_DQ_RANK3</id> + <targetType>TARGET_TYPE_DIMM</targetType> + <description> + VREFDQ value for the package rank 3 DRAM's. + Located in DDR4 SPD bytes 143. + </description> + <valueType>uint8</valueType> + <platInit/> +</attribute> + +<attribute> + <id>ATTR_SPD_LR_BUF_VREF_DQ_FOR_DRAM</id> + <targetType>TARGET_TYPE_DIMM</targetType> + <description> + VREFDQ value for the data buffer component. + Located in DDR4 SPD bytes 144. + </description> + <valueType>uint8</valueType> + <platInit/> +</attribute> + +<attribute> + <id>ATTR_SPD_LR_BUF_MDQ_DRV_LESS_THAN_1866</id> + <targetType>TARGET_TYPE_DIMM</targetType> + <description> + Data Buffer MDQ Drive strength and RTT for data rate less than 1866. + Located in DDR4 SPD bytes 145. + Bits 2-0 for MDQ Read Termination strength. + Bits 6-4 for MDQ Drive strength. + </description> + <valueType>uint8</valueType> + <platInit/> +</attribute> + +<attribute> + <id>ATTR_SPD_LR_BUF_MDQ_DRV_1866_2400</id> + <targetType>TARGET_TYPE_DIMM</targetType> + <description> + Data Buffer MDQ Drive strength and RTT for data rate between 1866 and 2400. + Located in DDR4 SPD bytes 146. + Bits 2-0 for MDQ Read Termination strength. + Bits 6-4 for MDQ Drive strength. + </description> + <valueType>uint8</valueType> + <platInit/> +</attribute> + +<attribute> + <id>ATTR_SPD_LR_BUF_MDQ_DRV_2400_3200</id> + <targetType>TARGET_TYPE_DIMM</targetType> + <description> + Data Buffer MDQ Drive strength and RTT for data rate between 2400 and 3200. + Located in DDR4 SPD bytes 147. + Bits 2-0 for MDQ Read Termination strength. + Bits 6-4 for MDQ Drive strength. + </description> + <valueType>uint8</valueType> + <platInit/> +</attribute> + +<attribute> + <id>ATTR_SPD_LR_DRAM_DRV_STRENGTH</id> + <targetType>TARGET_TYPE_DIMM</targetType> + <description> + DRAM Drive strength for all the data rates between 1866 and 3200. + Located in DDR4 SPD bytes 148. + Bits 1-0 for Datarate less than 1866. + Bits 3-2 for Data rate between 1866 and 2400. + Bits 5-4 for data rate between 2400 and 3200. + </description> + <valueType>uint8</valueType> + <platInit/> +</attribute> + +<attribute> + <id>ATTR_SPD_LR_DRAM_ODT_RTT_WR_LESS_THAN_1866</id> + <targetType>TARGET_TYPE_DIMM</targetType> + <description> + DRAM ODT (RTT_WR) for data rates less than 1866 + Located in DDR4 SPD bytes 149 bits 2-0. + </description> + <valueType>uint8</valueType> + <platInit/> +</attribute> + +<attribute> + <id>ATTR_SPD_LR_DRAM_ODT_RTT_NOM_LESS_THAN_1866</id> + <targetType>TARGET_TYPE_DIMM</targetType> + <description> + DRAM ODT (RTT_NOM)for data rates less than 1866 + Located in DDR4 SPD bytes 149 bits 5-3. + </description> + <valueType>uint8</valueType> + <platInit/> +</attribute> + +<attribute> + <id>ATTR_SPD_LR_DRAM_ODT_RTT_WR_1866_2400</id> + <targetType>TARGET_TYPE_DIMM</targetType> + <description> + DRAM ODT (RTT_WR) for data rates between 1866 and 2400. + Located in DDR4 SPD bytes 150 bits 2-0. + </description> + <valueType>uint8</valueType> + <platInit/> +</attribute> + +<attribute> + <id>ATTR_SPD_LR_DRAM_ODT_RTT_NOM_1866_2400</id> + <targetType>TARGET_TYPE_DIMM</targetType> + <description> + DRAM ODT (RTT_NOM)for data rates between 1866 and 2400. + Located in DDR4 SPD bytes 150 bits 5-3. + </description> + <valueType>uint8</valueType> + <platInit/> +</attribute> + +<attribute> + <id>ATTR_SPD_LR_DRAM_ODT_RTT_WR_2400_3200</id> + <targetType>TARGET_TYPE_DIMM</targetType> + <description> + DRAM ODT (RTT_WR) for data rates between 2400 and 3200. + Located in DDR4 SPD bytes 151 bits 2-0. + </description> + <valueType>uint8</valueType> + <platInit/> +</attribute> + +<attribute> + <id>ATTR_SPD_LR_DRAM_ODT_RTT_NOM_2400_3200</id> + <targetType>TARGET_TYPE_DIMM</targetType> + <description> + DRAM ODT (RTT_NOM)for data rates between 2400 and 3200. + Located in DDR4 SPD bytes 151 bits 5-3. + </description> + <valueType>uint8</valueType> + <platInit/> +</attribute> + +<attribute> + <id>ATTR_SPD_LR_DRAM_ODT_RTT_PARK_LESS_THAN_1866</id> + <targetType>TARGET_TYPE_DIMM</targetType> + <description> + DRAM ODT (RTT_PARK)for data rates less than 1866. + Located in DDR4 SPD bytes 152. + Bit 2-0 for package ranks 0 and 1. + Bit 5-3 for package ranks 2 and 3. + </description> + <valueType>uint8</valueType> + <platInit/> +</attribute> + +<attribute> + <id>ATTR_SPD_LR_DRAM_ODT_RTT_PARK_1866_2400</id> + <targetType>TARGET_TYPE_DIMM</targetType> + <description> + DRAM ODT (RTT_PARK)for data rates between 1866 and 2400. + Located in DDR4 SPD bytes 153. + Bit 2-0 for package ranks 0 and 1. + Bit 5-3 for package ranks 2 and 3. + </description> + <valueType>uint8</valueType> + <platInit/> +</attribute> + +<attribute> + <id>ATTR_SPD_LR_DRAM_ODT_RTT_PARK_2400_3200</id> + <targetType>TARGET_TYPE_DIMM</targetType> + <description> + DRAM ODT (RTT_PARK)for data rates between 2400 and 3200. + Located in DDR4 SPD bytes 154. + Bit 2-0 for package ranks 0 and 1. + Bit 5-3 for package ranks 2 and 3. + </description> + <valueType>uint8</valueType> + <platInit/> +</attribute> + +<!-- +******************************************************************************* The following attributes are DDR3 specific. Regular HWPs should query the DDR neutral attribute, these attributes should only be queried by the Accessor HWP that handles the DDR neutral attribute. @@ -1412,8 +1735,8 @@ file RANK3_MIRRORED = 0x01 </enum> <platInit/> - <array> 2 2</array> <writeable/> + <array> 2 2</array> </attribute> <!-- Attributes added to support the VPD which was formally using the EFF settings --> @@ -1427,10 +1750,10 @@ consumer: various.C files and initfiles firmware notes: none</description> <valueType>uint8</valueType> <platInit/> + <writeable/> <odmVisable/> <odmChangeable/> <array> 2 2 4</array> - <writeable/> </attribute> <attribute> @@ -1442,10 +1765,10 @@ consumer: various.C and initfile firmware notes: none</description> <valueType>uint8</valueType> <platInit/> + <writeable/> <odmVisable/> <odmChangeable/> <array> 2 2 4</array> - <writeable/> </attribute> <attribute> @@ -1477,10 +1800,10 @@ This Attribute is to be interpreted as an Integer</description> <valueType>uint8</valueType> <enum>DISABLE = 0, OHM20 = 20, OHM30 = 30, OHM34 = 34, OHM40 = 40, OHM48 = 48, OHM60 = 60, OHM80 = 80, OHM120 = 120, OHM240 = 240</enum> <platInit/> + <writeable/> <odmVisable/> <odmChangeable/> <array> 2 2 4</array> - <writeable/> </attribute> <attribute> @@ -1494,10 +1817,27 @@ This Attribute is to be interpreted as an Integer</description> <valueType>uint8</valueType> <enum>DISABLE = 0, OHM60 = 60, OHM120 = 120, OHM240 = 240, HIGHZ = 1</enum> <platInit/> + <writeable/> + <odmVisable/> + <odmChangeable/> + <array> 2 2 4</array> +</attribute> + +<attribute> + <id>ATTR_VPD_DRAM_RTT_PARK</id> + <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <description>DRAM Rtt_PARK. Used in various locations and comes from the MT keyword of the VPD or is computed in mss_eff_cnfg_termination. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg. + RTT_Park value. This is for DDR4 MRS5.Each memory channel will have a value. +Creator: VPD(MT), mss_eff_cnfg_termination +consumer: various.C files (no initfiles) +firmware notes: none +This Attribute is to be interpreted as an Integer</description> + <valueType>uint8</valueType> + <enum>DISABLE = 0, 60OHM = 60, 120OHM = 120, 40OHM = 40, 240OHM = 240, 48OHM = 48, 80OHM = 80, 34OHM = 34</enum> + <platInit/> <odmVisable/> <odmChangeable/> <array> 2 2 4</array> - <writeable/> </attribute> <attribute> @@ -1513,10 +1853,10 @@ This Attribute is to be interpreted as an Integer</description> <valueType>uint32</valueType> <enum>VDD420 = 420, VDD425 = 425, VDD430 = 430, VDD435 = 435, VDD440 = 440, VDD445 = 445, VDD450 = 450, VDD455 = 455, VDD460 = 460, VDD465 = 465, VDD470 = 470, VDD475 = 475, VDD480 = 480, VDD485 = 485, VDD490 = 490, VDD495 = 495, VDD500 = 500, VDD505 = 505, VDD510 = 510, VDD515 = 515, VDD520 = 520, VDD525 = 525, VDD530 = 530, VDD535 = 535, VDD540 = 540, VDD545 = 545, VDD550 = 550, VDD555 = 555, VDD560 = 560, VDD565 = 565, VDD570 = 570, VDD575 = 575</enum> <platInit/> + <writeable/> <odmVisable/> <odmChangeable/> <array> 2</array> - <writeable/> </attribute> <attribute> @@ -1531,10 +1871,10 @@ This is for DDR4 The value is from 0 to 50</description> <valueType>uint8</valueType> <platInit/> + <writeable/> <odmVisable/> <odmChangeable/> <array> 2</array> - <writeable/> </attribute> <attribute> @@ -1550,10 +1890,10 @@ This Attribute is to be interpreted as an Integer</description> <enum>OHM24_FFE0 = 0x0A, OHM30_FFE0 = 0x08, OHM30_FFE480 = 0x48, OHM30_FFE240 = 0x38, OHM30_FFE160 = 0x28, OHM30_FFE120 = 0x18, OHM34_FFE0 = 0x07, OHM34_FFE480 = 0x47, OHM34_FFE240 = 0x37, OHM34_FFE160 = 0x27, OHM34_FFE120 = 0x17, OHM40_FFE0 = 0x06, OHM40_FFE480 = 0x46, OHM40_FFE240 = 0x36, OHM40_FFE160 = 0x26, OHM40_FFE120 = 0x16</enum> <platInit/> + <writeable/> <odmVisable/> <odmChangeable/> <array> 2</array> - <writeable/> </attribute> <attribute> @@ -1568,10 +1908,10 @@ This Attribute is to be interpreted as an Integer</description> <valueType>uint8</valueType> <enum>OHM15 = 15, OHM20 = 20, OHM30 = 30, OHM40 = 40</enum> <platInit/> + <writeable/> <odmVisable/> <odmChangeable/> <array> 2</array> - <writeable/> </attribute> <attribute> @@ -1586,10 +1926,10 @@ This Attribute is to be interpreted as an Integer</description> <valueType>uint8</valueType> <enum>OHM15 = 15, OHM20 = 20, OHM30 = 30, OHM40 = 40</enum> <platInit/> + <writeable/> <odmVisable/> <odmChangeable/> <array> 2</array> - <writeable/> </attribute> <attribute> @@ -1604,10 +1944,10 @@ This Attribute is to be interpreted as an Integer</description> <valueType>uint8</valueType> <enum>OHM15 = 15, OHM20 = 20, OHM30 = 30, OHM40 = 40</enum> <platInit/> + <writeable/> <odmVisable/> <odmChangeable/> <array> 2</array> - <writeable/> </attribute> <attribute> @@ -1622,10 +1962,10 @@ This Attribute is to be interpreted as an Integer</description> <valueType>uint8</valueType> <enum>OHM15 = 15, OHM20 = 20, OHM30 = 30, OHM40 = 40</enum> <platInit/> + <writeable/> <odmVisable/> <odmChangeable/> <array> 2</array> - <writeable/> </attribute> <attribute> @@ -1640,10 +1980,10 @@ This Attribute is to be interpreted as an Integer</description> <valueType>uint8</valueType> <enum>OHM15 = 15, OHM20 = 20, OHM30 = 30, OHM40 = 40, OHM48 = 48, OHM60 = 60, OHM80 = 80, OHM120 = 120, OHM160 = 160, OHM240 = 240</enum> <platInit/> + <writeable/> <odmVisable/> <odmChangeable/> <array> 2</array> - <writeable/> </attribute> <attribute> @@ -1662,10 +2002,10 @@ SLEW_5V_NS = 5, SLEW_6V_NS = 6, SLEW_MAXV_NS = 7</enum> <platInit/> + <writeable/> <odmVisable/> <odmChangeable/> <array> 2</array> - <writeable/> </attribute> <attribute> @@ -1684,10 +2024,10 @@ SLEW_5V_NS = 5, SLEW_6V_NS = 6, SLEW_MAXV_NS = 7</enum> <platInit/> + <writeable/> <odmVisable/> <odmChangeable/> <array> 2</array> - <writeable/> </attribute> <attribute> @@ -1706,10 +2046,10 @@ SLEW_5V_NS = 5, SLEW_6V_NS = 6, SLEW_MAXV_NS = 7</enum> <platInit/> + <writeable/> <odmVisable/> <odmChangeable/> <array> 2</array> - <writeable/> </attribute> <attribute> @@ -1729,10 +2069,10 @@ SLEW_6V_NS = 6, SLEW_MAXV_NS = 7 </enum> <platInit/> + <writeable/> <odmVisable/> <odmChangeable/> <array> 2</array> - <writeable/> </attribute> <attribute> @@ -1752,10 +2092,10 @@ SLEW_6V_NS = 6, SLEW_MAXV_NS = 7 </enum> <platInit/> + <writeable/> <odmVisable/> <odmChangeable/> <array> 2</array> - <writeable/> </attribute> <attribute> @@ -1770,10 +2110,10 @@ This Attribute is to be interpreted as an Integer</description> <valueType>uint32</valueType> <enum>VDD40375 = 40375, VDD41750 = 41750, VDD43125 = 43125, VDD44500 = 44500, VDD45875 = 45875, VDD47250 = 47250, VDD48625 = 48625, VDD50000 = 50000, VDD51375 = 51375, VDD52750 = 52750, VDD54125 = 54125, VDD55500 = 55500, VDD56875 = 56875, VDD58250 = 58250, VDD59625 = 59625, VDD61000 = 61000, VDD60375 = 60375, VDD61750 = 61750, VDD63125 = 63125, VDD64500 = 64500, VDD65875 = 65875, VDD67250 = 67250, VDD68625 = 68625, VDD70000 = 70000, VDD71375 = 71375, VDD72750 = 72750, VDD74125 = 74125, VDD75500 = 75500, VDD76875 = 76875, VDD78250 = 78250, VDD79625 = 79625, VDD81000 = 81000</enum> <platInit/> + <writeable/> <odmVisable/> <odmChangeable/> <array> 2</array> - <writeable/> </attribute> <attribute> @@ -1782,10 +2122,10 @@ This Attribute is to be interpreted as an Integer</description> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M0_CLK_P0</description> <valueType>uint8</valueType> <platInit/> + <writeable/> <odmVisable/> <odmChangeable/> <array> 2</array> - <writeable/> </attribute> <attribute> @@ -1794,10 +2134,10 @@ This Attribute is to be interpreted as an Integer</description> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M0_CLK_P1</description> <valueType>uint8</valueType> <platInit/> + <writeable/> <odmVisable/> <odmChangeable/> <array> 2</array> - <writeable/> </attribute> <attribute> @@ -1806,10 +2146,10 @@ This Attribute is to be interpreted as an Integer</description> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M1_CLK_P0</description> <valueType>uint8</valueType> <platInit/> + <writeable/> <odmVisable/> <odmChangeable/> <array> 2</array> - <writeable/> </attribute> <attribute> @@ -1818,10 +2158,10 @@ This Attribute is to be interpreted as an Integer</description> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M1_CLK_P1</description> <valueType>uint8</valueType> <platInit/> + <writeable/> <odmVisable/> <odmChangeable/> <array> 2</array> - <writeable/> </attribute> <attribute> @@ -1830,10 +2170,10 @@ This Attribute is to be interpreted as an Integer</description> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M_CMD_A0</description> <valueType>uint8</valueType> <platInit/> + <writeable/> <odmVisable/> <odmChangeable/> <array> 2</array> - <writeable/> </attribute> <attribute> @@ -1842,10 +2182,10 @@ This Attribute is to be interpreted as an Integer</description> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M_CMD_A1</description> <valueType>uint8</valueType> <platInit/> + <writeable/> <odmVisable/> <odmChangeable/> <array> 2</array> - <writeable/> </attribute> <attribute> @@ -1854,10 +2194,10 @@ This Attribute is to be interpreted as an Integer</description> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M_CMD_A2</description> <valueType>uint8</valueType> <platInit/> + <writeable/> <odmVisable/> <odmChangeable/> <array> 2</array> - <writeable/> </attribute> <attribute> @@ -1866,10 +2206,10 @@ This Attribute is to be interpreted as an Integer</description> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M_CMD_A3</description> <valueType>uint8</valueType> <platInit/> + <writeable/> <odmVisable/> <odmChangeable/> <array> 2</array> - <writeable/> </attribute> <attribute> @@ -1878,10 +2218,10 @@ This Attribute is to be interpreted as an Integer</description> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M_CMD_A4</description> <valueType>uint8</valueType> <platInit/> + <writeable/> <odmVisable/> <odmChangeable/> <array> 2</array> - <writeable/> </attribute> <attribute> @@ -1890,10 +2230,10 @@ This Attribute is to be interpreted as an Integer</description> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M_CMD_A5</description> <valueType>uint8</valueType> <platInit/> + <writeable/> <odmVisable/> <odmChangeable/> <array> 2</array> - <writeable/> </attribute> <attribute> @@ -1902,10 +2242,10 @@ This Attribute is to be interpreted as an Integer</description> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M_CMD_A6</description> <valueType>uint8</valueType> <platInit/> + <writeable/> <odmVisable/> <odmChangeable/> <array> 2</array> - <writeable/> </attribute> <attribute> @@ -1914,10 +2254,10 @@ This Attribute is to be interpreted as an Integer</description> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M_CMD_A7</description> <valueType>uint8</valueType> <platInit/> + <writeable/> <odmVisable/> <odmChangeable/> <array> 2</array> - <writeable/> </attribute> <attribute> @@ -1926,10 +2266,10 @@ This Attribute is to be interpreted as an Integer</description> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M_CMD_A8</description> <valueType>uint8</valueType> <platInit/> + <writeable/> <odmVisable/> <odmChangeable/> <array> 2</array> - <writeable/> </attribute> <attribute> @@ -1938,10 +2278,10 @@ This Attribute is to be interpreted as an Integer</description> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M_CMD_A9</description> <valueType>uint8</valueType> <platInit/> + <writeable/> <odmVisable/> <odmChangeable/> <array> 2</array> - <writeable/> </attribute> <attribute> @@ -1950,10 +2290,10 @@ This Attribute is to be interpreted as an Integer</description> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M_CMD_A10</description> <valueType>uint8</valueType> <platInit/> + <writeable/> <odmVisable/> <odmChangeable/> <array> 2</array> - <writeable/> </attribute> <attribute> @@ -1962,10 +2302,10 @@ This Attribute is to be interpreted as an Integer</description> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M_CMD_A11</description> <valueType>uint8</valueType> <platInit/> + <writeable/> <odmVisable/> <odmChangeable/> <array> 2</array> - <writeable/> </attribute> <attribute> @@ -1974,10 +2314,10 @@ This Attribute is to be interpreted as an Integer</description> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M_CMD_A12</description> <valueType>uint8</valueType> <platInit/> + <writeable/> <odmVisable/> <odmChangeable/> <array> 2</array> - <writeable/> </attribute> <attribute> @@ -1986,10 +2326,10 @@ This Attribute is to be interpreted as an Integer</description> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M_CMD_A13</description> <valueType>uint8</valueType> <platInit/> + <writeable/> <odmVisable/> <odmChangeable/> <array> 2</array> - <writeable/> </attribute> <attribute> @@ -1998,10 +2338,10 @@ This Attribute is to be interpreted as an Integer</description> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M_CMD_A14</description> <valueType>uint8</valueType> <platInit/> + <writeable/> <odmVisable/> <odmChangeable/> <array> 2</array> - <writeable/> </attribute> <attribute> @@ -2010,10 +2350,10 @@ This Attribute is to be interpreted as an Integer</description> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M_CMD_A15</description> <valueType>uint8</valueType> <platInit/> + <writeable/> <odmVisable/> <odmChangeable/> <array> 2</array> - <writeable/> </attribute> <attribute> @@ -2022,10 +2362,10 @@ This Attribute is to be interpreted as an Integer</description> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M_CMD_BA0</description> <valueType>uint8</valueType> <platInit/> + <writeable/> <odmVisable/> <odmChangeable/> <array> 2</array> - <writeable/> </attribute> <attribute> @@ -2034,10 +2374,10 @@ This Attribute is to be interpreted as an Integer</description> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M_CMD_BA1</description> <valueType>uint8</valueType> <platInit/> + <writeable/> <odmVisable/> <odmChangeable/> <array> 2</array> - <writeable/> </attribute> <attribute> @@ -2046,10 +2386,10 @@ This Attribute is to be interpreted as an Integer</description> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M_CMD_BA2</description> <valueType>uint8</valueType> <platInit/> + <writeable/> <odmVisable/> <odmChangeable/> <array> 2</array> - <writeable/> </attribute> <attribute> @@ -2058,10 +2398,10 @@ This Attribute is to be interpreted as an Integer</description> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M_CMD_CASN</description> <valueType>uint8</valueType> <platInit/> + <writeable/> <odmVisable/> <odmChangeable/> <array> 2</array> - <writeable/> </attribute> <attribute> @@ -2070,10 +2410,10 @@ This Attribute is to be interpreted as an Integer</description> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M_CMD_RASN</description> <valueType>uint8</valueType> <platInit/> + <writeable/> <odmVisable/> <odmChangeable/> <array> 2</array> - <writeable/> </attribute> <attribute> @@ -2082,10 +2422,10 @@ This Attribute is to be interpreted as an Integer</description> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M_CMD_WEN</description> <valueType>uint8</valueType> <platInit/> + <writeable/> <odmVisable/> <odmChangeable/> <array> 2</array> - <writeable/> </attribute> <attribute> @@ -2094,10 +2434,10 @@ This Attribute is to be interpreted as an Integer</description> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M_PAR</description> <valueType>uint8</valueType> <platInit/> + <writeable/> <odmVisable/> <odmChangeable/> <array> 2</array> - <writeable/> </attribute> <attribute> @@ -2106,10 +2446,10 @@ This Attribute is to be interpreted as an Integer</description> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M_ACTN</description> <valueType>uint8</valueType> <platInit/> + <writeable/> <odmVisable/> <odmChangeable/> <array> 2</array> - <writeable/> </attribute> <attribute> @@ -2118,10 +2458,10 @@ This Attribute is to be interpreted as an Integer</description> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M0_CNTL_CKE0</description> <valueType>uint8</valueType> <platInit/> + <writeable/> <odmVisable/> <odmChangeable/> <array> 2</array> - <writeable/> </attribute> <attribute> @@ -2130,10 +2470,10 @@ This Attribute is to be interpreted as an Integer</description> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M0_CNTL_CKE1</description> <valueType>uint8</valueType> <platInit/> + <writeable/> <odmVisable/> <odmChangeable/> <array> 2</array> - <writeable/> </attribute> <attribute> @@ -2142,10 +2482,10 @@ This Attribute is to be interpreted as an Integer</description> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M0_CNTL_CKE2</description> <valueType>uint8</valueType> <platInit/> + <writeable/> <odmVisable/> <odmChangeable/> <array> 2</array> - <writeable/> </attribute> <attribute> @@ -2154,10 +2494,10 @@ This Attribute is to be interpreted as an Integer</description> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M0_CNTL_CKE3</description> <valueType>uint8</valueType> <platInit/> + <writeable/> <odmVisable/> <odmChangeable/> <array> 2</array> - <writeable/> </attribute> <attribute> @@ -2166,10 +2506,10 @@ This Attribute is to be interpreted as an Integer</description> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M0_CNTL_CSN0</description> <valueType>uint8</valueType> <platInit/> + <writeable/> <odmVisable/> <odmChangeable/> <array> 2</array> - <writeable/> </attribute> <attribute> @@ -2178,10 +2518,10 @@ This Attribute is to be interpreted as an Integer</description> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M0_CNTL_CSN1</description> <valueType>uint8</valueType> <platInit/> + <writeable/> <odmVisable/> <odmChangeable/> <array> 2</array> - <writeable/> </attribute> <attribute> @@ -2190,10 +2530,10 @@ This Attribute is to be interpreted as an Integer</description> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M0_CNTL_CSN2</description> <valueType>uint8</valueType> <platInit/> + <writeable/> <odmVisable/> <odmChangeable/> <array> 2</array> - <writeable/> </attribute> <attribute> @@ -2202,10 +2542,10 @@ This Attribute is to be interpreted as an Integer</description> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M0_CNTL_CSN3</description> <valueType>uint8</valueType> <platInit/> + <writeable/> <odmVisable/> <odmChangeable/> <array> 2</array> - <writeable/> </attribute> <attribute> @@ -2214,10 +2554,10 @@ This Attribute is to be interpreted as an Integer</description> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M0_CNTL_ODT0</description> <valueType>uint8</valueType> <platInit/> + <writeable/> <odmVisable/> <odmChangeable/> <array> 2</array> - <writeable/> </attribute> <attribute> @@ -2226,10 +2566,10 @@ This Attribute is to be interpreted as an Integer</description> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M0_CNTL_ODT1</description> <valueType>uint8</valueType> <platInit/> + <writeable/> <odmVisable/> <odmChangeable/> <array> 2</array> - <writeable/> </attribute> <attribute> @@ -2238,10 +2578,10 @@ This Attribute is to be interpreted as an Integer</description> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M1_CNTL_CKE0</description> <valueType>uint8</valueType> <platInit/> + <writeable/> <odmVisable/> <odmChangeable/> <array> 2</array> - <writeable/> </attribute> <attribute> @@ -2250,10 +2590,10 @@ This Attribute is to be interpreted as an Integer</description> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M1_CNTL_CKE1</description> <valueType>uint8</valueType> <platInit/> + <writeable/> <odmVisable/> <odmChangeable/> <array> 2</array> - <writeable/> </attribute> <attribute> @@ -2262,10 +2602,10 @@ This Attribute is to be interpreted as an Integer</description> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M1_CNTL_CKE2</description> <valueType>uint8</valueType> <platInit/> + <writeable/> <odmVisable/> <odmChangeable/> <array> 2</array> - <writeable/> </attribute> <attribute> @@ -2274,10 +2614,10 @@ This Attribute is to be interpreted as an Integer</description> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M1_CNTL_CKE3</description> <valueType>uint8</valueType> <platInit/> + <writeable/> <odmVisable/> <odmChangeable/> <array> 2</array> - <writeable/> </attribute> <attribute> @@ -2286,10 +2626,10 @@ This Attribute is to be interpreted as an Integer</description> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M1_CNTL_CSN0</description> <valueType>uint8</valueType> <platInit/> + <writeable/> <odmVisable/> <odmChangeable/> <array> 2</array> - <writeable/> </attribute> <attribute> @@ -2298,10 +2638,10 @@ This Attribute is to be interpreted as an Integer</description> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M1_CNTL_CSN1</description> <valueType>uint8</valueType> <platInit/> + <writeable/> <odmVisable/> <odmChangeable/> <array> 2</array> - <writeable/> </attribute> <attribute> @@ -2310,10 +2650,10 @@ This Attribute is to be interpreted as an Integer</description> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M1_CNTL_CSN2</description> <valueType>uint8</valueType> <platInit/> + <writeable/> <odmVisable/> <odmChangeable/> <array> 2</array> - <writeable/> </attribute> <attribute> @@ -2322,10 +2662,10 @@ This Attribute is to be interpreted as an Integer</description> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M1_CNTL_CSN3</description> <valueType>uint8</valueType> <platInit/> + <writeable/> <odmVisable/> <odmChangeable/> <array> 2</array> - <writeable/> </attribute> <attribute> @@ -2334,10 +2674,10 @@ This Attribute is to be interpreted as an Integer</description> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M1_CNTL_ODT0</description> <valueType>uint8</valueType> <platInit/> + <writeable/> <odmVisable/> <odmChangeable/> <array> 2</array> - <writeable/> </attribute> <attribute> @@ -2346,10 +2686,22 @@ This Attribute is to be interpreted as an Integer</description> <description>Phase rotator value that comes from MR keyword on the CDIMM VPD. This controls the IO M1_CNTL_ODT1</description> <valueType>uint8</valueType> <platInit/> + <writeable/> + <odmVisable/> + <odmChangeable/> + <array> 2</array> +</attribute> + +<attribute> + <id>ATTR_VPD_PERIODIC_MEMCAL_MODE_OPTIONS</id> + <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <description>Settings for periodic CAL - zcal 1, syscal 1, centering 0, rdclk 1, dqs align 1, rdclk_update_dis 0, dutycycle 0, and power dis (dqs) 1. Second byte has repeat as 000, mpr mode as 0, mba as 11, and the spares as 00 +</description> + <valueType>uint32</valueType> + <platInit/> <odmVisable/> <odmChangeable/> <array> 2</array> - <writeable/> </attribute> <!-- Spare attribute found in eclipz/hwpf/hwp/xml/attribute_info/dimm_attributes.xml --> @@ -2371,9 +2723,9 @@ This Attribute is to be interpreted as an Integer</description> <description>This value comes from the VPD keyword MT bytes 54 and 55 MT(54:55) for the Logical DIMM associated with port A. Bytes 118:119 for port B, 182:183 for port C and 246:247 for port D. In the end, the AB and CD portions form a 32 bit word for each mba to write into the corresponding ddrphy register</description> <valueType>uint32</valueType> <platInit/> - <writeable/> <odmVisable/> <array>2</array> + <writeable/> </attribute> <attribute> @@ -2392,9 +2744,9 @@ This Attribute is to be interpreted as an Integer</description> <description>This value comes from the VPD keyword MT bytes 61 MT(61) for the Logical DIMM associated with port A. Bytes 125 for port B, 189 for port C and 253 for port D</description> <valueType>uint8</valueType> <platInit/> + <writeable/> <odmVisable/> <array>2</array> - <writeable/> </attribute> <attribute> @@ -2403,9 +2755,9 @@ This Attribute is to be interpreted as an Integer</description> <description>This value comes from the VPD keyword MT byte 60 bits 4:7 for the Logical DIMM associated with port A. Byte 124 bits 4:7 for port B, 188 bits 4:7 for port C and 252 bits 4:7 for port D</description> <valueType>uint8</valueType> <platInit/> + <writeable/> <odmVisable/> <array>2</array> - <writeable/> </attribute> <attribute> @@ -2414,9 +2766,9 @@ This Attribute is to be interpreted as an Integer</description> <description>This value comes from the VPD keyword MT byte 60 bits 0:3 for the Logical DIMM associated with port A. Byte 124 bits 0:3 for port B, 188 bits 0:3 for port C and 252 bits 0:3 for port D</description> <valueType>uint8</valueType> <platInit/> + <writeable/> <odmVisable/> <array>2</array> - <writeable/> </attribute> <attribute> @@ -2497,6 +2849,7 @@ Comes from the VPD MW Keyword</description> <platInit/> <odmVisable/> <persistRuntime/> + <writeable/> </attribute> <attribute> @@ -2507,6 +2860,7 @@ Comes from the VPD MW Keyword</description> <platInit/> <odmVisable/> <persistRuntime/> + <writeable/> </attribute> <attribute> @@ -2517,6 +2871,7 @@ Comes from the VPD MW Keyword</description> <platInit/> <odmVisable/> <persistRuntime/> + <writeable/> </attribute> <attribute> @@ -2527,6 +2882,7 @@ Comes from the VPD MW Keyword</description> <platInit/> <odmVisable/> <persistRuntime/> + <writeable/> </attribute> <attribute> @@ -2542,6 +2898,70 @@ Data will be pulled from backplane VPD if IS DIMMs present.</description> </attribute> <attribute> + <id>ATTR_VPD_MT_VERSION_BYTE</id> + <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType> + <description>Describes the Version of MT Keyword</description> + <valueType>uint8</valueType> + <platInit/> + <odmVisable/> + </attribute> + +<attribute> + <id>ATTR_VPD_MR_VERSION_BYTE</id> + <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType> + <description>Describes the Version of MR Keyword</description> + <valueType>uint8</valueType> + <platInit/> + <odmVisable/> + </attribute> + + <attribute> + <id>ATTR_VPD_MR_DATA_CONTROL_BYTE</id> + <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType> + <description>Describes the DATA control byte from MR</description> + <valueType>uint8</valueType> + <platInit/> + <odmVisable/> + </attribute> + + <attribute> + <id>ATTR_VPD_MT_DATA_CONTROL_BYTE</id> + <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType> + <description>Describes the DATA control byte from MT</description> + <valueType>uint8</valueType> + <platInit/> + <odmVisable/> + </attribute> + + <attribute> + <id>ATTR_VPD_VM_KEYWORD</id> + <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType> + <description>Fetches the VM Keyword</description> + <valueType>uint32</valueType> + <platInit/> + <odmVisable/> + </attribute> + + <attribute> + <id>ATTR_VPD_VD_KEYWORD</id> + <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType> + <description>Fetch the VD keyword</description> + <valueType>uint32</valueType> + <platInit/> + <odmVisable/> + </attribute> + + <attribute> + <id>ATTR_VPD_DW_KEYWORD</id> + <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType> + <description>Describes Centaur Voltage from DW keyword</description> + <valueType>uint32</valueType> + <platInit/> + <odmVisable/> + </attribute> + + +<attribute> <id>ATTR_SPD_MODSPEC_COM_REF_RAW_CARD_REV</id> <targetType>TARGET_TYPE_DIMM</targetType> <description> @@ -2568,5 +2988,92 @@ Data will be pulled from backplane VPD if IS DIMMs present.</description> <platInit/> </attribute> + <attribute> + <id>ATTR_VPD_POWER_CONTROL_CAPABLE</id> + <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType> + <description>Capable power control settings.</description> + <valueType>uint8</valueType> + <enum>NONE = 0x00, SLOWEXIT_CAPABLE = 0x01, FASTEXIT_CAPABLE = 0x02, FASTSLOW_CAPABLE = 0x03</enum> + <platInit/> + <odmVisable/> + </attribute> + + <attribute> + <id>ATTR_VPD_DIMM_RCD_IBT</id> + <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <description>RCD IBT. Used in mss_dram_init and is computed in mss_eff_cnfg. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg. Each dimm will have a value. +creator: mss_eff_cnfg +consumer: mss_dram_init +firmware notes: none</description> + <valueType>uint32</valueType> + <enum>IBT_OFF = 0, IBT_100 = 100, IBT_150 = 150, IBT_200 = 200, IBT_300 = 300</enum> + <odmVisable/> + <odmChangeable/> + <array> 2 2</array> +</attribute> + + <attribute> + <id>ATTR_VPD_RD_CTR_WINDAGE_OFFSET</id> + <targetType>TARGET_TYPE_MBA_CHIPLET</targetType> + <description>Derived from calibration/characterization of read centering. Number of windage offset in units of pico-seconds[ps] with sign bit0 (0b0=positive, 0b1=negative) and value in bits1..31, so 0x80000023 for example would mean "-35ps". Can be overwritten by ODM vendors if done from VPD. Each port will have a value. +creator: VPD +consumer: mss_draminit_training_adv +firmware notes: none</description> + <valueType>uint32</valueType> + <platInit/> + <odmVisable/> + <odmChangeable/> + <array> 2</array> + <writeable/> +</attribute> + + +<attribute> + <id>ATTR_ISDIMM_MBVPD_INDEX</id> + <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType> + <description>VPD index for associated chip's memory buffer VPD</description> + <valueType>uint8</valueType> + <platInit/> +</attribute> + +<attribute> + <id>ATTR_CDIMM_VPD_MASTER_TOTAL_POWER_SLOPE</id> + <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType> + <description>Master Total Power Slope that comes from the VPD MW Keyword</description> + <valueType>uint32</valueType> + <platInit/> + <odmVisable/> + <persistRuntime/> +</attribute> + +<attribute> + <id>ATTR_CDIMM_VPD_MASTER_TOTAL_POWER_INTERCEPT</id> + <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType> + <description>Master Total Power Intercept that comes from the VPD MW Keyword</description> + <valueType>uint32</valueType> + <platInit/> + <odmVisable/> + <persistRuntime/> +</attribute> + +<attribute> + <id>ATTR_CDIMM_VPD_SUPPLIER_TOTAL_POWER_SLOPE</id> + <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType> + <description>Supplier Total Power Slope that comes from the VPD MV Keyword</description> + <valueType>uint32</valueType> + <platInit/> + <odmVisable/> + <persistRuntime/> +</attribute> + +<attribute> + <id>ATTR_CDIMM_VPD_SUPPLIER_TOTAL_POWER_INTERCEPT</id> + <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType> + <description>Supplier Total Power Intercept that comes from the VPD MV Keyword</description> + <valueType>uint32</valueType> + <platInit/> + <odmVisable/> + <persistRuntime/> +</attribute> </attributes> diff --git a/src/usr/hwpf/hwp/mvpd_accessors/getMBvpdAttr.C b/src/usr/hwpf/hwp/mvpd_accessors/getMBvpdAttr.C index c13e06510..5cb3cab8c 100644 --- a/src/usr/hwpf/hwp/mvpd_accessors/getMBvpdAttr.C +++ b/src/usr/hwpf/hwp/mvpd_accessors/getMBvpdAttr.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2013,2015 */ +/* Contributors Listed Below - COPYRIGHT 2014,2015 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -22,7 +22,7 @@ /* permissions and limitations under the License. */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: getMBvpdAttr.C,v 1.6 2015/04/07 20:21:37 whs Exp $ +// $Id: getMBvpdAttr.C,v 1.9 2015/10/06 15:17:45 dcrowell Exp $ /** * @file getMBvpdAttr.C * @@ -33,7 +33,6 @@ // fapi support #include <fapi.H> -#include <fapiUtil.H> #include <getMBvpdAttr.H> #include <getMBvpdVersion.H> @@ -54,19 +53,13 @@ using namespace getAttrData; // local functions // ---------------------------------------------------------------------------- /** - * @brief Find dimm info; parent, type, position - */ -fapi::ReturnCode findDimmInfo (const fapi::Target & i_mbaTarget, - fapi::Target & o_mbTarget, - uint8_t & o_pos, - DimmType & o_dimmType); -/** * @brief Find attribute definition in global table */ fapi::ReturnCode findAttrDef (const fapi::Target & i_mbaTarget, const DimmType & i_dimmType, const fapi::AttributeId & i_attr, - const MBvpdAttrDef* & o_pAttrDef); + const MBvpdAttrDef* & o_pAttrDef, + const VpdVersion & i_version); /** * @brief Read the attribute keyword */ @@ -74,8 +67,9 @@ fapi::ReturnCode readKeyword (const fapi::Target & i_mbTarget, const fapi::Target & i_mbaTarget, const MBvpdAttrDef * i_pAttrDef, const DimmType & i_dimmType, - attr_keyword * i_pBuffer, - const uint32_t & i_bufsize); + uint8_t * i_pBuffer, + const uint32_t & i_bufsize, + const VpdVersion & i_version); /** * @brief return default output value */ @@ -90,8 +84,14 @@ fapi::ReturnCode returnValue (const MBvpdAttrDef * i_pAttrDef, const uint8_t & i_pos, void * o_pVal, const size_t & i_valSize, - attr_keyword * i_pBuffer, - const uint32_t & i_bufsize); + uint8_t * i_pBuffer, + const VpdVersion & i_version); + +// return version from keyword VM or VZ or VD +fapi::ReturnCode getVersion (const fapi::Target & i_mbaTarget, + const DimmType & i_dimmType, + VpdVersion & o_version); + /** * @brief Translation functions @@ -119,7 +119,67 @@ fapi::ReturnCode FindMRkeyword (const fapi::Target & i_mbTarget, */ fapi::ReturnCode FindMTkeyword (const fapi::Target & i_mbTarget, const fapi::Target & i_mbaTarget, - fapi::MBvpdKeyword & o_keyword); + fapi::MBvpdKeyword & o_keyword, + const VpdVersion & i_version); + +keywordLayout * layoutFactory :: getLayout(const uint32_t & i_keyword, + const uint32_t & i_ver) +{ + switch(i_ver) + { + case VM_01: + { + switch(i_keyword) + { + case MBVPD_KEYWORD_MT: + case MBVPD_KEYWORD_PD1: + case MBVPD_KEYWORD_PDZ: + case MBVPD_KEYWORD_PD4: + case MBVPD_KEYWORD_PD5: + case MBVPD_KEYWORD_PD6: + case MBVPD_KEYWORD_PD8: + case MBVPD_KEYWORD_PDY: { return ( new VM_01_MT_layout());} + + case MBVPD_KEYWORD_M1: + case MBVPD_KEYWORD_M2: + case MBVPD_KEYWORD_M3: + case MBVPD_KEYWORD_M4: + case MBVPD_KEYWORD_M5: + case MBVPD_KEYWORD_M6: + case MBVPD_KEYWORD_M7: + case MBVPD_KEYWORD_M8: + case MBVPD_KEYWORD_MR: { return ( new VM_01_MR_layout());} + default: return NULL; + } + } + default: + { + switch(i_keyword) + { + case MBVPD_KEYWORD_MT: + case MBVPD_KEYWORD_T1: + case MBVPD_KEYWORD_T2: + case MBVPD_KEYWORD_T4: + case MBVPD_KEYWORD_T5: + case MBVPD_KEYWORD_T6: + case MBVPD_KEYWORD_T8:{ return ( new VM_00_MT_layout());} + + case MBVPD_KEYWORD_M1: + case MBVPD_KEYWORD_M2: + case MBVPD_KEYWORD_M3: + case MBVPD_KEYWORD_M4: + case MBVPD_KEYWORD_M5: + case MBVPD_KEYWORD_M6: + case MBVPD_KEYWORD_M7: + case MBVPD_KEYWORD_M8: + case MBVPD_KEYWORD_MR: { return ( new VM_00_MR_layout());} + default: return NULL; + } + } + } +} + + // ---------------------------------------------------------------------------- // HWP accessor to get MBvpd Attribute Data // ---------------------------------------------------------------------------- @@ -129,8 +189,8 @@ fapi::ReturnCode getMBvpdAttr(const fapi::Target &i_mbaTarget, const size_t i_valSize) { fapi::ReturnCode l_fapirc; - attr_keyword * l_pBuffer = NULL; - const uint32_t l_bufsize = sizeof(attr_keyword); + uint8_t * l_pBuffer = NULL; + uint32_t l_bufsize = 0; FAPI_DBG("getMBvpdAttr: entry attr=0x%02x, size=%d ", i_attr,i_valSize ); @@ -141,6 +201,7 @@ fapi::ReturnCode getMBvpdAttr(const fapi::Target &i_mbaTarget, uint8_t l_pos = NUM_PORTS; //initialize to out of range value (+1) DimmType l_dimmType = ALL_DIMM; const MBvpdAttrDef * l_pAttrDef = NULL; + VpdVersion l_version = INVALID_VER; // invalid vpd value // find DIMM Info; parent, position, dimm type l_fapirc = findDimmInfo (i_mbaTarget, l_mbTarget, l_pos, l_dimmType); @@ -149,8 +210,21 @@ fapi::ReturnCode getMBvpdAttr(const fapi::Target &i_mbaTarget, break; // return with error } + //read VPD version + l_fapirc = getVersion (i_mbaTarget, + l_dimmType, + l_version); + if (l_fapirc) + { + FAPI_ERR("findAttrDef: getVersion failed"); + break; // break out with fapirc + } // find Attribute definition - l_fapirc = findAttrDef (i_mbaTarget, l_dimmType, i_attr, l_pAttrDef); + l_fapirc = findAttrDef (i_mbaTarget, + l_dimmType, + i_attr, + l_pAttrDef, + l_version); if (l_fapirc) { break; // return with error @@ -174,22 +248,46 @@ fapi::ReturnCode getMBvpdAttr(const fapi::Target &i_mbaTarget, } else { - l_pBuffer = new attr_keyword; + fapi::MBvpdKeyword l_keyword = l_pAttrDef->iv_keyword; + uint32_t l_keywordsize =0; + keywordLayout * l_kwLayout = layoutFactory::getLayout( l_keyword, + l_version); + if( l_kwLayout != NULL) + { + l_keywordsize = l_kwLayout->getKeywordSize(); + } + else + { + FAPI_ERR("layoutFactory::getLayout:" + " returned NULL pointer for Keyword: 0x%x ,Version :0x%x", + l_keyword, l_version); + const fapi::AttributeId & ATTR_ID = i_attr; + const uint32_t & KEYWORD = l_keyword; + const uint32_t & VERSION = l_version; + const uint32_t & DIMM_TYPE = l_dimmType; + FAPI_SET_HWP_ERROR(l_fapirc,RC_MBVPD_UNEXPECTED_KEYWORD); + break; // break out with fapirc + } + + l_pBuffer = new uint8_t[l_keywordsize]; + l_bufsize = l_keywordsize; + l_fapirc = readKeyword (l_mbTarget, - i_mbaTarget, - l_pAttrDef, - l_dimmType, - l_pBuffer, - l_bufsize); + i_mbaTarget, + l_pAttrDef, + l_dimmType, + l_pBuffer, + l_bufsize, + l_version); if (l_fapirc) break; // return with error - + // retrun the output value l_fapirc = returnValue (l_pAttrDef, l_pos, o_pVal, i_valSize, l_pBuffer, - l_bufsize); + l_version); if (l_fapirc) break; // return with error } } @@ -282,22 +380,23 @@ fapi::ReturnCode findDimmInfo (const fapi::Target & i_mbaTarget, return l_fapirc; } -// return version from keyword VZ or VD +// return version from keyword VM or VZ or VD fapi::ReturnCode getVersion (const fapi::Target & i_mbaTarget, const DimmType & i_dimmType, VpdVersion & o_version) { fapi::ReturnCode l_fapirc; fapi::Target l_mbTarget; - fapi::MBvpdKeyword l_keyword = fapi::MBVPD_KEYWORD_VD; // try VD first + fapi::MBvpdKeyword l_keyword = fapi::MBVPD_KEYWORD_VM; // try VM first fapi::MBvpdRecord l_record = fapi::MBVPD_RECORD_SPDX; // default to SPDX + MBvpdVMKeyword l_vmVersionBuf={}; + uint32_t l_vmBufSize = sizeof(MBvpdVMKeyword); // VM keyword is of 4 bytes. uint16_t l_versionBuf = 0; - uint32_t l_bufSize = sizeof(l_versionBuf); + uint32_t l_bufSize = sizeof(l_versionBuf); + bool l_sizeMismatch = false; // to track returned size vs expected size do { - o_version = VD_VER; // initialize to finding VD keyword - // find the Centaur memory buffer from the passed MBA l_fapirc = fapiGetParentChip (i_mbaTarget,l_mbTarget); if (l_fapirc) @@ -310,38 +409,111 @@ fapi::ReturnCode getVersion (const fapi::Target & i_mbaTarget, { l_record = fapi::MBVPD_RECORD_VSPD; } - // try to get VD keyword from SPDX or VSPD + + o_version = VM_VER; // initialize to finding VM keyword + + // try to get VM keyword from SPDX or VSPD l_fapirc = fapiGetMBvpdField(l_record, l_keyword, l_mbTarget, + reinterpret_cast<uint8_t *>(&l_vmVersionBuf), + l_vmBufSize); + if (l_vmBufSize < sizeof(MBvpdVMKeyword)) + { + l_sizeMismatch = true; + } + + if((l_fapirc == 0) && (!l_sizeMismatch)) + { + FAPI_INF("getVersion:" + " returned vm data : 0x%x ", + l_vmVersionBuf.iv_version); + + // Get the first byte from VM keyword which has version value. + l_versionBuf = l_vmVersionBuf.iv_version; + if(l_versionBuf > VM_SUPPORTED_HIGH_VER) + { + FAPI_ERR("getVersion:" + " un-supported vm version returned : 0x%x ", + l_versionBuf); + const uint32_t & KEYWORD = l_keyword; + const uint32_t & RETURNED_VALUE = l_versionBuf; + const uint32_t & RECORD_NAME = l_record; + const uint32_t & DIMM_TYPE = i_dimmType; + const fapi::Target & CHIP_TARGET = l_mbTarget; + FAPI_SET_HWP_ERROR(l_fapirc,RC_MBVPD_INVALID_VM_VERSION_RETURNED); + break; // break out with fapirc + } + else if(l_versionBuf != VM_NOT_SUPPORTED) + { + o_version = static_cast<VpdVersion>(o_version | + static_cast<VpdVersion>(l_versionBuf)); + } + } + + // Get the VD in case of VM read error or + // VM returned size is fine but with value 0, then the Version is in + // VD format. + if((l_fapirc) || + ((!l_sizeMismatch) && (l_versionBuf == VM_NOT_SUPPORTED))) + { + fapi::ReturnCode l_fapirc2; + o_version = VD_VER; // initialize to finding VD keyword + l_keyword = fapi::MBVPD_KEYWORD_VD; + l_bufSize = sizeof(l_versionBuf); + + // try to get VD keyword from SPDX or VSPD + l_fapirc2 = fapiGetMBvpdField(l_record, + l_keyword, + l_mbTarget, reinterpret_cast<uint8_t *>(&l_versionBuf), l_bufSize); + l_fapirc = l_fapirc2; //explicitly free previous error infor + if (l_bufSize < sizeof(l_versionBuf)) + { + l_sizeMismatch = true; + } + else if(l_fapirc == 0) + { + o_version = static_cast<VpdVersion>(o_version | + static_cast<VpdVersion>(FAPI_BE16TOH(l_versionBuf))); + } + } // try record VINI keyword VZ (should work) if (l_fapirc) { - fapi::ReturnCode l_fapirc2; + fapi::ReturnCode l_fapirc3; o_version = VZ_VER; // VZ keyword l_record = fapi::MBVPD_RECORD_VINI; l_keyword = fapi::MBVPD_KEYWORD_VZ; l_bufSize = sizeof(l_versionBuf); - l_fapirc2 = fapiGetMBvpdField(l_record, + l_fapirc3 = fapiGetMBvpdField(l_record, l_keyword, l_mbTarget, reinterpret_cast<uint8_t *>(&l_versionBuf), l_bufSize); - l_fapirc = l_fapirc2; //explicitly free previous error infor + l_fapirc = l_fapirc3; //explicitly free previous error infor + if (l_bufSize < sizeof(l_versionBuf)) + { + l_sizeMismatch = true; + } + else if(l_fapirc == 0) + { + o_version = static_cast<VpdVersion>(o_version | + static_cast<VpdVersion>(FAPI_BE16TOH(l_versionBuf))); + } } + if (l_fapirc) { - FAPI_ERR("getVersion: Read of VD and VZ keyword failed"); + FAPI_ERR("getVersion: Read of VM,VD and VZ keyword failed"); break; // break out with fapirc } - // Check that sufficient size was returned. - if (l_bufSize < sizeof(l_versionBuf)) + if (l_sizeMismatch) { FAPI_ERR("getVersion:" " less keyword data returned than expected %d < %d", @@ -353,12 +525,9 @@ fapi::ReturnCode getVersion (const fapi::Target & i_mbaTarget, break; // break out with fapirc } - //return value along with VD or VZ - o_version = static_cast<VpdVersion>(o_version | - static_cast<VpdVersion>(FAPI_BE16TOH(l_versionBuf))); - FAPI_DBG("getVersion: vpd version=0x%x keyword=%d", o_version,l_keyword); + } while (0); @@ -373,14 +542,14 @@ fapi::ReturnCode getVersion (const fapi::Target & i_mbaTarget, fapi::ReturnCode findAttrDef (const fapi::Target & i_mbaTarget, const DimmType & i_dimmType, const AttributeId & i_attr, - const MBvpdAttrDef* & o_pAttrDef) + const MBvpdAttrDef* & o_pAttrDef, + const VpdVersion & i_version) { fapi::ReturnCode l_fapirc; o_pAttrDef = NULL; // find first row in the attribute defintion table for this attribute - VpdVersion l_version = INVALID_VER; // invalid vpd value uint32_t i=0; //at this scope for the debug message at end for (; i < g_MBVPD_ATTR_DEF_array_size; i++) @@ -390,30 +559,18 @@ fapi::ReturnCode l_fapirc; (i_dimmType == g_MBVPD_ATTR_DEF_array[i].iv_dimmType)) ) { - // most are expected to be the same for all Dimm Types and versions + // Some of them are expected to be the same for all Dimm Types and versions if (ALL_VER == g_MBVPD_ATTR_DEF_array[i].iv_version) { o_pAttrDef = &g_MBVPD_ATTR_DEF_array[i]; break; //use this row } - if (INVALID_VER == l_version) // have not read version yet - { - // get vpd version (only when actually needed) - l_fapirc = getVersion (i_mbaTarget, - i_dimmType, - l_version); - if (l_fapirc) - { - FAPI_ERR("findAttrDef: getMBvpdVersion failed"); - break; // break out with fapirc - } - } - // If this row is for this version type (VD or VZ) + // If this row is for this version type (VM or VD or VZ) // and is equal or less than the version, then use it if ((g_MBVPD_ATTR_DEF_array[i].iv_version & - (VpdVersion)(ALL_VER & l_version)) && + (VpdVersion)(ALL_VER & i_version)) && ((g_MBVPD_ATTR_DEF_array[i].iv_version & VER_MASK) <= - (l_version & VER_MASK)) ) + (i_version & VER_MASK)) ) { o_pAttrDef = &g_MBVPD_ATTR_DEF_array[i]; break; //use this row @@ -433,10 +590,10 @@ fapi::ReturnCode l_fapirc; " attr ID 0x%x not in table dimmType=%d version=%x", i_attr, i_dimmType, - l_version); + i_version); const fapi::AttributeId & ATTR_ID = i_attr; const DimmType & DIMM_TYPE = i_dimmType; - const VpdVersion & VERSION = l_version; + const VpdVersion & VERSION = i_version; FAPI_SET_HWP_ERROR(l_fapirc, RC_MBVPD_ATTRIBUTE_NOT_FOUND); } } @@ -455,11 +612,13 @@ fapi::ReturnCode readKeyword (const fapi::Target & i_mbTarget, const fapi::Target & i_mbaTarget, const MBvpdAttrDef * i_pAttrDef, const DimmType & i_dimmType, - attr_keyword * i_pBuffer, - const uint32_t & i_bufsize) + uint8_t * i_pBuffer, + const uint32_t & i_bufsize, + const VpdVersion & i_version) { fapi::ReturnCode l_fapirc; - uint32_t l_bufsize = i_bufsize; + uint32_t l_bufsize = i_bufsize; + uint32_t l_keywordsize = 0; fapi::MBvpdKeyword l_keyword = i_pAttrDef->iv_keyword; //default for CDIMMs fapi::MBvpdRecord l_record = MBVPD_RECORD_VSPD; //default for CDIMMs @@ -472,7 +631,8 @@ fapi::ReturnCode readKeyword (const fapi::Target & i_mbTarget, { l_fapirc = FindMTkeyword (i_mbTarget, i_mbaTarget, - l_keyword); + l_keyword, + i_version); if (l_fapirc) break; //return with error } else if (MBVPD_KEYWORD_MR == l_keyword) @@ -492,7 +652,16 @@ fapi::ReturnCode readKeyword (const fapi::Target & i_mbTarget, break; // return error } l_record = fapi::MBVPD_RECORD_SPDX; // for ISDIMMs + } + else + { + if(( i_version == VM_01 ) && (MBVPD_KEYWORD_MT == l_keyword)) + { + l_keyword = MBVPD_KEYWORD_PDY; + } + } + // Retrieve attribute keyword l_fapirc = fapiGetMBvpdField(l_record, l_keyword, @@ -502,23 +671,28 @@ fapi::ReturnCode readKeyword (const fapi::Target & i_mbTarget, if (l_fapirc) { FAPI_ERR("readKeyword: Read of attr keyword failed"); + FAPI_ERR("readKeyword:Attribute : 0x%x ,version : 0x%x", + i_pAttrDef->iv_attrId, i_version); + FAPI_ERR("readKeyword : Keyword : 0x%x , record 0x%x", + l_keyword , l_record); break; // break out with fapirc } // Check that sufficient keyword was returned. - if (l_bufsize < ATTR_KEYWORD_SIZE ) + if (l_bufsize < i_bufsize ) { FAPI_ERR("readKeyword:" " less keyword returned than expected %d < %d", - i_bufsize, ATTR_KEYWORD_SIZE); + l_bufsize, l_keywordsize); const uint32_t & KEYWORD = l_keyword; - const uint32_t & RETURNED_SIZE = i_bufsize; + const uint32_t & RETURNED_SIZE = l_bufsize; const fapi::Target & CHIP_TARGET = i_mbTarget; FAPI_SET_HWP_ERROR(l_fapirc, RC_MBVPD_INSUFFICIENT_VPD_RETURNED ); break; // break out with fapirc } } while (0); + return l_fapirc; } @@ -716,7 +890,8 @@ uint32_t getUint32 (const uint16_t & i_dataSpecial, } else { - o_val = FAPI_BE32TOH(*(uint32_t*) i_pBuffer); + memcpy(&o_val, i_pBuffer, sizeof(o_val)); + o_val = FAPI_BE32TOH(o_val); } return o_val; @@ -728,18 +903,35 @@ fapi::ReturnCode returnValue (const MBvpdAttrDef* i_pAttrDef, const uint8_t & i_pos, void * o_pVal, const size_t & i_valSize, - attr_keyword * i_pBuffer, - const uint32_t & i_bufsize) + uint8_t * i_pBuffer, + const VpdVersion & i_version) { fapi::ReturnCode l_fapirc; const uint8_t l_attrOffset = i_pAttrDef->iv_offset; + uint32_t l_port_spec_sec_size = 0; + uint32_t l_mba_sec_size = 0; + fapi::MBvpdKeyword l_keyword = i_pAttrDef->iv_keyword; uint16_t l_outputType= i_pAttrDef->iv_outputType & OUTPUT_TYPE_MASK; uint16_t l_special = i_pAttrDef->iv_outputType & SPECIAL_PROCESSING_MASK; FAPI_DBG("returnValue: output offset=0%02x pos=%d outputType=0x%04x" " special=0x%04x ", l_attrOffset,i_pos,l_outputType,l_special); - + + // UINT8 : only 1 value is present, it isn't stored per mba/port + if( l_outputType != UINT8 ) + { + keywordLayout * l_kwLayout = layoutFactory::getLayout( l_keyword, + i_version); + if( l_kwLayout != NULL) + { + // Move the pointer to port specific section data + i_pBuffer += l_kwLayout->getNonPortHeadSize(); + l_port_spec_sec_size = l_kwLayout->getPortSectionSize(); + l_mba_sec_size = l_port_spec_sec_size * NUM_PORTS; + } + } + // return data according to the attribute varible type switch (l_outputType) { @@ -753,12 +945,11 @@ fapi::ReturnCode returnValue (const MBvpdAttrDef* i_pAttrDef, i_pAttrDef->iv_attrId); break; //return with error } - // pull data from keyword buffer - uint8_t l_port0 = i_pBuffer-> - mb_mba[i_pos].mba_port[0].port_attr[l_attrOffset]; - uint8_t l_port1 = i_pBuffer-> - mb_mba[i_pos].mba_port[1].port_attr[l_attrOffset]; + uint8_t l_port0 = *( i_pBuffer + ( i_pos * l_mba_sec_size) + + (0 * l_port_spec_sec_size) + l_attrOffset); + uint8_t l_port1 = *( i_pBuffer + ( i_pos * l_mba_sec_size) + + (1 * l_port_spec_sec_size) + l_attrOffset); switch (l_special) { @@ -809,8 +1000,9 @@ fapi::ReturnCode returnValue (const MBvpdAttrDef* i_pAttrDef, for (uint8_t l_port=0; l_port<NUM_PORTS;l_port++) { - uint8_t l_dimm0 = i_pBuffer-> - mb_mba[i_pos].mba_port[l_port].port_attr[l_attrOffset]; + + uint8_t l_dimm0 = *( i_pBuffer + ( i_pos * l_mba_sec_size) + + (l_port * l_port_spec_sec_size) + l_attrOffset); uint8_t l_dimm1 = 0; if (BOTH_DIMMS == l_special) { @@ -818,8 +1010,8 @@ fapi::ReturnCode returnValue (const MBvpdAttrDef* i_pAttrDef, } else { - l_dimm1 = i_pBuffer-> - mb_mba[i_pos].mba_port[l_port].port_attr[l_attrOffset+1]; + l_dimm1 = *( i_pBuffer + ( i_pos * l_mba_sec_size) + + (l_port * l_port_spec_sec_size) + l_attrOffset+ 1); switch (l_special) { case XLATE_DRAM_RON: // translate @@ -857,8 +1049,9 @@ fapi::ReturnCode returnValue (const MBvpdAttrDef* i_pAttrDef, { for (uint8_t l_k=0; l_k<NUM_RANKS; l_k++) { - l_value = i_pBuffer-> - mb_mba[i_pos].mba_port[l_port].port_attr[l_attrOffset+(l_j)*NUM_RANKS+l_k]; + l_value = *( i_pBuffer + ( i_pos * l_mba_sec_size) + + (l_port * l_port_spec_sec_size) + + ( l_attrOffset +(l_j)*NUM_RANKS+l_k)); switch (l_special) { case XLATE_RTT_NOM: // translate @@ -897,8 +1090,9 @@ fapi::ReturnCode returnValue (const MBvpdAttrDef* i_pAttrDef, uint16_t l_dataSpecial = SPECIAL_DATA_MASK & l_special; for (uint8_t l_port=0; l_port<2;l_port++) { - uint32_t l_value = getUint32 (l_dataSpecial, &(i_pBuffer-> - mb_mba[i_pos].mba_port[l_port].port_attr[l_attrOffset])); + uint32_t l_value = getUint32 (l_dataSpecial, + ( i_pBuffer + ( i_pos * l_mba_sec_size) + + + (l_port * l_port_spec_sec_size) + l_attrOffset)); switch (l_xlateSpecial) { case XLATE_RD_VREF: // translate @@ -943,8 +1137,11 @@ fapi::ReturnCode returnValue (const MBvpdAttrDef* i_pAttrDef, uint8_t l_vpdOffset = 0; for (uint8_t l_j=0; l_j<NUM_DIMMS; l_j++) { - uint32_t l_value = getUint32 (l_dataSpecial, &(i_pBuffer-> - mb_mba[i_pos].mba_port[l_port].port_attr[l_attrOffset+l_vpdOffset])); + uint32_t l_value = getUint32 (l_dataSpecial, + ( i_pBuffer + ( i_pos * l_mba_sec_size) + + + (l_port * l_port_spec_sec_size) + + (l_attrOffset+l_vpdOffset))); + (*(UINT32_BY2_BY2_t*)o_pVal)[l_port][l_j] = l_value; l_vpdOffset += l_vpdIncrement; } @@ -965,10 +1162,13 @@ fapi::ReturnCode returnValue (const MBvpdAttrDef* i_pAttrDef, uint64_t l_value = 0; if (MERGE == l_special) { - uint32_t l_port0 = getUint32 (UINT32_DATA, &(i_pBuffer-> - mb_mba[i_pos].mba_port[0].port_attr[l_attrOffset])); - uint32_t l_port1 = getUint32 (UINT32_DATA, &(i_pBuffer-> - mb_mba[i_pos].mba_port[1].port_attr[l_attrOffset])); + uint32_t l_port0 = getUint32 (UINT32_DATA, + ( i_pBuffer + ( i_pos * l_mba_sec_size) + + + (0 * l_port_spec_sec_size)+ l_attrOffset)); + uint32_t l_port1 = getUint32 (UINT32_DATA, + ( i_pBuffer + ( i_pos * l_mba_sec_size) + + + (1 * l_port_spec_sec_size)+ l_attrOffset)); + l_value = ( ((static_cast<uint64_t>(l_port0))<<32) | (static_cast<uint64_t>(l_port1)) ); } @@ -1295,7 +1495,6 @@ fapi::ReturnCode xlate_WR_VREF (const fapi::AttributeId i_attr, FAPI_SET_HWP_ERROR(l_fapirc, RC_MBVPD_TERM_DATA_UNSUPPORTED_VPD_ENCODE); break; } - return l_fapirc; } @@ -1445,7 +1644,6 @@ fapi::ReturnCode xlate_RD_VREF (const fapi::AttributeId i_attr, FAPI_SET_HWP_ERROR(l_fapirc, RC_MBVPD_TERM_DATA_UNSUPPORTED_VPD_ENCODE); break; } - return l_fapirc; } @@ -1647,7 +1845,8 @@ fapi::ReturnCode FindMRkeyword (const fapi::Target & i_mbTarget, // Determine ISDMM MT keyword to use fapi::ReturnCode FindMTkeyword (const fapi::Target & i_mbTarget, const fapi::Target & i_mbaTarget, - fapi::MBvpdKeyword & o_keyword) + fapi::MBvpdKeyword & o_keyword, + const VpdVersion & i_version) { fapi::ReturnCode l_fapirc; do @@ -1782,23 +1981,47 @@ fapi::ReturnCode FindMTkeyword (const fapi::Target & i_mbTarget, { case fapi::ENUM_ATTR_SPD_NUM_RANKS_R1: if( l_double_drop ) { - o_keyword = fapi::MBVPD_KEYWORD_T5; + if(i_version == VM_01){ + o_keyword = fapi::MBVPD_KEYWORD_PD5; + } else { + o_keyword = fapi::MBVPD_KEYWORD_T5; + } } else { - o_keyword = fapi::MBVPD_KEYWORD_T1; + if(i_version == VM_01){ + o_keyword = fapi::MBVPD_KEYWORD_PD1; + } else { + o_keyword = fapi::MBVPD_KEYWORD_T1; + } } break; case fapi::ENUM_ATTR_SPD_NUM_RANKS_R2: if( l_double_drop ) { - o_keyword = fapi::MBVPD_KEYWORD_T6; + if(i_version == VM_01){ + o_keyword = fapi::MBVPD_KEYWORD_PD6; + } else { + o_keyword = fapi::MBVPD_KEYWORD_T6; + } } else { - o_keyword = fapi::MBVPD_KEYWORD_T2; + if(i_version == VM_01){ + o_keyword = fapi::MBVPD_KEYWORD_PDZ; + } else { + o_keyword = fapi::MBVPD_KEYWORD_T2; + } } break; case fapi::ENUM_ATTR_SPD_NUM_RANKS_R4: if( l_double_drop ) { - o_keyword = fapi::MBVPD_KEYWORD_T8; + if(i_version == VM_01){ + o_keyword = fapi::MBVPD_KEYWORD_PD8; + } else { + o_keyword = fapi::MBVPD_KEYWORD_T8; + } } else { - o_keyword = fapi::MBVPD_KEYWORD_T4; + if(i_version == VM_01){ + o_keyword = fapi::MBVPD_KEYWORD_PD4; + } else { + o_keyword = fapi::MBVPD_KEYWORD_T4; + } } break; default: @@ -1810,6 +2033,7 @@ fapi::ReturnCode FindMTkeyword (const fapi::Target & i_mbTarget, } while (0); + if (!l_fapirc) { FAPI_DBG ("FindMTkeyword: use MT keyword %d",o_keyword); diff --git a/src/usr/hwpf/hwp/mvpd_accessors/getMBvpdAttrData.C b/src/usr/hwpf/hwp/mvpd_accessors/getMBvpdAttrData.C index 958d7c9e4..27fd1d821 100644 --- a/src/usr/hwpf/hwp/mvpd_accessors/getMBvpdAttrData.C +++ b/src/usr/hwpf/hwp/mvpd_accessors/getMBvpdAttrData.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2013,2015 */ +/* Contributors Listed Below - COPYRIGHT 2014,2015 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -22,7 +22,7 @@ /* permissions and limitations under the License. */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: getMBvpdAttrData.C,v 1.4 2015/03/16 18:51:46 janssens Exp $ +// $Id: getMBvpdAttrData.C,v 1.7 2015/09/30 20:44:12 janssens Exp $ /** * @file getMBvpdAttrData.C * @@ -50,6 +50,42 @@ namespace getAttrData const MBvpdAttrDef g_MBVPD_ATTR_DEF_array [] = { + +//---------------------------------------------------------------------------------- +// Attribute exceptions to use with SPDX or VSPD VM keyword +// Note: Ideally, all new exception will be in this section and be for both +// ISDIMMs and CDIMMMs +//---------------------------------------------------------------------------------- + {ATTR_VPD_MR_VERSION_BYTE,ALL_DIMM,VM_01,MBVPD_KEYWORD_MR,0,UINT8,0}, + {ATTR_VPD_MR_DATA_CONTROL_BYTE,ALL_DIMM,VM_01,MBVPD_KEYWORD_MR,1,UINT8,0}, + {ATTR_VPD_MT_VERSION_BYTE,ALL_DIMM,VM_01,MBVPD_KEYWORD_MT,0,UINT8,0}, + {ATTR_VPD_MT_DATA_CONTROL_BYTE,ALL_DIMM,VM_01,MBVPD_KEYWORD_MT,1,UINT8,0}, + {ATTR_VPD_PERIODIC_MEMCAL_MODE_OPTIONS,ALL_DIMM,VM_01,MBVPD_KEYWORD_MR,50,UINT32_BY2|UINT16_DATA,0}, + {ATTR_VPD_DRAM_RTT_PARK,ALL_DIMM,VM_01,MBVPD_KEYWORD_MT,10,UINT8_BY2_BY2_BY4|XLATE_RTT_WR,0}, + {ATTR_VPD_RD_CTR_WINDAGE_OFFSET,ALL_DIMM,VM_01,MBVPD_KEYWORD_MT,64,UINT32_BY2|UINT16_DATA,0}, + + {ATTR_VPD_DIMM_RCD_OUTPUT_TIMING,ALL_DIMM,VM_01,MBVPD_KEYWORD_MT,68,UINT8_BY2_BY2|DEFAULT_VALUE,0}, + {ATTR_VPD_DIMM_RCD_IBT,ALL_DIMM,VM_01,MBVPD_KEYWORD_MT,66,UINT32_BY2_BY2|DEFAULT_VALUE,0}, + {ATTR_VPD_CEN_RD_VREF,ALL_DIMM,VM_01,MBVPD_KEYWORD_MT,34,UINT32_BY2|UINT8_DATA|XLATE_RD_VREF,0}, + {ATTR_VPD_DRAM_WR_VREF,ALL_DIMM,VM_01,MBVPD_KEYWORD_MT,35,UINT32_BY2|UINT8_DATA|XLATE_WR_VREF,0}, + {ATTR_VPD_DRAM_WRDDR4_VREF,ALL_DIMM,VM_01,MBVPD_KEYWORD_MT,36,UINT8_BY2,0}, + {ATTR_VPD_CEN_RCV_IMP_DQ_DQS,ALL_DIMM,VM_01,MBVPD_KEYWORD_MT,37,UINT8_BY2,0}, + {ATTR_VPD_CEN_DRV_IMP_DQ_DQS,ALL_DIMM,VM_01,MBVPD_KEYWORD_MT,38,UINT8_BY2,0}, + {ATTR_VPD_CEN_DRV_IMP_CNTL,ALL_DIMM,VM_01,MBVPD_KEYWORD_MT,39,UINT8_BY2,0}, + {ATTR_VPD_CEN_DRV_IMP_ADDR,ALL_DIMM,VM_01,MBVPD_KEYWORD_MT,40,UINT8_BY2,0}, + {ATTR_VPD_CEN_DRV_IMP_CLK,ALL_DIMM,VM_01,MBVPD_KEYWORD_MT,41,UINT8_BY2,0}, + {ATTR_VPD_CEN_DRV_IMP_SPCKE,ALL_DIMM,VM_01,MBVPD_KEYWORD_MT,42,UINT8_BY2,0}, + {ATTR_VPD_CEN_SLEW_RATE_DQ_DQS,ALL_DIMM,VM_01,MBVPD_KEYWORD_MT,43,UINT8_BY2|XLATE_SLEW,0}, + {ATTR_VPD_CEN_SLEW_RATE_CNTL,ALL_DIMM,VM_01,MBVPD_KEYWORD_MT,44,UINT8_BY2|XLATE_SLEW,0}, + {ATTR_VPD_CEN_SLEW_RATE_ADDR,ALL_DIMM,VM_01,MBVPD_KEYWORD_MT,45,UINT8_BY2|XLATE_SLEW,0}, + {ATTR_VPD_CEN_SLEW_RATE_CLK,ALL_DIMM,VM_01,MBVPD_KEYWORD_MT,46,UINT8_BY2|XLATE_SLEW,0}, + {ATTR_VPD_CEN_SLEW_RATE_SPCKE,ALL_DIMM,VM_01,MBVPD_KEYWORD_MT,47,UINT8_BY2|XLATE_SLEW,0}, + {ATTR_VPD_CKE_PRI_MAP,ALL_DIMM,VM_01,MBVPD_KEYWORD_MT,48,UINT32_BY2|UINT16_DATA,0}, + {ATTR_VPD_CKE_PWR_MAP,ALL_DIMM,VM_01,MBVPD_KEYWORD_MT,50,UINT64|MERGE,0}, + {ATTR_VPD_RLO,ALL_DIMM,VM_01,MBVPD_KEYWORD_MT,54,UINT8_BY2|LOW_NIBBLE,0}, + {ATTR_VPD_WLO,ALL_DIMM,VM_01,MBVPD_KEYWORD_MT,54,UINT8_BY2|HIGH_NIBBLE,0}, + {ATTR_VPD_GPO,ALL_DIMM,VM_01,MBVPD_KEYWORD_MT,55,UINT8_BY2,0}, + //---------------------------------------------------------------------------------- // Attribute exceptions to use with SPDX or VSPD VD keyword // Note: Ideally, all new exception will be in this section and be for both diff --git a/src/usr/hwpf/hwp/mvpd_accessors/getMBvpdMemoryDataVersion.C b/src/usr/hwpf/hwp/mvpd_accessors/getMBvpdMemoryDataVersion.C new file mode 100644 index 000000000..2f83fa234 --- /dev/null +++ b/src/usr/hwpf/hwp/mvpd_accessors/getMBvpdMemoryDataVersion.C @@ -0,0 +1,172 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/usr/hwpf/hwp/mvpd_accessors/getMBvpdMemoryDataVersion.C $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +// $Id: getMBvpdMemoryDataVersion.C,v 1.3 2015/10/06 15:18:04 dcrowell Exp $ +/** + * @file getMBvpdMemoryDataVersion.C + * + * @brief get the Memory Data version from MBvpd record SPDX keyword VM + * + */ + +#include <stdint.h> + +// fapi support +#include <fapi.H> +#include <fapiUtil.H> +#include <getMBvpdMemoryDataVersion.H> +#include <fapiSystemConfig.H> +#include <getMBvpdAttr.H> +extern "C" +{ +using namespace fapi; +using namespace getAttrData; + +fapi::ReturnCode getMBvpdMemoryDataVersion( + const fapi::Target &i_mbTarget, + uint32_t & o_val) +{ + fapi::ReturnCode l_fapirc; + DimmType l_dimmType = ISDIMM; + fapi::MBvpdRecord l_record = fapi::MBVPD_RECORD_SPDX; + uint32_t l_vpdMemoryDataVersion = VM_KEYWORD_DEFAULT_VALUE; + uint32_t l_bufSize = sizeof(l_vpdMemoryDataVersion); + + FAPI_DBG("getMBvpdMemoryDataVersion: entry "); + + do { + + FAPI_DBG("getMBvpdMemoryDataVersion: Membuff path=%s ", + i_mbTarget.toEcmdString() ); + + // Find the dimm type + // Determine if ISDIMM or CDIMM + + // Find one mba target for passing it to fapiGetAssociatedDimms + std::vector<fapi::Target> l_mba_chiplets; + l_fapirc = fapiGetChildChiplets( i_mbTarget , + fapi::TARGET_TYPE_MBA_CHIPLET, l_mba_chiplets ); + if((l_fapirc) || (l_mba_chiplets.size() == 0)) + { + FAPI_ERR("getMBvpdMemoryDataVersion: Problem getting MBA's of Membuff"); + break; //return error + } + + std::vector<fapi::Target> l_target_dimm_array; + l_fapirc = fapiGetAssociatedDimms(l_mba_chiplets[0], l_target_dimm_array); + if(l_fapirc) + { + FAPI_ERR("getMBvpdMemoryDataVersion: Problem getting DIMMs of Membuff"); + break; //return error + } + if(l_target_dimm_array.size() != 0) + { + uint8_t l_customDimm=0; + l_fapirc = FAPI_ATTR_GET(ATTR_SPD_CUSTOM,&l_target_dimm_array[0], + l_customDimm); + if(l_fapirc) { + FAPI_ERR("getMBvpdMemoryDataVersion: ATTR_SPD_CUSTOM failed "); + break; //return error + } + + if (l_customDimm == fapi::ENUM_ATTR_SPD_CUSTOM_YES) + { + l_dimmType = CDIMM; + FAPI_DBG("getMBvpdMemoryDataVersion: CDIMM TYPE!!!"); + } + else + { + l_dimmType = ISDIMM; + FAPI_DBG("getMBvpdMemoryDataVersion: ISDIMM TYPE!!!"); + } + } + else + { + l_dimmType = ISDIMM; + FAPI_DBG("getMBvpdMemoryDataVersion: ISDIMM TYPE (dimm array size = 0)"); + } + + if( l_dimmType == CDIMM) + { + l_record = fapi::MBVPD_RECORD_VSPD; + } + + // get Memory Data version from record VSPD/SPDX keyword VM + l_fapirc = fapiGetMBvpdField(l_record, + fapi::MBVPD_KEYWORD_VM, + i_mbTarget, + reinterpret_cast<uint8_t *>(&l_vpdMemoryDataVersion), + l_bufSize); + if (l_fapirc) + { + FAPI_DBG("getMBvpdMemoryDataVersion: Returning default" + " as VM keyword read failed."); + l_fapirc = FAPI_RC_SUCCESS; // Lets make it success and return default + break; // break out and return + } + + // Check that sufficient size was returned. + if (l_bufSize < sizeof(l_vpdMemoryDataVersion) ) + { + FAPI_ERR("getMBvpdMemoryDataVersion:" + " less keyword data returned than expected %d < %d", + l_bufSize, sizeof(l_vpdMemoryDataVersion)); + const uint32_t & KEYWORD = fapi::MBVPD_KEYWORD_VM; + const uint32_t & RETURNED_SIZE = l_bufSize; + const fapi::Target & CHIP_TARGET = i_mbTarget; + FAPI_SET_HWP_ERROR(l_fapirc,RC_MBVPD_INSUFFICIENT_VPD_RETURNED); + break; // break out with fapirc + } + + // Check if the format byte in the value returned is in between valid range + if (( ((MBvpdVMKeyword *)(&l_vpdMemoryDataVersion))->iv_version > VM_SUPPORTED_HIGH_VER )|| + ( ((MBvpdVMKeyword *)(&l_vpdMemoryDataVersion))->iv_version == VM_NOT_SUPPORTED )) + { + FAPI_ERR("getMBvpdMemoryDataVersion:" + " keyword data returned is invalid : %d ", + l_vpdMemoryDataVersion); + const uint32_t & KEYWORD = fapi::MBVPD_KEYWORD_VM; + const uint32_t & RETURNED_VALUE = l_vpdMemoryDataVersion; + const uint32_t & RECORD_NAME = l_record; + const uint32_t & DIMM_TYPE = l_dimmType; + const fapi::Target & CHIP_TARGET = i_mbTarget; + FAPI_SET_HWP_ERROR(l_fapirc,RC_MBVPD_INVALID_VM_DATA_RETURNED); + break; // break out with fapirc + } + // return value + o_val = static_cast<uint32_t>(FAPI_BE16TOH(l_vpdMemoryDataVersion)); + + FAPI_DBG("getMBvpdMemoryDataVersion: Memory Data version=0x%08x", + o_val); + + + } while (0); + + FAPI_DBG("getMBvpdMemoryDataVersion: exit rc=0x%08x)", + static_cast<uint32_t>(l_fapirc)); + + return l_fapirc; +} + +} // extern "C" diff --git a/src/usr/hwpf/hwp/mvpd_accessors/getMBvpdSPDXRecordVersion.C b/src/usr/hwpf/hwp/mvpd_accessors/getMBvpdSPDXRecordVersion.C new file mode 100644 index 000000000..0dace4805 --- /dev/null +++ b/src/usr/hwpf/hwp/mvpd_accessors/getMBvpdSPDXRecordVersion.C @@ -0,0 +1,157 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/usr/hwpf/hwp/mvpd_accessors/getMBvpdSPDXRecordVersion.C $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +// $Id: getMBvpdSPDXRecordVersion.C,v 1.2 2015/09/29 20:55:54 janssens Exp $ +/** + * @file getMBvpdSPDXRecordVersion.C + * + * @brief get the SPDX record version from MBvpd record SPDX keyword VD + * + */ + +#include <stdint.h> + +// fapi support +#include <fapi.H> +#include <fapiUtil.H> +#include <getMBvpdSPDXRecordVersion.H> +#include <fapiSystemConfig.H> +#include <getMBvpdAttr.H> + +extern "C" +{ +using namespace fapi; +using namespace getAttrData; + +fapi::ReturnCode getMBvpdSPDXRecordVersion( + const fapi::Target &i_mbTarget, + uint32_t & o_val) +{ + fapi::ReturnCode l_fapirc; + DimmType l_dimmType = ISDIMM; + fapi::MBvpdRecord l_record = fapi::MBVPD_RECORD_SPDX; + uint16_t l_vpdSPDXRecordVersion = VD_KEYWORD_DEFAULT_VALUE; + uint32_t l_bufSize = sizeof(l_vpdSPDXRecordVersion); + + FAPI_DBG("getMBvpdSPDXRecordVersion: entry "); + + do { + + FAPI_DBG("getMBvpdSPDXRecordVersion: Membuff path=%s ", + i_mbTarget.toEcmdString() ); + + // Find the dimm type + // Determine if ISDIMM or CDIMM + + // Find one mba target for passing it to fapiGetAssociatedDimms + std::vector<fapi::Target> l_mba_chiplets; + l_fapirc = fapiGetChildChiplets( i_mbTarget , + fapi::TARGET_TYPE_MBA_CHIPLET, l_mba_chiplets ); + if((l_fapirc) || (l_mba_chiplets.size() == 0)) + { + FAPI_ERR("getMBvpdSPDXRecordVersion: Problem getting MBA's of Membuff"); + break; //return error + } + + std::vector<fapi::Target> l_target_dimm_array; + l_fapirc = fapiGetAssociatedDimms(l_mba_chiplets[0], l_target_dimm_array); + if(l_fapirc) + { + FAPI_ERR("getMBvpdSPDXRecordVersion: Problem getting DIMMs of Membuff"); + break; //return error + } + if(l_target_dimm_array.size() != 0) + { + uint8_t l_customDimm=0; + l_fapirc = FAPI_ATTR_GET(ATTR_SPD_CUSTOM,&l_target_dimm_array[0], + l_customDimm); + if(l_fapirc) { + FAPI_ERR("getMBvpdSPDXRecordVersion: ATTR_SPD_CUSTOM failed "); + break; //return error + } + + if (l_customDimm == fapi::ENUM_ATTR_SPD_CUSTOM_YES) + { + l_dimmType = CDIMM; + FAPI_DBG("getMBvpdSPDXRecordVersion: CDIMM TYPE!!!"); + } + else + { + l_dimmType = ISDIMM; + FAPI_DBG("getMBvpdSPDXRecordVersion: ISDIMM TYPE!!!"); + } + } + else + { + l_dimmType = ISDIMM; + FAPI_DBG("getMBvpdSPDXRecordVersion: ISDIMM TYPE (dimm array size = 0)"); + } + + if(l_dimmType == CDIMM) + { + l_record = fapi::MBVPD_RECORD_VSPD; + } + + // get version from record SPDX/VSPD keyword VD + l_fapirc = fapiGetMBvpdField(l_record, + fapi::MBVPD_KEYWORD_VD, + i_mbTarget, + reinterpret_cast<uint8_t *>(&l_vpdSPDXRecordVersion), + l_bufSize); + if (l_fapirc) + { + FAPI_DBG("getMBvpdSPDXRecordVersion: Returning default " + "as VD keyword read failed"); + l_fapirc = FAPI_RC_SUCCESS; // Lets make it success and return default + break; // break out with fapirc + } + + // Check that sufficient size was returned. + if (l_bufSize < sizeof(l_vpdSPDXRecordVersion) ) + { + FAPI_ERR("getMBvpdSPDXRecordVersion:" + " less keyword data returned than expected %d < %d", + l_bufSize, sizeof(l_vpdSPDXRecordVersion)); + const uint32_t & KEYWORD = fapi::MBVPD_KEYWORD_VD; + const uint32_t & RETURNED_SIZE = l_bufSize; + const fapi::Target & CHIP_TARGET = i_mbTarget; + FAPI_SET_HWP_ERROR(l_fapirc,RC_MBVPD_INSUFFICIENT_VPD_RETURNED); + break; // break out with fapirc + } + // return value + o_val = static_cast<uint32_t>(FAPI_BE16TOH(l_vpdSPDXRecordVersion)); + + FAPI_DBG("getMBvpdSPDXRecordVersion: SPDX Record version=0x%08x", + o_val); + + + } while (0); + + FAPI_DBG("getMBvpdSPDXRecordVersion: exit rc=0x%08x)", + static_cast<uint32_t>(l_fapirc)); + + return l_fapirc; +} + +} // extern "C" diff --git a/src/usr/hwpf/hwp/mvpd_accessors/getMBvpdSlopeInterceptData.C b/src/usr/hwpf/hwp/mvpd_accessors/getMBvpdSlopeInterceptData.C index ebeb3200e..e53e406cf 100644 --- a/src/usr/hwpf/hwp/mvpd_accessors/getMBvpdSlopeInterceptData.C +++ b/src/usr/hwpf/hwp/mvpd_accessors/getMBvpdSlopeInterceptData.C @@ -5,7 +5,9 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* COPYRIGHT International Business Machines Corp. 2013,2014 */ +/* Contributors Listed Below - COPYRIGHT 2013,2015 */ +/* [+] International Business Machines Corp. */ +/* */ /* */ /* Licensed under the Apache License, Version 2.0 (the "License"); */ /* you may not use this file except in compliance with the License. */ @@ -20,7 +22,7 @@ /* permissions and limitations under the License. */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: getMBvpdSlopeInterceptData.C,v 1.4 2014/02/12 22:12:00 mjjones Exp $ +// $Id: getMBvpdSlopeInterceptData.C,v 1.5 2015/09/29 15:59:42 dcrowell Exp $ /** * @file getMBvpdSlopeInterceptData.C * @@ -76,10 +78,14 @@ fapi::ReturnCode getMBvpdSlopeInterceptData( { case MASTER_POWER_SLOPE: case MASTER_POWER_INTERCEPT: + case MASTER_TOTAL_POWER_SLOPE: + case MASTER_TOTAL_POWER_INTERCEPT: l_fapirc = getMBvpdMasterData(i_mbTarget, i_attr, o_val); break; case SUPPLIER_POWER_SLOPE: case SUPPLIER_POWER_INTERCEPT: + case SUPPLIER_TOTAL_POWER_SLOPE: + case SUPPLIER_TOTAL_POWER_INTERCEPT: l_fapirc = getMBvpdSupplierData(i_mbTarget, i_attr, o_val); break; default: // Unlikely, but needs to be caught @@ -113,7 +119,10 @@ fapi::ReturnCode getMBvpdMasterData( uint8_t masterPowerSlope_LSB; uint8_t masterPowerIntercept_MSB; //big endian order uint8_t masterPowerIntercept_LSB; - uint8_t reserved[4]; + uint8_t masterTotalPowerSlope_MSB; //big endian order + uint8_t masterTotalPowerSlope_LSB; + uint8_t masterTotalPowerIntercept_MSB; //big endian order + uint8_t masterTotalPowerIntercept_LSB; uint8_t tempSensorPrimaryLayout; uint8_t tempSensorSecondaryLayout; }; @@ -164,6 +173,14 @@ fapi::ReturnCode getMBvpdMasterData( o_val = l_pMwBuffer->masterPowerIntercept_LSB; o_val |= (l_pMwBuffer->masterPowerIntercept_MSB << 8); break; + case MASTER_TOTAL_POWER_SLOPE: //get each byte to perserve endian + o_val = l_pMwBuffer->masterTotalPowerSlope_LSB; + o_val |= (l_pMwBuffer->masterTotalPowerSlope_MSB << 8); + break; + case MASTER_TOTAL_POWER_INTERCEPT: //get each byte to perserve endian + o_val = l_pMwBuffer->masterTotalPowerIntercept_LSB; + o_val |= (l_pMwBuffer->masterTotalPowerIntercept_MSB << 8); + break; default: //i_attr value was checked before call so should not get here break; } @@ -193,7 +210,7 @@ fapi::ReturnCode getMBvpdSupplierData( //#I keyword layout const uint32_t PDI_DDR3_KEYWORD_SIZE = 256; - const uint32_t PDI_DDR4_KEYWORD_SIZE = 512; // assumed size for DDR4 + const uint32_t PDI_DDR4_KEYWORD_SIZE = 384; // assumed size for DDR4 const uint8_t SPD_DDR3 = 0xB; const uint8_t SPD_DDR4 = 0xC; struct pdI_keyword @@ -214,10 +231,10 @@ fapi::ReturnCode getMBvpdSupplierData( } ddr3; struct // DDR4 layout of #I { - uint8_t filler1[320]; // other fields and reserved bytes + uint8_t filler1[350]; // other fields and reserved bytes uint8_t moduleID_MSB; // at offset 320. Big endian order uint8_t moduleID_LSB; // - uint8_t filler2[PDI_DDR4_KEYWORD_SIZE-320-2]; //trailing space + uint8_t filler2[PDI_DDR4_KEYWORD_SIZE-350-2]; //trailing space } ddr4; } pdI; }; @@ -231,7 +248,11 @@ fapi::ReturnCode getMBvpdSupplierData( uint8_t supplierPowerSlope_LSB; uint8_t supplierPowerIntercept_MSB; // Big endian order uint8_t supplierPowerIntercept_LSB; - uint8_t reserved[4]; + uint8_t supplierTotalPowerSlope_MSB; // Big endian order + uint8_t supplierTotalPowerSlope_LSB; + uint8_t supplierTotalPowerIntercept_MSB; // Big endian order + uint8_t supplierTotalPowerIntercept_LSB; + }; struct mv_keyword //variable length. Structure is size of 1 entry. { @@ -431,6 +452,15 @@ fapi::ReturnCode getMBvpdSupplierData( o_val = l_pVendorInfo->supplierPowerIntercept_LSB; o_val |= (l_pVendorInfo->supplierPowerIntercept_MSB << 8); break; + case SUPPLIER_TOTAL_POWER_SLOPE: //get each byte to perserve endian + o_val = l_pVendorInfo->supplierTotalPowerSlope_LSB; + o_val |= (l_pVendorInfo->supplierTotalPowerSlope_MSB << 8); + break; + case SUPPLIER_TOTAL_POWER_INTERCEPT: //get each byte to perserve endian + o_val = l_pVendorInfo->supplierTotalPowerIntercept_LSB; + o_val |= (l_pVendorInfo->supplierTotalPowerIntercept_MSB << 8); + break; + default: //i_attr value was checked already so should not get here break; } diff --git a/src/usr/hwpf/hwp/mvpd_accessors/getMBvpdVoltageSettingData.C b/src/usr/hwpf/hwp/mvpd_accessors/getMBvpdVoltageSettingData.C new file mode 100644 index 000000000..3985a403b --- /dev/null +++ b/src/usr/hwpf/hwp/mvpd_accessors/getMBvpdVoltageSettingData.C @@ -0,0 +1,154 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/usr/hwpf/hwp/mvpd_accessors/getMBvpdVoltageSettingData.C $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +// $Id: getMBvpdVoltageSettingData.C,v 1.2 2015/09/29 20:55:55 janssens Exp $ +/** + * @file getMBvpdVoltageSettingData.C + * + * @brief get the Voltage Setting Data from DW keyword of MBVPD SPDX record + * * + */ + +#include <stdint.h> + +// fapi support +#include <fapi.H> +#include <fapiUtil.H> +#include <getMBvpdVoltageSettingData.H> +#include <fapiSystemConfig.H> +#include <getMBvpdAttr.H> + +extern "C" +{ +using namespace fapi; +using namespace getAttrData; + +fapi::ReturnCode getMBvpdVoltageSettingData(const fapi::Target &i_mbTarget, + uint32_t & o_val) +{ + fapi::ReturnCode l_fapirc; + DimmType l_dimmType = ISDIMM; + fapi::MBvpdRecord l_record = fapi::MBVPD_RECORD_SPDX; + uint16_t l_vpdVoltageSettingData = DW_KEYWORD_DEFAULT_VALUE; + uint32_t l_bufSize = sizeof(l_vpdVoltageSettingData); + + FAPI_DBG("getMBvpdVoltageSettingData: entry "); + + do { + + FAPI_DBG("getMBvpdVoltageSettingData: Membuff path=%s ", + i_mbTarget.toEcmdString() ); + + // Find the dimm type + // Determine if ISDIMM or CDIMM + + // Find one mba target for passing it to fapiGetAssociatedDimms + std::vector<fapi::Target> l_mba_chiplets; + l_fapirc = fapiGetChildChiplets( i_mbTarget , + fapi::TARGET_TYPE_MBA_CHIPLET, l_mba_chiplets ); + if((l_fapirc) || (l_mba_chiplets.size() == 0)) + { + FAPI_ERR("getMBvpdVoltageSettingData: Problem getting MBA's of Membuff"); + break; //return error + } + + std::vector<fapi::Target> l_target_dimm_array; + l_fapirc = fapiGetAssociatedDimms(l_mba_chiplets[0], l_target_dimm_array); + if(l_fapirc) + { + FAPI_ERR("getMBvpdVoltageSettingData: Problem getting DIMMs of Membuf"); + break; //return error + } + if(l_target_dimm_array.size() != 0) + { + uint8_t l_customDimm=0; + l_fapirc = FAPI_ATTR_GET(ATTR_SPD_CUSTOM,&l_target_dimm_array[0], + l_customDimm); + if(l_fapirc) { + FAPI_ERR("getMBvpdVoltageSettingData: ATTR_SPD_CUSTOM failed "); + break; //return error + } + + if (l_customDimm == fapi::ENUM_ATTR_SPD_CUSTOM_YES) + { + l_dimmType = CDIMM; + FAPI_DBG("getMBvpdVoltageSettingData: CDIMM TYPE!!!"); + } + else + { + l_dimmType = ISDIMM; + FAPI_DBG("getMBvpdVoltageSettingData: ISDIMM TYPE!!!"); + } + } + else + { + l_dimmType = ISDIMM; + FAPI_DBG("getMBvpdVoltageSettingData: ISDIMM TYPE (dimm array size = 0)"); + } + + + if(l_dimmType == CDIMM) + { + l_record = fapi::MBVPD_RECORD_VSPD; + } + // get voltage setting data from record SPDX keyword DW + l_fapirc = fapiGetMBvpdField(l_record, + fapi::MBVPD_KEYWORD_DW, + i_mbTarget, + reinterpret_cast<uint8_t *>(&l_vpdVoltageSettingData), + l_bufSize); + if (l_fapirc) + { + FAPI_ERR("getMBvpdVersion: Read of DW keyword failed"); + break; // break out with fapirc + } + + // Check that sufficient size was returned. + if (l_bufSize < sizeof(l_vpdVoltageSettingData) ) + { + FAPI_ERR("getMBvpdVoltageSettingData:" + " less keyword data returned than expected %d < %d", + l_bufSize, sizeof(l_vpdVoltageSettingData)); + const uint32_t & KEYWORD = fapi::MBVPD_KEYWORD_DW; + const uint32_t & RETURNED_SIZE = l_bufSize; + const fapi::Target & CHIP_TARGET = i_mbTarget; + FAPI_SET_HWP_ERROR(l_fapirc,RC_MBVPD_INSUFFICIENT_VPD_RETURNED); + break; // break out with fapirc + } + // return value + o_val = static_cast<uint32_t>(FAPI_BE16TOH(l_vpdVoltageSettingData)); + + FAPI_DBG("getMBvpdVoltageSettingData: voltage setting Data=0x%08x", + o_val); + + + } while (0); + + FAPI_DBG("getMBvpdVoltageSettingData: exit rc=0x%08x)", + static_cast<uint32_t>(l_fapirc)); + + return l_fapirc; +} + +} // extern "C" diff --git a/src/usr/hwpf/hwp/mvpd_accessors/mvpd.mk b/src/usr/hwpf/hwp/mvpd_accessors/mvpd.mk index 0f5206b6c..e90063cc6 100644 --- a/src/usr/hwpf/hwp/mvpd_accessors/mvpd.mk +++ b/src/usr/hwpf/hwp/mvpd_accessors/mvpd.mk @@ -38,6 +38,9 @@ OBJS += getMBvpdAddrMirrorData.o OBJS += getMBvpdSlopeInterceptData.o OBJS += getMBvpdSpareDramData.o OBJS += getMBvpdVersion.o +OBJS += getMBvpdMemoryDataVersion.o +OBJS += getMBvpdSPDXRecordVersion.o +OBJS += getMBvpdVoltageSettingData.o OBJS += getMBvpdDram2NModeEnabled.o OBJS += getMBvpdSensorMap.o OBJS += getControlCapableData.o diff --git a/src/usr/hwpf/hwp/mvpd_accessors/mvpd_errors.xml b/src/usr/hwpf/hwp/mvpd_accessors/mvpd_errors.xml index 5e27863d3..29fe1ea31 100644 --- a/src/usr/hwpf/hwp/mvpd_accessors/mvpd_errors.xml +++ b/src/usr/hwpf/hwp/mvpd_accessors/mvpd_errors.xml @@ -154,6 +154,62 @@ </hwpError> <!-- ********************************************************************* --> <hwpError> + <rc>RC_MBVPD_INVALID_VM_DATA_RETURNED</rc> + <description> + VM keyword data returned is out of range of supported version values. + Probably a firmware bug, but could be bad VPD + </description> + <ffdc>KEYWORD</ffdc> + <ffdc>RETURNED_VALUE</ffdc> + <ffdc>RECORD_NAME</ffdc> + <ffdc>DIMM_TYPE</ffdc> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + <callout> + <target>CHIP_TARGET</target> + <priority>MEDIUM</priority> + </callout> + </hwpError> + <!-- ********************************************************************* --> + <hwpError> + <rc>RC_MBVPD_INVALID_VM_VERSION_RETURNED</rc> + <description> + VM version returned is out of range of supported version values. + Probably a firmware bug, but could be bad VPD + </description> + <ffdc>KEYWORD</ffdc> + <ffdc>RETURNED_VALUE</ffdc> + <ffdc>RECORD_NAME</ffdc> + <ffdc>DIMM_TYPE</ffdc> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + <callout> + <target>CHIP_TARGET</target> + <priority>MEDIUM</priority> + </callout> + </hwpError> + <!-- ********************************************************************* --> + <hwpError> + <rc>RC_MBVPD_UNEXPECTED_KEYWORD</rc> + <description> + Unexpected VPD keyword defined for the attribute in + attribute look up table , which doesn't have any layout properties. + </description> + <ffdc>ATTR_ID</ffdc> + <ffdc>KEYWORD</ffdc> + <ffdc>VERSION</ffdc> + <ffdc>DIMM_TYPE</ffdc> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + </hwpError> + <!-- ********************************************************************* --> + <hwpError> <rc>RC_MBVPD_SUPPLIER_ID_NOT_IN_MV_VPD</rc> <description> The Module ID in the #I keyword is not in the list of supplier provided entries in the MV keyword. diff --git a/src/usr/hwpf/plat/fapiPlatAttributeService.C b/src/usr/hwpf/plat/fapiPlatAttributeService.C index 651204ce8..82e7afd41 100644 --- a/src/usr/hwpf/plat/fapiPlatAttributeService.C +++ b/src/usr/hwpf/plat/fapiPlatAttributeService.C @@ -47,6 +47,9 @@ #include <hwpf/hwp/mvpd_accessors/getMBvpdSlopeInterceptData.H> #include <hwpf/hwp/mvpd_accessors/getMBvpdSpareDramData.H> #include <hwpf/hwp/mvpd_accessors/getMBvpdVersion.H> +#include <hwpf/hwp/mvpd_accessors/getMBvpdMemoryDataVersion.H> +#include <hwpf/hwp/mvpd_accessors/getMBvpdSPDXRecordVersion.H> +#include <hwpf/hwp/mvpd_accessors/getMBvpdVoltageSettingData.H> #include <hwpf/hwp/mvpd_accessors/getMBvpdDram2NModeEnabled.H> #include <hwpf/hwp/mvpd_accessors/getMBvpdSensorMap.H> #include <hwpf/hwp/mvpd_accessors/getMBvpdAttr.H> @@ -308,6 +311,70 @@ fapi::ReturnCode fapiPlatGetSpdAttr(const fapi::Target * i_pFapiTarget, } //****************************************************************************** +// fapiPlatGetModuleType function. +//****************************************************************************** +fapi::ReturnCode fapiPlatGetModuleType(const fapi::Target * i_pFapiTarget, + uint8_t & o_name) +{ + fapi::ReturnCode l_rc; + TARGETING::Target * l_pHbTarget = NULL; + o_name = ENUM_ATTR_NAME_NONE; + + l_rc = getTargetingTarget(i_pFapiTarget, l_pHbTarget , + TARGETING::TYPE_DIMM); + + if (l_rc) + { + FAPI_ERR("fapiPlatGetTargetName: Error from getTargetingTarget"); + } + else + { + errlHndl_t l_err = NULL; + size_t l_len = sizeof(uint8_t); + uint8_t l_memType = 0; + l_err = deviceRead(l_pHbTarget , &l_memType, l_len, + DEVICE_SPD_ADDRESS(SPD::BASIC_MEMORY_TYPE)); + + + if (l_err) + { + // Add the error log pointer as data to the ReturnCode + FAPI_ERR("fapiPlatGetModuleType: Error from deviceRead") + l_rc.setPlatError(reinterpret_cast<void *> (l_err)); + } + else + { + l_err = deviceRead(l_pHbTarget , &o_name, l_len, + DEVICE_SPD_ADDRESS(SPD::MODULE_TYPE)); + if (l_err) + { + // Add the error log pointer as data to the ReturnCode + FAPI_ERR("fapiPlatGetModuleType: Error from deviceRead") + l_rc.setPlatError(reinterpret_cast<void *> (l_err)); + } + else + { + + if(((l_memType == fapi::ENUM_ATTR_SPD_DRAM_DEVICE_TYPE_DDR4) && + (o_name == SPD::JEDEC_VER4_LRDIMM_VAL))|| + ((l_memType == fapi::ENUM_ATTR_SPD_DRAM_DEVICE_TYPE_DDR3)&& + (o_name == SPD::JEDEC_VER3_LRDIMM_VAL))) + { + o_name = fapi::ENUM_ATTR_SPD_MODULE_TYPE_LRDIMM; + + } + } + } + } + + return l_rc; +} + + + + + +//****************************************************************************** // fapiPlatSetSpdAttr function. // Call SPD device driver to set the SPD attribute //****************************************************************************** @@ -1096,6 +1163,34 @@ fapi::ReturnCode fapiPlatGetProcPcieBarSize ( return l_rc; } +fapi::ReturnCode fapiPlatGetMBvpdMemoryDataVersion( + const fapi::Target * i_pTarget, + uint32_t & o_val) +{ + // Call a VPD Accessor HWP to get the data + fapi::ReturnCode l_rc; + FAPI_EXEC_HWP(l_rc, getMBvpdMemoryDataVersion, *i_pTarget, o_val); + return l_rc; +} +fapi::ReturnCode fapiPlatGetMBvpdSPDXRecordVersion( + const fapi::Target * i_pTarget, + uint32_t & o_val) +{ + // Call a VPD Accessor HWP to get the data + fapi::ReturnCode l_rc; + FAPI_EXEC_HWP(l_rc, getMBvpdSPDXRecordVersion, *i_pTarget, o_val); + return l_rc; +} +fapi::ReturnCode fapiPlatGetMBvpdVoltageSettingData( + const fapi::Target * i_pTarget, + uint32_t & o_val) +{ + // Call a VPD Accessor HWP to get the data + fapi::ReturnCode l_rc; + FAPI_EXEC_HWP(l_rc, getMBvpdVoltageSettingData, *i_pTarget, o_val); + return l_rc; +} + fapi::ReturnCode fapiPlatGetSingleMemberEnableAttr( const fapi::Target * i_pTarget, uint32_t & o_val) @@ -1811,13 +1906,13 @@ fapi::ReturnCode fapiPlatGetTpVitlSpyOffsetAttr( return l_rc; } -fapi::ReturnCode fapiPlatGetMemAttrData ( +fapi::ReturnCode fapiPlatGetNodeMemAttrData ( const fapi::Target * i_pTarget, const TARGETING::ATTRIBUTE_ID i_attr, uint32_t & o_val) { - FAPI_DBG("fapiPlatGetMemAttrData: START: i_attr=0x%X", i_attr); + FAPI_DBG("fapiPlatGetNodeMemAttrData: START: i_attr=0x%X", i_attr); fapi::ReturnCode l_rc; TARGETING::Target * l_pTgt = NULL; @@ -1830,7 +1925,7 @@ fapi::ReturnCode fapiPlatGetMemAttrData ( if (l_rc) { - FAPI_ERR("fapiPlatGetMemAttrData: Error from getTargetingTarget"); + FAPI_ERR("fapiPlatGetNodeMemAttrData: Error from getTargetingTarget"); break; } @@ -1849,7 +1944,7 @@ fapi::ReturnCode fapiPlatGetMemAttrData ( // Node list should only have 1 tgt if (l_nodeList.size() != 1 ) { - FAPI_ERR("fapiPlatGetMemAttrData: expect 1 node %d ", + FAPI_ERR("fapiPlatGetNodeMemAttrData: expect 1 node %d ", l_nodeList.size()); /*@ @@ -1858,7 +1953,7 @@ fapi::ReturnCode fapiPlatGetMemAttrData ( * @reasoncode RC_NO_SINGLE_NODE * @userdata1 Number of Nodes * @userdata2 MEMBUF Target HUID - * @devdesc fapiPlatGetMemAttrData could not find the single + * @devdesc fapiPlatGetNodeMemAttrData could not find the single * node associated with this membuf target */ const bool hbSwError = true; @@ -1980,7 +2075,7 @@ fapi::ReturnCode fapiPlatGetMemAttrData ( if (!l_success) { - FAPI_ERR("fapiPlatGetMemAttrData: Error from _tryGetAttr"); + FAPI_ERR("fapiPlatGetNodeMemAttrData: Error from _tryGetAttr"); /*@ * @errortype @@ -2009,7 +2104,7 @@ fapi::ReturnCode fapiPlatGetMemAttrData ( } while (0); - FAPI_DBG("fapiPlatGetMemAttrData: EXIT: i_attr=0x%X --> o_val = %d (0x%X)", + FAPI_DBG("fapiPlatGetNodeMemAttrData: EXIT: i_attr=0x%X --> o_val = %d (0x%X)", i_attr, o_val, o_val); return l_rc; diff --git a/src/usr/hwpf/plat/fapiPlatMBvpdAccess.C b/src/usr/hwpf/plat/fapiPlatMBvpdAccess.C index d8f2922a4..7d5eee7aa 100644 --- a/src/usr/hwpf/plat/fapiPlatMBvpdAccess.C +++ b/src/usr/hwpf/plat/fapiPlatMBvpdAccess.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2013,2014 */ +/* Contributors Listed Below - COPYRIGHT 2013,2015 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -175,6 +175,17 @@ fapi::ReturnCode MBvpdKeywordXlate(const fapi::MBvpdKeyword i_fapiKeyword, CVPD::K6, CVPD::K7, CVPD::K8, + CVPD::MM, + CVPD::SS, + CVPD::ET, + CVPD::VM, + CVPD::pd1, + CVPD::pdZ, + CVPD::pd4, + CVPD::pd5, + CVPD::pd6, + CVPD::pd8, + CVPD::pdY, }; const uint8_t NUM_MBVPD_KEYWORDS = sizeof(mbvpdFapiKeywordToHbKeyword)/sizeof(mbvpdFapiKeywordToHbKeyword[0]); diff --git a/src/usr/vpd/cvpd.H b/src/usr/vpd/cvpd.H index 9c729c389..0ffbcc1ee 100644 --- a/src/usr/vpd/cvpd.H +++ b/src/usr/vpd/cvpd.H @@ -160,6 +160,14 @@ namespace CVPD { MM, "MM" }, { SS, "SS" }, { ET, "ET" }, + { VM, "VM" }, + { pd1, "#1" }, + { pdZ, "#Z" }, + { pd4, "#4" }, + { pd5, "#5" }, + { pd6, "#6" }, + { pd8, "#8" }, + { pdY, "#Y" }, // ------------------------------------------------------------------- // DO NOT USE!! This is for test purposes ONLY! diff --git a/src/usr/vpd/spd.C b/src/usr/vpd/spd.C index 3ca80fbff..4bd6ad6f7 100644 --- a/src/usr/vpd/spd.C +++ b/src/usr/vpd/spd.C @@ -1000,7 +1000,7 @@ errlHndl_t ddr3SpecialCases(const KeywordData & i_kwdData, case DRAM_MANUFACTURER_ID: case MODULE_CRC: case RMM_MFR_ID_CODE: - case LRMM_MFR_ID_CODE: + case MODSPEC_MM_MFR_ID_CODE: // Get MSB err = spdFetchData( i_kwdData.offset, 1, /* Read 1 byte at a time */ @@ -1112,7 +1112,7 @@ errlHndl_t ddr4SpecialCases(const KeywordData & i_kwdData, case UMM_CRC: case RMM_MFR_ID_CODE: case RMM_CRC: - case LRMM_MFR_ID_CODE: + case MODSPEC_MM_MFR_ID_CODE: case LRMM_CRC: // Get MSB err = spdFetchData( i_kwdData.offset, diff --git a/src/usr/vpd/spdDDR3.H b/src/usr/vpd/spdDDR3.H index a4a620aa9..06fc33aa5 100644 --- a/src/usr/vpd/spdDDR3.H +++ b/src/usr/vpd/spdDDR3.H @@ -154,7 +154,7 @@ const KeywordData ddr3Data[] = { LRMM_NUM_ROWS, 0x3f, 0x01, 0x0c, 0x02, false, false, LRMM }, { LRMM_MIRRORING, 0x3f, 0x01, 0x03, 0x00, false, false, LRMM }, { LRMM_REVISION_NUM, 0x40, 0x01, 0x00, 0x00, false, false, LRMM }, - { LRMM_MFR_ID_CODE, 0x42, 0x02, 0x00, 0x00, true, false, LRMM }, + { MODSPEC_MM_MFR_ID_CODE, 0x42, 0x02, 0x00, 0x00, true, false, ALL }, // Module Specific fields supported on DDR3 only { RMM_REG_TYPE, 0x44, 0x01, 0x07, 0x00, false, false, RMM }, { RMM_RC1, 0x45, 0x01, 0xf0, 0x04, false, false, RMM }, diff --git a/src/usr/vpd/spdDDR4.H b/src/usr/vpd/spdDDR4.H index 7e22f13d2..8eb8b3cab 100644 --- a/src/usr/vpd/spdDDR4.H +++ b/src/usr/vpd/spdDDR4.H @@ -67,8 +67,8 @@ const KeywordData ddr4Data[] = // Keyword offset size Bitmsk Shift Spec Writ- Mod // Number Case able Spec // ------------------------------------------------------------------------------------------ + // // Normal fields supported on both DDR3 and DDR4 - { CRC_EXCLUDE, 0x00, 0x01, 0x80, 0x07, false, false, NA }, { SPD_BYTES_TOTAL, 0x00, 0x01, 0x70, 0x04, false, false, NA }, { SPD_BYTES_USED, 0x00, 0x01, 0x0F, 0x00, false, false, NA }, { SPD_MAJOR_REVISION, 0x01, 0x01, 0xF0, 0x04, false, false, NA }, @@ -95,7 +95,6 @@ const KeywordData ddr4Data[] = { SDRAM_THERMAL_REFRESH_OPTIONS, 0x08, 0x01, 0x00, 0x00, false, false, NA }, { MODULE_THERMAL_SENSOR, 0x0e, 0x01, 0x00, 0x00, false, false, NA }, { THERMAL_SENSOR_PRESENT, 0x0e, 0x01, 0x80, 0x07, false, false, NA }, - { THERMAL_SENSOR_ACCURACY, 0x0e, 0x01, 0x7F, 0x00, false, false, NA }, { SDRAM_DEVICE_TYPE , 0x06, 0x01, 0x80, 0x07, false, false, NA }, { SDRAM_DIE_COUNT, 0x06, 0x01, 0x70, 0x04, false, false, NA }, { SDRAM_DEVICE_TYPE_SIGNAL_LOADING, 0x06, 0x01, 0x03, 0x00, false, false, NA }, @@ -150,15 +149,37 @@ const KeywordData ddr4Data[] = { RMM_HEAT_SP_CHARS, 0x84, 0x01, 0x7F, 0x00, false, false, RMM }, { RMM_MFR_ID_CODE, 0x86, 0x02, 0x00, 0x00, true, false, RMM }, { RMM_REG_REV_NUM, 0x87, 0x01, 0x00, 0x00, false, false, RMM }, - { LRMM_HEAT_SP, 0x83, 0x01, 0x80, 0x07, false, false, LRMM }, + { LRMM_HEAT_SP, 0x84, 0x01, 0x80, 0x07, false, false, LRMM }, { LRMM_NUM_ROWS, 0x83, 0x01, 0x0c, 0x02, false, false, LRMM }, { LRMM_MIRRORING, 0x83, 0x01, 0x03, 0x00, false, false, LRMM }, - { LRMM_REVISION_NUM, 0x84, 0x01, 0x00, 0x00, false, false, LRMM }, - { LRMM_MFR_ID_CODE, 0x86, 0x02, 0x00, 0x00, true, false, LRMM }, + { LRMM_REVISION_NUM, 0x87, 0x01, 0x00, 0x00, false, false, LRMM }, + { MODSPEC_MM_MFR_ID_CODE, 0x86, 0x02, 0x00, 0x00, true, false, ALL }, // Module Specific fields supported on DDR4 only { MODSPEC_COM_RAW_CARD_EXT, 0x80, 0x01, 0xe0, 0x05, false, false, ALL }, { UMM_CRC, 0xff, 0x02, 0x00, 0x00, true, false, UMM }, { RMM_ADDR_MAPPING, 0x88, 0x01, 0x01, 0x00, false, false, RMM }, + { MODSPEC_MM_ATTRIBS, 0x83, 0x01, 0x00, 0x00, false, false, ALL }, + { MODSPEC_MM_ADDR_MAPPING, 0x88, 0x02, 0x00, 0x00, false, false, ALL }, + { MODSPEC_MM_DRV_STRENGTH_CNTL, 0x89, 0x01, 0x00, 0x00, false, false, ALL }, + { MODSPEC_MM_DRV_STRENGTH_CK, 0x8a, 0x01, 0x00, 0x00, false, false, ALL }, + { LRMM_VREF_DQ_RANK0, 0x8c, 0x01, 0x00, 0x00, false, false, LRMM }, + { LRMM_VREF_DQ_RANK1, 0x8d, 0x01, 0x00, 0x00, false, false, LRMM }, + { LRMM_VREF_DQ_RANK2, 0x8e, 0x01, 0x00, 0x00, false, false, LRMM }, + { LRMM_VREF_DQ_RANK3, 0x8f, 0x01, 0x00, 0x00, false, false, LRMM }, + { LRMM_VREF_DQ_FOR_DRAM, 0x90, 0x01, 0x00, 0x00, false, false, LRMM }, + { LRMM_MDQ_DRV_LT_1866, 0x91, 0x01, 0x00, 0x00, false, false, LRMM }, + { LRMM_MDQ_DRV_1866_2400, 0x92, 0x01, 0x00, 0x00, false, false, LRMM }, + { LRMM_MDQ_DRV_2400_3200, 0x93, 0x01, 0x00, 0x00, false, false, LRMM }, + { LRMM_DRV_STRENGTH, 0x94, 0x01, 0x00, 0x00, false, false, LRMM }, + { LRMM_ODT_RTT_WR_LT_1866, 0x95, 0x01, 0x07, 0x00, false, false, LRMM }, + { LRMM_ODT_RTT_NOM_LT_1866, 0x95, 0x01, 0x38, 0x03, false, false, LRMM }, + { LRMM_ODT_RTT_WR_1866_2400, 0x96, 0x01, 0x07, 0x00, false, false, LRMM }, + { LRMM_ODT_RTT_NOM_1866_2400, 0x96, 0x01, 0x38, 0x03, false, false, LRMM }, + { LRMM_ODT_RTT_WR_2400_3200, 0x97, 0x01, 0x07, 0x00, false, false, LRMM }, + { LRMM_ODT_RTT_NOM_2400_3200, 0x97, 0x01, 0x38, 0x03, false, false, LRMM }, + { LRMM_ODT_RTT_PARK_LT_1866, 0x98, 0x01, 0x00, 0x00, false, false, LRMM }, + { LRMM_ODT_RTT_PARK_1866_2400, 0x99, 0x01, 0x00, 0x00, false, false, LRMM }, + { LRMM_ODT_RTT_PARK_2400_3200, 0x9a, 0x01, 0x00, 0x00, false, false, LRMM }, { RMM_CRC, 0xff, 0x02, 0x00, 0x00, true, false, RMM }, { LRMM_CRC, 0xff, 0x02, 0x00, 0x00, true, false, LRMM }, { ENTIRE_SPD, 0x00, 0x200, 0x00, 0x00, false, false, ALL }, |
