blackbird-hostboot/src/usr/xscom, branch 07-25-2019

Correct ptr math and force CI i/o in kernal for machchk escalation

2019-12-03T22:48:31+00:00

When we take machine checks in hostboot we will escalate them to a checkstop by setting bit 31 in the PB Fir reg 0x5012000. This is done via xscom in some kernel code. There were 2 bugs found in this path. The first was in how we were calculating the MMIO addressed used to perform the xscom. The other issue was that we were not forcing the kernel code to perform a cache-inhibited store. This commit addressed both of these problems. Change-Id: I41871fa754cbedf4cdb913711ce02a00f0213334 CQ: SW481030 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/87539 Tested-by: Jenkins Server Tested-by: Jenkins OP Build CI Tested-by: Jenkins OP HW Tested-by: FSP CI Jenkins Reviewed-by: Daniel M Crowell Reviewed-by: Nicholas E Bofferding Reviewed-by: William G Hoffa

Remove CONFIG_AXONE_BRING_UP from xscomtest

2019-07-28T19:33:31+00:00

Initially tried with local checkstop register, but that register has simics actions which will clear the set bit0. This was previously incorrectly setting the wrong bit, but FIR action was executed and setting bit0. To make things cleaner a new FIR register was chosen that doesn't have simics actions associated with it. Change-Id: Iae2d429b82b8c3eab94db2f46495a1b488347b15 RTC:201738 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/80426 Tested-by: Jenkins Server Tested-by: Jenkins OP Build CI Tested-by: Jenkins OP HW Tested-by: FSP CI Jenkins Reviewed-by: Roland Veloz Reviewed-by: Corey V Swenson Reviewed-by: Daniel M Crowell

Run Axone simics all the way to completion by default

2019-04-19T15:16:13+00:00

Prior to this commit we ended the IPL at istep 14.7 and ran the CXX test suite before shutting down. This commit will allow us to run through istep 21 like a standard IPL. Change-Id: Ifb567dc30e7ecbb31ed59889ff900411633844bf Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/76098 Reviewed-by: Matthew Raybuck Tested-by: Jenkins Server Tested-by: Jenkins OP Build CI Reviewed-by: Matt Derksen Tested-by: FSP CI Jenkins Tested-by: Jenkins OP HW Reviewed-by: Daniel M. Crowell

Method to execute testcases early in the boot

2019-02-28T15:51:50+00:00

A new CONFIG variable has been created that will trigger the istep dispatcher to start the CXX unit test execution at some point during the boot rather than waiting until the end. This is useful for quick targeted testing and also for early bringup of new platforms. CONFIG_EARLY_TESTCASES is the new flag, and it uses ATTR_EARLY_TESTCASES_ISTEP to determine where in the boot to stop. Changes were required in several testcases to either skip the test completely (typically due to not having enough memory) or to add additional logic to load new support libraries on demand. The Axone platform has this flag enabled by default to execute testcases at the end of istep 6.9 (host_gard). Change-Id: I1da9479e2147d68102f44d60e064c3b79cc41bb6 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71693 Tested-by: Jenkins Server Tested-by: Jenkins OP Build CI Tested-by: Jenkins OP HW Tested-by: FSP CI Jenkins Reviewed-by: Christian R. Geddes Reviewed-by: Roland Veloz Reviewed-by: Matt Derksen Reviewed-by: William G. Hoffa

Extend multicast workaround and add tests

2018-11-09T15:30:00+00:00

- Add support for multicast OR op type - Add xscom and scom multicast tests - Avoid false fails by not setting multicast bit in bad address tests Change-Id: I32ea5b1b68a1a2f0d92c2b82b5ab1b932ddb54af RTC:198114 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/65778 Tested-by: Jenkins Server Tested-by: Jenkins OP Build CI Tested-by: Jenkins OP HW Reviewed-by: Matt Derksen Tested-by: FSP CI Jenkins Reviewed-by: Christian R. Geddes Reviewed-by: Daniel M. Crowell

Save HRMOR in mbox scratch reg for IPC messaging

2018-06-26T21:10:40+00:00

In order to know where the IPC message of a given node is, we save off the HRMOR of every node in a hw register. Originally, we were saving this information in the core scratch register. Since, the core scratch registers are wiped off when the cores go into the winkle state, therefore, we were writing to the register after we come out of winkle. But, at that point, we ran into race conditions because other nodes could be ahead and try to access the register on a node that is not exactly out of winkle yet. This fixes the problems by using the mbox scratch register rather than the core scratch register because they are saved off even when the cores go into winkle state. Because the registers are preseved, we can set the value prior to cores coming out of winkle, so, we don't run into the race condition where one node is trying to read a value prior to the other one writing the value. Change-Id: I822bfc8defe09cbb418edc5f36a99b7cd41eec88 CQ:SW435271 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/61093 Tested-by: Jenkins Server Tested-by: Jenkins OP Build CI Tested-by: Jenkins OP HW Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell

Fixes to node IPC messaging to handle non-zero base addresses

2018-06-07T17:37:46+00:00

Current code has each Node calculate each Remote Node's IPC area remote address by performing a fixed format calculation. This change has each Node calculating its IPC area Remote address and posting this value to a local SCOM register. A Node reads a Remote Node's SCOM register to acquire the Remote IPC area address. Change-Id: I25260ce180e0d07e5e81990d4c1f99e249912491 RTC:191463 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59177 Tested-by: Jenkins Server Reviewed-by: William G. Hoffa Tested-by: Jenkins OP Build CI Tested-by: Jenkins OP HW Tested-by: FSP CI Jenkins Reviewed-by: Prachi Gupta Reviewed-by: Daniel M. Crowell

Centaur Channel Checkstop (runtime)

2018-06-05T18:00:46+00:00

This story covers when a DMI channel gets checkstopped at runtime and how to service the subsequent SCOM operations that PRD requests to diagnose the issue. At runtime, PRD makes all of its SCOM requests to HBRT which passes them on to PHYP for in-band access. The checkstop blocks in-band access, so HBRT must fail-over to messaging the FSP to do FSI accesses. To reduce the number of SCOM calls to the FSP, HBRT makes a "multi-SCOM read" call for all the common SCOMs that PRD will request after a checkstop, and caches the results. Two new calls (MBOX, generic messaging interface) to the FSP were added in a previous commit to allow FSI SCOM operations through the FSP: - MSG_SINGLE_SCOM_OP - MSG_MULTI_SCOM_OP Also, a new map, chnlFailScomList, was added in a previous commit. chnlFailScomList contains a list of target types and associated SCOM addresses that PRD is likely want to read after a checkstop. PRD is responsible for maintaining the contents. Change-Id: I829a72067007ac8a61d80caa690d8eedee0f08cc RTC:189294 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59197 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell Tested-by: Jenkins OP Build CI Tested-by: Jenkins OP HW Tested-by: FSP CI Jenkins Reviewed-by: William G. Hoffa

Set the runtime scom trace buffers with constants

2018-04-18T21:24:54+00:00

Change-Id: I6c5e0ce2dde28210125cf698cc4c27b7fe3bdb1e Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56757 Tested-by: Jenkins Server Tested-by: Jenkins OP Build CI Tested-by: Jenkins OP HW Tested-by: FSP CI Jenkins Reviewed-by: Martin Gloff Reviewed-by: Christian R. Geddes Reviewed-by: Daniel M. Crowell

Add ibscom runtime support

2018-04-02T17:44:41+00:00

- Add ibscom runtime files - Make ibscom multicast workaround common - Call from ibscom rt_ibscom - Make scom sanity check common - Call from xscom rt_xscom ibscom rt_ibscom RTC:190144 Change-Id: Ia52feac596ff6b6c8fb9f0db4493f35e4ee837af Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56215 Tested-by: Jenkins Server Tested-by: Jenkins OP Build CI Tested-by: Jenkins OP HW Tested-by: FSP CI Jenkins Reviewed-by: Martin Gloff Reviewed-by: Daniel M. Crowell