blackbird-hostboot/src/usr/scom, branch 07-25-2019

Make RT_TARG id generation code common between IPL time and runtime

2020-01-22T15:45:00+00:00

For axone we are writing the OMI mmio bars into hdat so the hypervisor know how to talk to the devices. IPL code needs to be able to lookup the hbrt-style ids so we can use them to make hdat entries that the hypervisor will be able to associate targets with. This commit also move rt_targeting.H to the correct include directory and updates everywhere that it is included. Change-Id: I31deaa1a9c5a7523622a8b3b12ad459e2b2feed3 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/80419 Tested-by: Jenkins Server Tested-by: Jenkins OP Build CI Tested-by: Jenkins OP HW Tested-by: FSP CI Jenkins Reviewed-by: Daniel M Crowell

Automatically include config.h

2019-12-06T16:28:47+00:00

Rather than having to remember to include config.h anywhere we reference a CONFIG variable (and usually forgetting), this adds it to the default compiler flags so that it gets included in every source file we build. Change-Id: I53622ab4d46c55d942e98cae6ec03049fd5b3d08 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/87475 Tested-by: Jenkins Server Tested-by: Jenkins OP Build CI Tested-by: Jenkins OP HW Tested-by: FSP CI Jenkins Reviewed-by: Zachary Clark Reviewed-by: Roland Veloz Reviewed-by: Christian R Geddes Reviewed-by: Nicholas E Bofferding

Support scoms to MEM_PORT targets

2019-10-28T21:17:58+00:00

Some of the memory HWPs require MEM_PORT scom support for Explorer. There is no address translation required but we need to allow the scoms to occur. Added testcase paths to scom MEM_PORT targets. Change-Id: I00b29e8dda6a105e994a5dcd009fd4b8aebdbdef Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/85690 Tested-by: Jenkins Server Tested-by: FSP CI Jenkins Reviewed-by: Christian R Geddes Reviewed-by: Corey V Swenson Tested-by: Jenkins OP Build CI Tested-by: Jenkins OP HW Reviewed-by: William G Hoffa

Axone 2-Proc Standalone Sim Enablement

2019-08-30T18:15:28+00:00

- XML Additions for all targets on 2nd proc Change-Id: Ib8a860e4679e08253076abbbade98f4ba172e81d RTC: 208448 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/82685 Reviewed-by: Christian R Geddes Reviewed-by: Michael Baiocchi Tested-by: Jenkins Server Tested-by: Jenkins OP Build CI Tested-by: Jenkins OP HW Tested-by: FSP CI Jenkins Reviewed-by: Nicholas E Bofferding

Runtime scom support for OCMBs

2019-08-15T22:06:46+00:00

fapi2::getScom on OCMB targets eventually resolves to a mmio call at runtime. This commit registers a runtime version of mmioScomPerformOp to the IBSCOM device ops for OCMB targets. During runtime, hostboot will rely on the hypervisor (opal/phyp) to issue the inband commands to perform the operation on the desired OCMB. Change-Id: I5ec25d0401267125419cd579a3a2d752f14234a4 RTC:210321 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/80235 Tested-by: Jenkins Server Tested-by: Jenkins OP Build CI Tested-by: Jenkins OP HW Tested-by: FSP CI Jenkins Reviewed-by: Christian R Geddes Reviewed-by: Roland Veloz Reviewed-by: Daniel M Crowell

Enable the scomtest for AXONE config

2019-06-24T15:22:10+00:00

Needed to adjust one scom address for Axone MI target and a simics fix for missing scom address resolved the other issue. Change-Id: I1b21009273935936504f47fb8390d28062376bbe RTC:201738 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/78966 Tested-by: Jenkins Server Tested-by: Jenkins OP Build CI Tested-by: FSP CI Jenkins Tested-by: Jenkins OP HW Reviewed-by: Christian R. Geddes Reviewed-by: Roland Veloz Reviewed-by: Glenn Miles Reviewed-by: Daniel M. Crowell

NPU SCOM translation Hostboot updates

2019-06-11T16:13:03+00:00

Change-Id: I92aeaf9a73d07f74c54c85322c7c620e060ac6a0 RTC: 208523 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/78439 Reviewed-by: Brian J. Stegmiller Tested-by: Jenkins Server Reviewed-by: Benjamen G. Tyner Tested-by: Jenkins OP Build CI Tested-by: FSP CI Jenkins Tested-by: Jenkins OP HW Reviewed-by: Paul Greenwood Reviewed-by: Zane C. Shelley

Updates to testcases for Axone

2019-03-07T22:35:52+00:00

Disabling a few testcases temporarily until Axone gets off the ground. Cleaned up some bad traces, etc in existing code. Add CI support for AXONE config Change-Id: I7a2140366e225971c91a50cec1f7e822e4847078 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/72186 Tested-by: Jenkins Server Reviewed-by: Matt Derksen Tested-by: FSP CI Jenkins Tested-by: Jenkins OP Build CI Tested-by: Jenkins OP HW Reviewed-by: Christian R. Geddes

Add new memory related chiplet types to scomtrans function

2019-02-05T22:56:05+00:00

Somehow this got missed when we did a first pass adding in scom support for axone. Hit this will doing bringup, one of the scominit HWPs was failing without this while trying to target a MCC chiplet. Change-Id: Ie17ed1d6a5bdb7ec0e06623436d3eec26dafbf31 RTC: 196806 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71177 Tested-by: Jenkins Server Tested-by: Jenkins OP Build CI Tested-by: FSP CI Jenkins Tested-by: Jenkins OP HW Reviewed-by: Matt Derksen Reviewed-by: Corey V. Swenson Reviewed-by: Daniel M. Crowell

Route scom operations on OCMB chips to exp_i2c_scom interface

2018-11-15T18:18:39+00:00

Before we get OMI targets trained we must use i2c to access scom registers on the OCMB chip. This commit does all of the plumbing so when HWP calls getScom() on a OCMB target, the hostboot platform recognizes this as a special scom and routes it to a new i2scom DD. This device driver will truncate the scom address to 32 bits and run the exp_i2c_putscom/exp_i2c_getscom interfaces to perform the operation. Eventually we need to also support MMIO scoms to the OCMB chip, the MMIO scoms will be used after the OMI training is complete. Change-Id: I0018cc8d25f74d1253b72c3112d3e344a4248416 RTC: 196806 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/67976 Reviewed-by: Matt Derksen Tested-by: Jenkins Server Reviewed-by: Ilya Smirnov Tested-by: Jenkins OP Build CI Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell