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<title>blackbird-hostboot/src/include/usr/intr, branch 07-25-2019</title>
<subtitle>Blackbird™ hostboot sources</subtitle>
<id>https://git.raptorcs.com/git/blackbird-hostboot/atom?h=07-25-2019</id>
<link rel='self' href='https://git.raptorcs.com/git/blackbird-hostboot/atom?h=07-25-2019'/>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/blackbird-hostboot/'/>
<updated>2018-08-01T21:13:13+00:00</updated>
<entry>
<title>Only unmask source on proc targ passed to unmask function in intrrp</title>
<updated>2018-08-01T21:13:13+00:00</updated>
<author>
<name>Christian Geddes</name>
<email>crgeddes@us.ibm.com</email>
</author>
<published>2018-07-23T17:53:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/blackbird-hostboot/commit/?id=98a657059a5cee86695434ddcf2f6f1f0a774d90'/>
<id>urn:sha1:98a657059a5cee86695434ddcf2f6f1f0a774d90</id>
<content type='text'>
There was a bug in the code where if an interrupt was resolved for
a source the code to clean up the pending interrupt in the intrrp
will unmask the source. This was actually unmasking the source on all
processors. This causes odd behavior if there was an outstanding int
on that source on one of the other processors. Essentially the intrrp
would think that a new interrupt came in but we will already be handling
it. The logic breaks down here and we end up getting in a locked state.

Fixing this caused issues with Hostboot management of the maskList
which kept track of which sources were masked. Instead of managing this
list of masked sources hostboot will instead keep track of sources which
are not registered to any msg Qs. When new processors are added to the
interrupt resource provider after fabric is up, all LSI sources who are
not registered to a msg Q will be masked for the new processor.

CQ: SW419101
Change-Id: I86f5bc2a748383e18b1853d9bf9480f265c214fd
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/63158
Tested-by: Jenkins Server &lt;pfd-jenkins+hostboot@us.ibm.com&gt;
Tested-by: Jenkins OP Build CI &lt;op-jenkins+hostboot@us.ibm.com&gt;
Tested-by: Jenkins OP HW &lt;op-hw-jenkins+hostboot@us.ibm.com&gt;
Tested-by: FSP CI Jenkins &lt;fsp-CI-jenkins+hostboot@us.ibm.com&gt;
Reviewed-by: Dean Sanner &lt;dsanner@us.ibm.com&gt;
Reviewed-by: Daniel M. Crowell &lt;dcrowell@us.ibm.com&gt;
</content>
</entry>
<entry>
<title>Print out MBOX/INTR state info on DMA request hang</title>
<updated>2018-07-05T13:50:43+00:00</updated>
<author>
<name>Christian Geddes</name>
<email>crgeddes@us.ibm.com</email>
</author>
<published>2018-06-20T16:06:19+00:00</published>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/blackbird-hostboot/commit/?id=50e72792adbdea613e4a2aeea25b60ba1043a2b8'/>
<id>urn:sha1:50e72792adbdea613e4a2aeea25b60ba1043a2b8</id>
<content type='text'>
We have been stuck on a hang that occurs during memdiags on
our multi-node p9 systems. It appears that Hostboot is never
receiving the response to the request to reclaim DMA buffers
from the FSP. From debugging we know the FSP thinks it has sent
the message over the FSI mbox but hostboot isnt seeing it. Next
time this happens if this is in the code we should be able to
get a better idea of what is happening.

Change-Id: I6b702e4094da3576ba454b5cdf0660841961baff
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60977
Reviewed-by: Richard Ward &lt;rward15@us.ibm.com&gt;
Tested-by: Jenkins Server &lt;pfd-jenkins+hostboot@us.ibm.com&gt;
Tested-by: Jenkins OP Build CI &lt;op-jenkins+hostboot@us.ibm.com&gt;
Tested-by: Jenkins OP HW &lt;op-hw-jenkins+hostboot@us.ibm.com&gt;
Reviewed-by: Roland Veloz &lt;rveloz@us.ibm.com&gt;
Tested-by: FSP CI Jenkins &lt;fsp-CI-jenkins+hostboot@us.ibm.com&gt;
Reviewed-by: William G. Hoffa &lt;wghoffa@us.ibm.com&gt;
</content>
</entry>
<entry>
<title>FFDC enhancements for core activate fails</title>
<updated>2018-05-19T21:56:42+00:00</updated>
<author>
<name>Dan Crowell</name>
<email>dcrowell@us.ibm.com</email>
</author>
<published>2018-04-26T18:01:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/blackbird-hostboot/commit/?id=a4e02fc0828910582a08cb1277a30531540d7523'/>
<id>urn:sha1:a4e02fc0828910582a08cb1277a30531540d7523</id>
<content type='text'>
Adding some more traces to the error log we grab for core
activation failures.

Change-Id: I30c6985060fcffcb3382b775a52e59c08d2b51b7
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/57907
Tested-by: Jenkins Server &lt;pfd-jenkins+hostboot@us.ibm.com&gt;
Tested-by: FSP CI Jenkins &lt;fsp-CI-jenkins+hostboot@us.ibm.com&gt;
Tested-by: Jenkins OP Build CI &lt;op-jenkins+hostboot@us.ibm.com&gt;
Tested-by: Jenkins OP HW &lt;op-hw-jenkins+hostboot@us.ibm.com&gt;
Reviewed-by: Matt Derksen &lt;mderkse1@us.ibm.com&gt;
Reviewed-by: Daniel M. Crowell &lt;dcrowell@us.ibm.com&gt;
</content>
</entry>
<entry>
<title>Multi-Drawer (IPC) Interrupt/Messaging Support</title>
<updated>2018-01-25T22:44:20+00:00</updated>
<author>
<name>Bill Hoffa</name>
<email>wghoffa@us.ibm.com</email>
</author>
<published>2018-01-09T14:16:44+00:00</published>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/blackbird-hostboot/commit/?id=cb444552aebafa54ceb0417c12d61cd48fbc65e0'/>
<id>urn:sha1:cb444552aebafa54ceb0417c12d61cd48fbc65e0</id>
<content type='text'>
 - Use doorbells instead of IPIs (no IPI support
   using LSI interupts in the XIVE intr architecture)

 - New message type from kernel to userspace so the
   kernel can notify the HB userspace Interrupt
   Resource Provider (INTRP) that an IPC message was
   sent to the particular HB instance (in P8 this
   happened automatically as that was part of the
   IPI architecture).

 - Re-enable testcase that validates that an IPC
   message can be successfully sent.

Change-Id: Ic846f8dca45217205ed61d8381a573e995cb16f2
RTC: 150861
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/52004
Tested-by: Jenkins Server &lt;pfd-jenkins+hostboot@us.ibm.com&gt;
Tested-by: Jenkins OP Build CI &lt;op-jenkins+hostboot@us.ibm.com&gt;
Tested-by: Jenkins OP HW &lt;op-hw-jenkins+hostboot@us.ibm.com&gt;
Reviewed-by: Christian R. Geddes &lt;crgeddes@us.ibm.com&gt;
Tested-by: FSP CI Jenkins &lt;fsp-CI-jenkins+hostboot@us.ibm.com&gt;
Reviewed-by: Prachi Gupta &lt;pragupta@us.ibm.com&gt;
Reviewed-by: Daniel M. Crowell &lt;dcrowell@us.ibm.com&gt;
</content>
</entry>
<entry>
<title>Interrupt Handling Flow Change to Prevent Deadlock</title>
<updated>2018-01-16T02:31:09+00:00</updated>
<author>
<name>Bill Hoffa</name>
<email>wghoffa@us.ibm.com</email>
</author>
<published>2018-01-09T19:04:33+00:00</published>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/blackbird-hostboot/commit/?id=f7a5547478eae53e6623164b8faacfaf6e721cb1'/>
<id>urn:sha1:f7a5547478eae53e6623164b8faacfaf6e721cb1</id>
<content type='text'>
  - Previously the End of Interrupt (EOI) message was
    sent after the registered interrupt handler completed
    handling of the defect. Instead of this, now the INTRP
    will immediately mask the current interrupt source and
    issue the HW EOI to allow other interrupt sources to
    present.

  - Later when the registered interrupt handler sends INTRP
    its EOI message the INTRP will unmask the source and
    issue the necessary HW EOI to fully clear the interrupt

Change-Id: I01c99ca9fdd0cedcf3d313127a8d56f5cda66bc7
CQ: SW413511
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/51691
Tested-by: Jenkins Server &lt;pfd-jenkins+hostboot@us.ibm.com&gt;
Tested-by: Jenkins OP Build CI &lt;op-jenkins+hostboot@us.ibm.com&gt;
Tested-by: Jenkins OP HW &lt;op-hw-jenkins+hostboot@us.ibm.com&gt;
Reviewed-by: Daniel M. Crowell &lt;dcrowell@us.ibm.com&gt;
Tested-by: FSP CI Jenkins &lt;fsp-CI-jenkins+hostboot@us.ibm.com&gt;
Reviewed-by: Christian R. Geddes &lt;crgeddes@us.ibm.com&gt;
</content>
</entry>
<entry>
<title>Fix race condition between INTR and SBEIO</title>
<updated>2017-07-31T16:24:33+00:00</updated>
<author>
<name>Dan Crowell</name>
<email>dcrowell@us.ibm.com</email>
</author>
<published>2017-07-19T18:49:58+00:00</published>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/blackbird-hostboot/commit/?id=ad20498a1a7b857517759cbb173fe9d936107d63'/>
<id>urn:sha1:ad20498a1a7b857517759cbb173fe9d936107d63</id>
<content type='text'>
Fixed a race condition in clearing out the PSU interrupt
register that existed between the INTR and SBEIO code.
We can sometimes lose interrupts for SBE PSU operations
which leads to a timeout.

Also added code to look for SBE errors if a PSU
operation times out

Change-Id: I8cdcdcc08956b038bcc65ad7e00a34719bf14c61
CQ: SW396057
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43339
Tested-by: Jenkins Server &lt;pfd-jenkins+hostboot@us.ibm.com&gt;
Reviewed-by: Elizabeth K. Liner &lt;eliner@us.ibm.com&gt;
Tested-by: Jenkins OP Build CI &lt;op-jenkins+hostboot@us.ibm.com&gt;
Tested-by: Jenkins OP HW &lt;op-hw-jenkins+hostboot@us.ibm.com&gt;
Tested-by: FSP CI Jenkins &lt;fsp-CI-jenkins+hostboot@us.ibm.com&gt;
Reviewed-by: Martin Gloff &lt;mgloff@us.ibm.com&gt;
Reviewed-by: William G. Hoffa &lt;wghoffa@us.ibm.com&gt;
</content>
</entry>
<entry>
<title>Hostboot Base TCE Support</title>
<updated>2017-03-08T16:06:34+00:00</updated>
<author>
<name>Mike Baiocchi</name>
<email>mbaiocch@us.ibm.com</email>
</author>
<published>2016-11-04T16:30:17+00:00</published>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/blackbird-hostboot/commit/?id=c3d233bbaf7a2f274147d16edbc080bae0ffd714'/>
<id>urn:sha1:c3d233bbaf7a2f274147d16edbc080bae0ffd714</id>
<content type='text'>
This commit adds the base support for hostboot to enable/disable the
use of TCEs.  It allows for the creation and managment of a TCE table
and also initializes the P9 processors to use this table.

Change-Id: Idb40f9df5a90d8b7e87b2f5b745cbe7e66109df2
RTC:145071
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32562
Tested-by: Jenkins Server &lt;pfd-jenkins+hostboot@us.ibm.com&gt;
Reviewed-by: Stephen M. Cprek &lt;smcprek@us.ibm.com&gt;
Tested-by: FSP CI Jenkins &lt;fsp-CI-jenkins+hostboot@us.ibm.com&gt;
Reviewed-by: Marshall J. Wilks &lt;mjwilks@us.ibm.com&gt;
Reviewed-by: Nicholas E. Bofferding &lt;bofferdn@us.ibm.com&gt;
Tested-by: Jenkins OP Build CI &lt;op-jenkins+hostboot@us.ibm.com&gt;
Reviewed-by: William G. Hoffa &lt;wghoffa@us.ibm.com&gt;
</content>
</entry>
<entry>
<title>Multi-Proc Interrupt Support with Remote LSIs</title>
<updated>2016-10-07T19:29:39+00:00</updated>
<author>
<name>Bill Hoffa</name>
<email>wghoffa@us.ibm.com</email>
</author>
<published>2016-09-14T14:18:09+00:00</published>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/blackbird-hostboot/commit/?id=0d9f6d9a95c5b22d4044904e3563945638fe1c75'/>
<id>urn:sha1:0d9f6d9a95c5b22d4044904e3563945638fe1c75</id>
<content type='text'>
Change-Id: I8a981628cd3adc54ba581deb0ce8afb183febef3
RTC: 150562
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29719
Tested-by: Jenkins Server &lt;pfd-jenkins+hostboot@us.ibm.com&gt;
Tested-by: FSP CI Jenkins &lt;fsp-CI-jenkins+hostboot@us.ibm.com&gt;
Reviewed-by: Dean Sanner &lt;dsanner@us.ibm.com&gt;
Reviewed-by: Prachi Gupta &lt;pragupta@us.ibm.com&gt;
Reviewed-by: Daniel M. Crowell &lt;dcrowell@us.ibm.com&gt;
</content>
</entry>
<entry>
<title>P9 PSIHB Base Interrupt Support</title>
<updated>2016-03-30T20:24:17+00:00</updated>
<author>
<name>Bill Hoffa</name>
<email>wghoffa@us.ibm.com</email>
</author>
<published>2015-10-15T18:59:58+00:00</published>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/blackbird-hostboot/commit/?id=6b5097872a33a20d4c03f995ca8f1585b9e43e53'/>
<id>urn:sha1:6b5097872a33a20d4c03f995ca8f1585b9e43e53</id>
<content type='text'>
This change includes the following:
   - Kernel Updates to handle hypervisor interrupt vector
   - Interrupt Resource Provider changes to setup and handle
     LSI Based interrupts
   - Kernel updates to handle modified interrupt flow for
     LSI Based interrupts
   - Attribute updates for Scom BAR Registers

Change-Id: If63f246a0090ab8c81c3fa8ac3ab6871a0af2e31
RTC:137561
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/20692
Tested-by: Jenkins Server
Tested-by: FSP CI Jenkins
Reviewed-by: Andrew J. Geissler &lt;andrewg@us.ibm.com&gt;
Reviewed-by: Prachi Gupta &lt;pragupta@us.ibm.com&gt;
Reviewed-by: Daniel M. Crowell &lt;dcrowell@us.ibm.com&gt;
</content>
</entry>
<entry>
<title>Update constants and comments for P9 PIR format</title>
<updated>2016-02-29T21:29:48+00:00</updated>
<author>
<name>Dan Crowell</name>
<email>dcrowell@us.ibm.com</email>
</author>
<published>2015-12-14T15:30:28+00:00</published>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/blackbird-hostboot/commit/?id=bee7f1cbcd5bf18acc539c9c9b6a14960dadea3d'/>
<id>urn:sha1:bee7f1cbcd5bf18acc539c9c9b6a14960dadea3d</id>
<content type='text'>
Implemented a set of macros and constants that can be used
everywhere to translate a PIR into its component parts
and pull out individual pieces of data from a complete
PIR.
Also added and updated the references to the old
ATTR_FABRIC_NODE_ID with ATTR_FABRIC_GROUP_ID.

Change-Id: If9735f53940e5849a648729e4bf8ca0cfbb09f6e
RTC: 88055
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/706
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell &lt;dcrowell@us.ibm.com&gt;
</content>
</entry>
</feed>
