<feed xmlns='http://www.w3.org/2005/Atom'>
<title>blackbird-hostboot/src/build/simics, branch 07-25-2019</title>
<subtitle>Blackbird™ hostboot sources</subtitle>
<id>https://git.raptorcs.com/git/blackbird-hostboot/atom?h=07-25-2019</id>
<link rel='self' href='https://git.raptorcs.com/git/blackbird-hostboot/atom?h=07-25-2019'/>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/blackbird-hostboot/'/>
<updated>2020-01-10T21:18:32+00:00</updated>
<entry>
<title>Support for ATTR_TMP and GUARD in standalone simics</title>
<updated>2020-01-10T21:18:32+00:00</updated>
<author>
<name>Dan Crowell</name>
<email>dcrowell@us.ibm.com</email>
</author>
<published>2019-12-10T22:40:44+00:00</published>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/blackbird-hostboot/commit/?id=c6aaded090e34c4da293d118205f7de18421b161'/>
<id>urn:sha1:c6aaded090e34c4da293d118205f7de18421b161</id>
<content type='text'>
If a file called ATTR_TMP or GUARD exists in the simics search
path, they will be automatically loaded into pnor when simics
starts.  The offset is computed when the pnor is built by
way of a generated python file that we then load into simics.

Change-Id: I4d68215a589dcbdaefb2a67e65d1f6928ce639fa
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/88398
Tested-by: Jenkins Server &lt;pfd-jenkins+hostboot@us.ibm.com&gt;
Reviewed-by: Luis P Fernandez &lt;luis.fernandez@ibm.com&gt;
Tested-by: Jenkins OP Build CI &lt;op-jenkins+hostboot@us.ibm.com&gt;
Tested-by: Jenkins OP HW &lt;op-hw-jenkins+hostboot@us.ibm.com&gt;
Tested-by: FSP CI Jenkins &lt;fsp-CI-jenkins+hostboot@us.ibm.com&gt;
Reviewed-by: Matt Derksen &lt;mderkse1@us.ibm.com&gt;
Reviewed-by: Nicholas E Bofferding &lt;bofferdn@us.ibm.com&gt;
</content>
</entry>
<entry>
<title>Update axone pnor layout to move eecache to the begining</title>
<updated>2019-09-16T20:09:50+00:00</updated>
<author>
<name>Christian Geddes</name>
<email>crgeddes@us.ibm.com</email>
</author>
<published>2019-09-13T21:06:09+00:00</published>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/blackbird-hostboot/commit/?id=69f3bd2539118f8a4659c12f8c5ae4336c9dced6'/>
<id>urn:sha1:69f3bd2539118f8a4659c12f8c5ae4336c9dced6</id>
<content type='text'>
Because we rely on having a stable offset for the EECACHE section
of pnor we will move it to the start of the pnor layout. This will
make it less likely to move around as now we are auto-adjusting
offsets if sections like HBI happen to exceed to allotted space.

Change-Id: I4463c9d1cfb6ba86c777c976f911b14be5a483e3
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/83791
Reviewed-by: Zachary Clark &lt;zach@ibm.com&gt;
Tested-by: Jenkins Server &lt;pfd-jenkins+hostboot@us.ibm.com&gt;
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Tested-by: Jenkins OP HW &lt;op-hw-jenkins+hostboot@us.ibm.com&gt;
Reviewed-by: William G Hoffa &lt;wghoffa@us.ibm.com&gt;
Reviewed-by: Daniel M Crowell &lt;dcrowell@us.ibm.com&gt;
</content>
</entry>
<entry>
<title>Update startup.simics To Disable SBE Updates</title>
<updated>2019-09-13T13:19:10+00:00</updated>
<author>
<name>Ilya Smirnov</name>
<email>ismirno@us.ibm.com</email>
</author>
<published>2019-09-12T19:38:53+00:00</published>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/blackbird-hostboot/commit/?id=c049efe4425d7dbb7b44964da5372a6b1bdd90aa'/>
<id>urn:sha1:c049efe4425d7dbb7b44964da5372a6b1bdd90aa</id>
<content type='text'>
Update the startup.simics command to disable SBE update using
new simics UI.

Change-Id: I80ab844fe5dcb976b9d41907ac3803e12edb801a
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/83736
Tested-by: Jenkins Server &lt;pfd-jenkins+hostboot@us.ibm.com&gt;
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Tested-by: FSP CI Jenkins &lt;fsp-CI-jenkins+hostboot@us.ibm.com&gt;
Reviewed-by: Michael Baiocchi &lt;mbaiocch@us.ibm.com&gt;
Reviewed-by: Matthew Raybuck &lt;matthew.raybuck@ibm.com&gt;
Reviewed-by: Daniel M Crowell &lt;dcrowell@us.ibm.com&gt;
</content>
</entry>
<entry>
<title>Account for Explorer's DMB_REVISION format in its SPD</title>
<updated>2019-09-11T15:52:05+00:00</updated>
<author>
<name>Christian Geddes</name>
<email>crgeddes@us.ibm.com</email>
</author>
<published>2019-08-26T20:58:17+00:00</published>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/blackbird-hostboot/commit/?id=bafe5de9d8b538d978d9955386b5f1fd0ae1d82b'/>
<id>urn:sha1:bafe5de9d8b538d978d9955386b5f1fd0ae1d82b</id>
<content type='text'>
We have been told that the field we are reading to figure out the
EC level of the OCMB via its SPD (offset 0x200) is going to say
0xA0 for the first version of the card, at IBM we would call this
EC 0x10. The Explorer manufacture has stated that they will increment
the 1st nibble when they do match card revisions, and the 2nd nibble
on minor revisions. This commit adds the logic to convert the
manufacture's revision format into IBM's EC level format. It also
updates the prebuilt cache we use in simics for axone to have the
expected 0xA0 value for the explorer SPD stored in the prebuilt cache

Change-Id: I10e9523a8fbea847e3124c256fab7bee850cb29d
RTC: 214627
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/82873
Tested-by: Jenkins Server &lt;pfd-jenkins+hostboot@us.ibm.com&gt;
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Tested-by: Jenkins OP HW &lt;op-hw-jenkins+hostboot@us.ibm.com&gt;
Tested-by: FSP CI Jenkins &lt;fsp-CI-jenkins+hostboot@us.ibm.com&gt;
Reviewed-by: Matt Derksen &lt;mderkse1@us.ibm.com&gt;
Reviewed-by: Daniel M Crowell &lt;dcrowell@us.ibm.com&gt;
</content>
</entry>
<entry>
<title>Update sim scripts to use $proc_chip_type to lookup chip for Axone</title>
<updated>2019-08-20T15:04:17+00:00</updated>
<author>
<name>Christian Geddes</name>
<email>crgeddes@us.ibm.com</email>
</author>
<published>2019-08-15T21:55:15+00:00</published>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/blackbird-hostboot/commit/?id=a950157bfa82be76566ba9a81783592f42f727c9'/>
<id>urn:sha1:a950157bfa82be76566ba9a81783592f42f727c9</id>
<content type='text'>
Update the simics scripts to use variables provided by simics

Change-Id: I5c01760630911d723286fcb1450a78e7e44c56a1
RTC: 204842
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/82306
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Reviewed-by: Corey V Swenson &lt;cswenson@us.ibm.com&gt;
Reviewed-by: Roland Veloz &lt;rveloz@us.ibm.com&gt;
Reviewed-by: Daniel M Crowell &lt;dcrowell@us.ibm.com&gt;
</content>
</entry>
<entry>
<title>Enable secure boot in Axone simics</title>
<updated>2019-08-02T13:42:59+00:00</updated>
<author>
<name>Matt Derksen</name>
<email>mderkse1@us.ibm.com</email>
</author>
<published>2019-07-31T19:33:40+00:00</published>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/blackbird-hostboot/commit/?id=3a146159cff78f77566b80d632bc18a7a6941124'/>
<id>urn:sha1:3a146159cff78f77566b80d632bc18a7a6941124</id>
<content type='text'>
SECUREBOOT::enabled() was returning 0.
secure_jumper access was changed in Axone.
Updating startup.simics to use new method.

Change-Id: I55baac73172dd43257b14850575b61241e9d8083
RTC:201738
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/81456
Reviewed-by: Hieu C Nguyen &lt;hieu.nguyen@us.ibm.com&gt;
Tested-by: Jenkins Server &lt;pfd-jenkins+hostboot@us.ibm.com&gt;
Reviewed-by: Christian R Geddes &lt;crgeddes@us.ibm.com&gt;
Tested-by: Jenkins OP Build CI &lt;op-jenkins+hostboot@us.ibm.com&gt;
Reviewed-by: Roland Veloz &lt;rveloz@us.ibm.com&gt;
Tested-by: FSP CI Jenkins &lt;fsp-CI-jenkins+hostboot@us.ibm.com&gt;
Tested-by: Jenkins OP HW &lt;op-hw-jenkins+hostboot@us.ibm.com&gt;
Reviewed-by: Daniel M Crowell &lt;dcrowell@us.ibm.com&gt;
</content>
</entry>
<entry>
<title>Remove MVPD,MEMD and CENHWIMG section from Axone pnor layout</title>
<updated>2019-07-30T20:19:58+00:00</updated>
<author>
<name>Christian Geddes</name>
<email>crgeddes@us.ibm.com</email>
</author>
<published>2019-07-11T16:14:02+00:00</published>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/blackbird-hostboot/commit/?id=b3c0accfea52da03ec2b31fecc4271655aaa68f0'/>
<id>urn:sha1:b3c0accfea52da03ec2b31fecc4271655aaa68f0</id>
<content type='text'>
This commit removes the MVPD, MEMD and CENHWIMG sections from the axone
pnor layout as they are not being used and pnor space is limited.
Along with removing the defintion in the pnor layout xml some code
changes were required to no longer attempt to load the MVPD/MEMD sections.

Change-Id: I20739e30ad497737c0a30b66cc36052c08c11de2
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/80295
Reviewed-by: Glenn Miles &lt;milesg@ibm.com&gt;
Tested-by: Jenkins Server &lt;pfd-jenkins+hostboot@us.ibm.com&gt;
Reviewed-by: Matt Derksen &lt;mderkse1@us.ibm.com&gt;
Tested-by: Jenkins OP Build CI &lt;op-jenkins+hostboot@us.ibm.com&gt;
Tested-by: Jenkins OP HW &lt;op-hw-jenkins+hostboot@us.ibm.com&gt;
Tested-by: FSP CI Jenkins &lt;fsp-CI-jenkins+hostboot@us.ibm.com&gt;
Reviewed-by: Daniel M Crowell &lt;dcrowell@us.ibm.com&gt;
</content>
</entry>
<entry>
<title>Add HCDB Support for eeprom cache process</title>
<updated>2019-06-26T21:45:21+00:00</updated>
<author>
<name>Christian Geddes</name>
<email>crgeddes@us.ibm.com</email>
</author>
<published>2019-06-21T21:11:32+00:00</published>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/blackbird-hostboot/commit/?id=3805319f1d630c6bc9c022b3e9eeb601aa3ffbf4'/>
<id>urn:sha1:3805319f1d630c6bc9c022b3e9eeb601aa3ffbf4</id>
<content type='text'>
While parsing the EEPROMs of the system as part of the EECACHE process
if we detect a part has been replaced, removed, or added then we must
call markTargetChanged to notify hwas to take appropriate actions.
This commit also introduces the new preloaded EECACHE section for simics.

Change-Id: I9f2a8a62d5c6f9a6c66a0c0c7ed5ed86f7d94aec
RTC: 211109
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/78762
Tested-by: Jenkins Server &lt;pfd-jenkins+hostboot@us.ibm.com&gt;
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Tested-by: FSP CI Jenkins &lt;fsp-CI-jenkins+hostboot@us.ibm.com&gt;
Reviewed-by: William G. Hoffa &lt;wghoffa@us.ibm.com&gt;
Reviewed-by: Roland Veloz &lt;rveloz@us.ibm.com&gt;
Reviewed-by: Daniel M. Crowell &lt;dcrowell@us.ibm.com&gt;
</content>
</entry>
<entry>
<title>Add MMIO test cases that force failures</title>
<updated>2019-06-07T20:29:44+00:00</updated>
<author>
<name>Glenn Miles</name>
<email>milesg@ibm.com</email>
</author>
<published>2019-06-07T04:57:56+00:00</published>
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<id>urn:sha1:a697687b5e5e15b00b841db5f2c8c66ee9d8ef35</id>
<content type='text'>
Change-Id: I9af1230917c1629c9f9568ae6645291c11b0140e
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/78524
Tested-by: Jenkins Server &lt;pfd-jenkins+hostboot@us.ibm.com&gt;
Tested-by: FSP CI Jenkins &lt;fsp-CI-jenkins+hostboot@us.ibm.com&gt;
Tested-by: Jenkins OP Build CI &lt;op-jenkins+hostboot@us.ibm.com&gt;
Tested-by: Jenkins OP HW &lt;op-hw-jenkins+hostboot@us.ibm.com&gt;
Reviewed-by: Matt Derksen &lt;mderkse1@us.ibm.com&gt;
Reviewed-by: Roland Veloz &lt;rveloz@us.ibm.com&gt;
Reviewed-by: Daniel M. Crowell &lt;dcrowell@us.ibm.com&gt;
</content>
</entry>
<entry>
<title>Update startup.simics to correctly lookups processor targets</title>
<updated>2019-06-05T21:38:22+00:00</updated>
<author>
<name>Christian Geddes</name>
<email>crgeddes@us.ibm.com</email>
</author>
<published>2019-06-04T15:30:52+00:00</published>
<link rel='alternate' type='text/html' href='https://git.raptorcs.com/git/blackbird-hostboot/commit/?id=a70922169308a63b7ea2c4191bce1172910579fa'/>
<id>urn:sha1:a70922169308a63b7ea2c4191bce1172910579fa</id>
<content type='text'>
Simics has changed the way we lookup processor targets so we must
adjust our scripts to use the new "get-all-procs" command

RTC: 210806
Change-Id: I4a053197ab0c517d20c4e3670b492180e7743634
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/78312
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Reviewed-by: VIJAY F. LOBO &lt;vflobo@us.ibm.com&gt;
Reviewed-by: Matt Derksen &lt;mderkse1@us.ibm.com&gt;
Reviewed-by: Daniel M. Crowell &lt;dcrowell@us.ibm.com&gt;
</content>
</entry>
</feed>
