meklort <PROJECT> SHM Register Definitions 1.0 SHM Device APE SHM Registers SHM SHM> Device APE SHM Registers 0xC0014000 SEG_SIG APE_APE_MAGIC ('APE!') when all is well. 0x0 32 true Sig 0 32 read-write LOADER 0x10AD10AD APE_SEG_LENGTH Set to 0x34. 0x4 32 true FW_STATUS 0xc 32 true Ready 8 1 read-write unknown_31_28 If this is all-ones, it appears to mean the APE FW is halted. 28 4 read-write FW_FEATURES 0x10 32 true NCSI 1 1 read-write 4014 Unknown. 0x14 32 true FW_VERSION 0x18 32 true Build 0 8 read-write Revision 8 8 read-write Minor 16 8 read-write Major 24 8 read-write SEG_MESSAGE_BUFFER_OFFSET Specifies the offset of a scratchpad area, relative to the start of the APE SHM area (i.e., relative to APE_REG(0x4000)). 0x1c 32 true SEG_MESSAGE_BUFFER_LENGTH Specifies the size of the scratchpad area in bytes. 0x20 32 true 4024 Unknown. Bootcode related. 0x24 32 true 4028 Unknown. Bootcode related. 0x28 32 true Loader_Command Command sent when using the the APE loader. Zero once handled. 0x38 32 true Command 0 32 read-write NOP 0 READ_MEM 1 WRITE_MEM 2 CALL 3 Loader_Arg0 Argument 0 for the APE loader. 0x3c 32 true Loader_Arg1 Argument 1 for the APE loader. 0x40 32 true RCPU_SEG_SIG Set to APE_RCPU_MAGIC ('RCPU') by RX CPU. 0x100 32 true Sig 0 32 read-write RCPU_MAGIC 0x52435055 RCPU_SEG_LENGTH Set to 0x34. 0x104 32 true RCPU_INIT_COUNT Incremented by RX CPU every boot. 0x108 32 true RCPU_FW_VERSION Set to the bootcode version. e.g. 0x0127 -> v1.39. 0x10c 32 true RCPU_CFG_FEATURE Set to 0x110 32 true RCPU_PCI_VENDOR_DEVICE_ID Set to PCI Vendor/Device ID by S2. 0x114 32 true Device ID 0 16 read-write Vendor ID 16 16 read-write RCPU_PCI_SUBSYSTEM_ID Set to PCI Subsystem Vendor/Subsystem ID by S2. 0x118 32 true Subsystem Vendor ID 0 16 read-write Subsystem ID 16 16 read-write RCPU_APE_RESET_COUNT Unknown. Incremented by frobnicating routine. 0x11c 32 true RCPU_LAST_APE_STATUS Unknown. Written by frobnicating routine. 0x120 32 true RCPU_LAST_APE_FW_STATUS Unknown. 0x124 32 true RCPU_CFG_HW Set from 0x128 32 true RCPU_CFG_HW_2 Set from 0x12c 32 true RCPU_CPMU_STATUS Set from 0x130 32 true Address 0 16 read-write ADDRESS 0x362C Status 16 16 read-write HOST_SEG_SIG Set to APE_HOST_MAGIC ('HOST') to indicate the section is valid. 0x200 32 true HOST_SEG_LEN Set to 0x20. 0x204 32 true HOST_INIT_COUNT Incremented by host on every initialization. 0x208 32 true HOST_DRIVER_ID Linux sets this to 0xF0MM_mm00, where M is the major version of Linux and m is the minor version. 0x20c 32 true HOST_BEHAVIOR 0x210 32 true No PHYLock 0 1 read-write HEARTBEAT_INTERVAL In milliseconds. Set to 0 to disable heartbeating. 0x214 32 true HEARTBEAT_COUNT 0x218 32 true HOST_DRIVER_STATE 0x21c 32 true State 0 32 read-write Start 1 Unload 2 WOL 3 WOL_SPEED 0x224 32 true EVENT_STATUS 0x300 32 true Driver Event 4 1 read-write Command 8 8 read-write State Change 5 Scratchpad Read 22 Scratchpad Write 23 State 16 3 read-write Start 1 Unload 2 WOL 3 Suspend 4 Pending 31 1 read-write PROT_MAGIC This is set to APE_PROT_MAGIC ('PROT') on all functions. If it is 'PROT', the following fields (MAC0_HIGH/LOW) are valid 0x308 32 true PROT_MAC0_HIGH High 16 bits of MAC address 0. Only valid if 0x314 32 true PROT_MAC0_LOW Low 16 bits of MAC address 0. 0x318 32 true RCPU Write Pointer Index into the printf buffer for last valid byte. 0x324 32 true RCPU Host Read Pointer Index into the printf buffer for last read byte. 0x328 32 true RCPU Read Pointer Index into the printf buffer for last read byte. 0x32C 32 true RCPU Printf Buffer Printf buffer from the APE to the Rcpu for NVRAM printout or the host 0x330 372 32 true SHM_CHANNEL0 Device APE SHM Channel Registers SHM_CHANNEL0 SHM_CHANNEL> Device APE SHM Channel Registers 0xC0014900 NCSI_CHANNEL_INFO 0x0 32 true Enabled This can be modified via NCSI SELECT PACKAGE and NCSI DESELECT PACKAGE. 0 1 read-write TX Passthrough TX passthrough has been enabled by BMC NCSI command. 1 1 read-write Ready 2 1 read-write Init 3 1 read-write MFILT 4 1 read-write BFILT 5 1 read-write SERDES 6 1 read-write VLAN 8 1 read-write B2H 10 1 read-write B2N 11 1 read-write EEE 12 1 read-write Driver 14 1 read-write PDead 15 1 read-write NCSI_CHANNEL_MCID AEN Management Controller ID, set by BMC when sending AEN ENABLE command and used when sending AENs. 0x4 32 true NCSI_CHANNEL_AEN Set via NCSI ENABLE AEN. 0x8 32 true Enable Link Status Change AEN 0 1 read-write Enable Configuration Required AEN 1 1 read-write Enable Host NC Driver Status Change AEN 2 1 read-write NCSI_CHANNEL_BFILT 0xc 32 true ARP Packet 0 1 read-write DHCP Client Packet 1 1 read-write DHCP Server Packet 2 1 read-write NetBIOS Packet 3 1 read-write NCSI_CHANNEL_MFILT 0x10 32 true IPv6 Neighbour Advertisement 0 1 read-write IPv6 Router Advertisement 1 1 read-write DHCPv6 Relay and Server Multicast 2 1 read-write NCSI_CHANNEL_SETTING_1 This is the "Link Settings" value from NCSI Set Link. 0x14 32 true Autonegotiation enabled 0 1 read-write Link Speed 10M enable 1 1 read-write Link Speed 100M enable 2 1 read-write Link Speed 100M enable 2 1 read-write Link Speed 1000M enable 3 1 read-write Link Speed 10G enable 4 1 read-write Half duplex enable 8 1 read-write Full duplex enable 9 1 read-write Pause capability enable 10 1 read-write Asymmetric pause capability enable 11 1 read-write OEM link settings field valid 12 1 read-write NCSI_CHANNEL_SETTING_2 This is the "OEM Settings" value from NCSI Set Link. 0x18 32 true NCSI_CHANNEL_VLAN Receives VLAN mode from NCSI specification "Enable VLAN" command. 0x1c 32 true NCSI_CHANNEL_ALT_HOST_MAC_HIGH Lower 16 bits of this word contains upper 16 bits of the MAC. 0x24 32 true NCSI_CHANNEL_ALT_HOST_MAC_MID Lower 16 bits of this word contains mid 16 bits of the MAC. 0x28 32 true NCSI_CHANNEL_ALT_HOST_MAC_LOW Lower 16 bits of this word contains low 16 bits of the MAC. 0x2c 32 true NCSI_CHANNEL_MAC0_HIGH Lower 16 bits of this word contains upper 16 bits of the MAC. 0x34 32 true NCSI_CHANNEL_MAC0_MID Lower 16 bits of this word contains mid 16 bits of the MAC. 0x38 32 true NCSI_CHANNEL_MAC0_LOW Lower 16 bits of this word contains low 16 bits of the MAC. 0x3c 32 true NCSI_CHANNEL_MAC1_HIGH Lower 16 bits of this word contains upper 16 bits of the MAC. 0x44 32 true NCSI_CHANNEL_MAC1_MID Lower 16 bits of this word contains mid 16 bits of the MAC. 0x48 32 true NCSI_CHANNEL_MAC1_LOW Lower 16 bits of this word contains low 16 bits of the MAC. 0x4c 32 true NCSI_CHANNEL_MAC2_HIGH Lower 16 bits of this word contains upper 16 bits of the MAC. 0x54 32 true NCSI_CHANNEL_MAC2_MID Lower 16 bits of this word contains mid 16 bits of the MAC. 0x58 32 true NCSI_CHANNEL_MAC2_LOW Lower 16 bits of this word contains low 16 bits of the MAC. 0x5c 32 true NCSI_CHANNEL_MAC3_HIGH Lower 16 bits of this word contains upper 16 bits of the MAC. 0x64 32 true NCSI_CHANNEL_MAC3_MID Lower 16 bits of this word contains mid 16 bits of the MAC. 0x68 32 true NCSI_CHANNEL_MAC3_LOW Lower 16 bits of this word contains low 16 bits of the MAC. 0x6c 32 true NCSI_CHANNEL_MAC0_VLAN_VALID Nonzero indicates VLAN field is valid 0x70 32 true NCSI_CHANNEL_MAC0_VLAN 0x74 32 true NCSI_CHANNEL_MAC1_VLAN_VALID Nonzero indicates VLAN field is valid 0x78 32 true NCSI_CHANNEL_MAC1_VLAN 0x7c 32 true NCSI_CHANNEL_STATUS 0x80 32 true Link up 0 1 read-write Link Status 1 4 read-write No Link 0 10BASE-T half-duplex 1 10BASE-T full-duplex 2 100BASE-TX half-duplex 3 100BASE-T4 4 100BASE-TX full-duplex 5 1000BASE-T half-duplex 6 1000BASE-T full-duplex 7 10G-BASE-T 8 Autonegotiation Enabled Auto-negotiation is enabled. This field always returns 0 if auto-negotiation is not supported. 5 1 read-write Autonegotiation Complete Set if autonegotiation is complete. 6 1 read-write Parallel Detection Link partner did not support auto-negotiation and parallel detection was used to get link. 7 1 read-write Link Speed 1000M Full Duplex Capable Link partner is 1000BASE-T full-duplex capable 9 1 read-write Link Speed 1000M Half Duplex Capable Link partner is 1000BASE-T half-duplex capable 10 1 read-write Link Speed 100M-T4 Capable Link partner is 100BASE-T4 capable 11 1 read-write Link Speed 100M-TX Full Duplex Capable Link partner 100BASE-TX full-duplex capable 12 1 read-write Link Speed 100M-TX Half Duplex Capable Link partner 100BASE-TX half-duplex capable 13 1 read-write Link Speed 10M-T Full Duplex Capable Link partner 10BASE-T full-duplex capable 14 1 read-write Link Speed 10M-T Half Duplex Capable Link partner 10BASE-T half-duplex capable 15 1 read-write TX Flow Control Flag Pause Flow Control enabled for TX on the external network interface. 16 1 read-write RX Flow Control Flag Pause Flow Control enabled for RX on the external network interface. 17 1 read-write Link Partner Advertised Flow Control Flow control supported by partner. 18 2 read-write Not Capable 0 Symmetric Pause 1 Asymmetric Pause 2 Symmetric and Asymmetric Pause 3 SerDes Link SerDes status. 20 1 read-write OEM Link Status Valid If set, OEM Link Status was populated and is valid. 21 1 read-write NCSI_CHANNEL_RESET_COUNT 0x84 32 true NCSI_CHANNEL_PXE 0x88 32 true NCSI_CHANNEL_DROPFIL 0x8c 32 true NCSI_CHANNEL_SLINK 0x90 32 true NCSI_CHANNEL_DBG 0xa0 32 true NCSI_CHANNEL_CTRLSTAT_RX 0xb0 32 true NCSI_CHANNEL_CTRLSTAT_DROPPED 0xb4 32 true NCSI_CHANNEL_CTRLSTAT_TYPE_ERR 0xb8 32 true NCSI_CHANNEL_CTRLSTAT_BAD_CSUM 0xbc 32 true NCSI_CHANNEL_CTRLSTAT_ALL_RX 0xc0 32 true NCSI_CHANNEL_CTRLSTAT_ALL_TX 0xc4 32 true NCSI_CHANNEL_CTRLSTAT_ALL_AEN 0xc8 32 true 8 SHM_CHANNEL1 Device APE SHM Channel Registers SHM_CHANNEL1 SHM_CHANNEL> Device APE SHM Channel Registers 0xC0014a00 8 SHM_CHANNEL2 Device APE SHM Channel Registers SHM_CHANNEL2 SHM_CHANNEL> Device APE SHM Channel Registers 0xC0014b00 8 SHM_CHANNEL3 Device APE SHM Channel Registers SHM_CHANNEL3 SHM_CHANNEL> Device APE SHM Channel Registers 0xC0014c00 8