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* Add retire bit to RegAPERxPoolRetire0_tEvan Lojewski2019-05-052-32/+80
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* Add additional SHM headersEvan Lojewski2019-05-053-0/+735
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* Add the Finished bit for releasing the frame.Evan Lojewski2019-05-052-8/+20
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* Check in some additional ipxact generator output.Evan Lojewski2019-05-046-0/+5745
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* Begin cleaning up tx/rx codeEvan Lojewski2019-05-041-0/+2
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* Add initial RX port register generation.Evan Lojewski2019-05-028-5/+519
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* Begin moving APE tx code from the host to the APE.Evan Lojewski2019-05-022-64/+64
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* Additioanl tx trialsEvan Lojewski2019-05-014-62/+406
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* Fix register definiton for ape peripheral.Evan Lojewski2019-04-298-22/+224
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* Add enumeration for block size.Evan Lojewski2019-04-284-0/+502
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* Add MAC address match registers and regenerate.Evan Lojewski2019-04-226-77/+9212
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* Begin adding support for setting ape statistics in the SHM region.Evan Lojewski2019-04-1410-2996/+5392
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* Split APE register region into two - mapped in different places based on ↵Evan Lojewski2019-04-134-6202/+6438
| | | | host, mips, or ape cpu.
* Add missing APE header.Evan Lojewski2019-04-131-0/+6642
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* Regenrate headers with additional APE registers for RX/TX.Evan Lojewski2019-04-131-5/+1445
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* Regenerate header with properly component offsets.Evan Lojewski2019-04-0911-1235/+453
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* Update APE registers to exist in the APE code.Evan Lojewski2019-04-091-56/+2415
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* Add initial rx-from-network initialization code.Evan Lojewski2019-04-061-10/+7
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* Add missing header.Evan Lojewski2019-04-061-0/+514
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* Add initial indeirect APE read support for the host cxxsim code.Evan Lojewski2019-04-0610-19/+15
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* Clean up CXXregister code slightly to prepare for initial APE-indirect ↵Evan Lojewski2019-04-0610-60/+5219
| | | | access code.
* Add initial ape loade rbinary to allow the bcmregtool to read/write ↵Evan Lojewski2019-04-032-4/+252
| | | | arbitrary ape memory and to bootloader ape payloads.
* Regenerate headers + simulation code to allow arbitrary read/writes from the ↵Evan Lojewski2019-04-0310-0/+120
| | | | base component.
* Check in missing APE_SHM.h file.Evan Lojewski2019-04-011-0/+1908
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* Fix NVIC register definitions.Evan Lojewski2019-04-011-26/+22
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* Update ipxact definition an regen.Evan Lojewski2019-04-011-1/+24
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* Update ape header to work with new utilities.Evan Lojewski2019-03-301-2/+5
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* Update APE section flags.Evan Lojewski2019-03-301-0/+2
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* Check in missing SHM file.Evan Lojewski2019-03-261-0/+1908
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* Add ape format information.Evan Lojewski2019-03-241-1/+33
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* Split APE SHM out of the APE register area. Instantiate 4x in the APE, one ↵Evan Lojewski2019-03-231-1808/+1
| | | | per functino.
* Start adding in APE register generation.Evan Lojewski2019-03-231-0/+2354
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* SPlit NVM registers out of bcm5719 xml.Evan Lojewski2019-03-231-12/+12
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* Update ipxact to include remaining lock bits for the APE.Evan Lojewski2019-03-161-0/+95
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* Update ipxact to include addtional APE registers.Evan Lojewski2019-03-162-18/+2491
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* Add som additional attention register information from the manual.Evan Lojewski2019-03-161-3/+95
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* Add additional shadowed MII regisers and APE registers.Evan Lojewski2019-03-132-93/+458
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* Add in additional NVM configuration registers to the ipxact and regenerate.Evan Lojewski2019-03-111-2/+46
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* REmove packed keywords from NVRamContents - causes MIPS compiler to attemp ↵Evan Lojewski2019-02-241-11/+12
| | | | misaligned instructions, which are not supported by the RX CPU.
* Fix MiscellaneousHostControl definitionEvan Lojewski2019-02-231-16/+12
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* Fix padding geneartion in registers.Evan Lojewski2019-02-233-88/+36
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* Add updated bitmap definitions when compiling for big endian.Evan Lojewski2019-02-233-0/+1445
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* Update stage1 to load stage2 and report the status.Evan Lojewski2019-02-232-0/+70
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* Add some initial support for pretty-printing registers.Evan Lojewski2019-02-233-0/+816
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* Add checking stage1 / stage2 crc and reporting if an error exists.Evan Lojewski2019-02-231-0/+6
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* Add bootcode location to ipxact and regenerate.Evan Lojewski2019-02-231-0/+104
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* Add additional init-from-NVM code.Evan Lojewski2019-02-191-9/+19
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* Add generation of various memoriesEvan Lojewski2019-02-186-0/+315
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* Fix parsing of the power budget from nvm.Evan Lojewski2019-02-161-114/+506
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* Add missing register definitions for power budget 1-7Evan Lojewski2019-02-161-0/+203
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