1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
|
# RUN: llc -mtriple=thumbv7 -start-before=if-converter -o - %s | FileCheck %s
---
name: NeonVdupMul
body: |
bb.0:
successors: %bb.2, %bb.1
liveins: $d0, $r0, $r1
t2CMPri killed $r1, 0, 14, $noreg, implicit-def $cpsr
t2Bcc %bb.2, 0, killed $cpsr
bb.1:
liveins: $d0, $r0
$d16 = VDUP32d killed $r0, 14, $noreg
; Verify that the neon instructions haven't been conditionalized:
; CHECK-LABEL: NeonVdupMul
; CHECK: vdup.32
; CHECK: vmul.i32
$d0 = VMULv2i32 killed $d16, killed $d0, 14, $noreg
bb.2:
liveins: $d0
tBX_RET 14, $noreg, implicit $d0
...
---
name: NeonVmovVfpLdr
body: |
bb.0.entry:
successors: %bb.1, %bb.2
liveins: $r0, $r1
t2CMPri killed $r1, 0, 14, $noreg, implicit-def $cpsr
t2Bcc %bb.2, 1, killed $cpsr
bb.1:
$d0 = VMOVv2i32 0, 14, $noreg
tBX_RET 14, $noreg, implicit $d0
bb.2:
liveins: $r0
$d0 = VLDRD killed $r0, 0, 14, $noreg
; Verify that the neon instruction VMOVv2i32 hasn't been conditionalized,
; but the VLDR instruction that is available both in the VFP and Advanced
; SIMD extensions has.
; CHECK-LABEL: NeonVmovVfpLdr
; CHECK-DAG: vmov.i32 d0, #0x0
; CHECK-DAG: vldr{{ne|eq}} d0, [r0]
tBX_RET 14, $noreg, implicit $d0
...
|
